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RHBD Techniques to Mitigate SEU and SET in CMOS Frequency Synthesizers

Institute of Applied Microelectronics (IUMA), Department of Electronic and Automatic Engineering, University of Las Palmas de Gran Canaria (ULPGC), 35001 Las Palmas de Gran Canaria, Spain
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Electronics 2019, 8(6), 690; https://doi.org/10.3390/electronics8060690
Received: 30 April 2019 / Revised: 12 June 2019 / Accepted: 14 June 2019 / Published: 19 June 2019
(This article belongs to the Special Issue Radiation Tolerant Electronics)
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Abstract

This paper presents a thorough study of radiation effects on a frequency synthesizer designed in a 0.18 μ m CMOS technology. In CMOS devices, the effect of a high energy particle impact can be modeled by a current pulse connected to the drain of the transistors. The effects of SET (single event transient) and SEU (single event upset) were analyzed connecting current pulses to the drains of all the transistors and analyzing the amplitude variations and phase shifts obtained at the output nodes. Following this procedure, the most sensitive circuits were detected. This paper proposes a combination of radiation hardening-by-design techniques (RHBD) such as resistor–capacitor (RC) filtering or local circuit-redundancy to mitigate the effects of radiation. The proposed modifications make the frequency synthesizer more robust against radiation. View Full-Text
Keywords: single event transient (SET); single event opset (SEU); radiation-hardening-by-design (RHBD); frequency synthesizers; voltage controlled oscillator (VCO); frequency divider by two; CMOS single event transient (SET); single event opset (SEU); radiation-hardening-by-design (RHBD); frequency synthesizers; voltage controlled oscillator (VCO); frequency divider by two; CMOS
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Díez-Acereda, V.; L. Khemchandani, S.; del Pino, J.; Mateos-Angulo, S. RHBD Techniques to Mitigate SEU and SET in CMOS Frequency Synthesizers. Electronics 2019, 8, 690.

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