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Open AccessArticle

Power-Time Exploration Tools for NMP-Enabled Systems

1
Department of Information and Communication Engineering, Inha University, Incheon 22212, Korea
2
Department of Electrical Engineering, Seoul National University, Seoul 08826, Korea
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(10), 1096; https://doi.org/10.3390/electronics8101096
Received: 15 August 2019 / Revised: 23 September 2019 / Accepted: 26 September 2019 / Published: 28 September 2019
(This article belongs to the Section Computer Science & Engineering)
Recently, dramatic improvements in memory performance have been highly required for data demanding application services such as deep learning, big data, and immersive videos. To this end, the throughput-oriented memory such as high bandwidth memory (HBM) and hybrid memory cube (HMC) has been introduced to provide a high bandwidth. For its effective use, various research efforts have been conducted. Among them, the near-memory-processing (NMP) is a concept that utilizes bandwidth and power consumption by placing computation logic near the memory. In the NMP-enabled system, a processor hierarchy consisting of hosts and NMPs is formed based on the distance from the main memory. In this paper, an evaluation tool is proposed to obtain the optimal design decision considering the power-time trade-off in the processor hierarchy. Every time the operating condition and constraints change, the decision of task-level offloading is dynamically made. For the realistic NMP-enabled system environment, the relationship among HBM, host, and NMP should be carefully considered. Hosts and NMPs are almost hidden from each other and the communications between them are extremely limited. In the simulation results, popular benchmarks and a machine learning application are used to demonstrate power-time trade-offs depending on applications and system conditions. View Full-Text
Keywords: high bandwidth memory; power-time-based design decision; near-memory-processing; task offloading high bandwidth memory; power-time-based design decision; near-memory-processing; task offloading
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MDPI and ACS Style

Rhee, C.E.; Park, S.-W.; Choi, J.; Jung, H.; Lee, H.-J. Power-Time Exploration Tools for NMP-Enabled Systems. Electronics 2019, 8, 1096.

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