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Open AccessArticle

An Improved CMOS Design of Op-Amp Comparator with Gain Boosting Technique for Data Converter Circuits

1
Department of Biomedical Engineering, Guru Jambheshwar University of Science and Technology, Hisar, Haryana 125001, India
2
University School of Information, Communication & Technology (USICT), Guru Gobind Singh Indraprastha University, New Delhi 110078, India
3
Department of ECE, Guru Jambheshwar University of Science and Technology, Hisar, Haryana 125001, India
*
Author to whom correspondence should be addressed.
J. Low Power Electron. Appl. 2018, 8(4), 33; https://doi.org/10.3390/jlpea8040033
Received: 16 August 2018 / Revised: 13 September 2018 / Accepted: 18 September 2018 / Published: 25 September 2018
A modified architecture of a comparator to achieve high slew rate and boosted gain with an improvement in gain design error is introduced and investigated in this manuscript. It employs the conventional architecture of common-mode current feedback with the modified gain booster topology to increase gain, slew rate, and reduced gain error from the conventional structure. Observation from the simulation results concludes that the modified structure using 24 transistors shows power dissipation of 362.29 μW in 90 nm CMOS technology by deploying a supply voltage of 0.7 V, which is a 70% reduction as compared to the usual common mode feedback (CMFD) structure. The symmetric slew rate of 839.99 V/µs for both charging and discharging is obtained, which is 173% more than the standard CMFD structure. A reduction of 0.61% in gain error is achieved through this architecture. A SPICE simulation tool based on 90 nm CMOS technology is employed for executing the Monte Carlo simulations. A brief comparison with earlier CMFD structures shows improved performance parameters in terms of power consumption and slew rate with the reduction in gain error. View Full-Text
Keywords: cascode; current mirrors; power consumption (PC); common mode feedback (CMFD); gain boosting (GB); complementary mosfet technology (CMOS) cascode; current mirrors; power consumption (PC); common mode feedback (CMFD); gain boosting (GB); complementary mosfet technology (CMOS)
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Khatak, A.; Kumar, M.; Dhull, S. An Improved CMOS Design of Op-Amp Comparator with Gain Boosting Technique for Data Converter Circuits. J. Low Power Electron. Appl. 2018, 8, 33.

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