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Low-Power and Optimized VLSI Implementation of Compact Recursive Discrete Fourier Transform (RDFT) Processor for the Computations of DFT and Inverse Modified Cosine Transform (IMDCT) in a Digital Radio Mondiale (DRM) and DRM+ Receiver

Department of Electrical Engineering, National Cheng Kung University, 701 Tainan, Taiwan
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J. Low Power Electron. Appl. 2013, 3(2), 99-113; https://doi.org/10.3390/jlpea3020099
Received: 5 March 2013 / Revised: 1 May 2013 / Accepted: 10 May 2013 / Published: 24 May 2013
This paper presents a compact structure of recursive discrete Fourier transform (RDFT) with prime factor (PF) and common factor (CF) algorithms to calculate variable-length DFT coefficients. Low-power optimizations in VLSI implementation are applied to the proposed RDFT design. In the algorithm, for 256-point DFT computation, the results show that the proposed method greatly reduces the number of multiplications/additions/computational cycles by 97.40/94.31/46.50% compared to a recent approach. In chip realization, the core size and chip size are, respectively, 0.84 × 0.84 and 1.38 × 1.38 mm2. The power consumption for the 288- and 256-point DFT computations are, respectively, 10.2 (or 0.1051) and 11.5 (or 0.1176) mW at 25 (or 0.273) MHz simulated by NanoSim. It would be more efficient and more suitable than previous works for DRM and DRM+ applications. View Full-Text
Keywords: digital radio mondiale (DRM); discrete fourier transform (DFT); inverse modified cosine transform (IMDCT); recursive structure digital radio mondiale (DRM); discrete fourier transform (DFT); inverse modified cosine transform (IMDCT); recursive structure
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Lai, S.-C.; Lee, Y.-S.; Lei, S.-F. Low-Power and Optimized VLSI Implementation of Compact Recursive Discrete Fourier Transform (RDFT) Processor for the Computations of DFT and Inverse Modified Cosine Transform (IMDCT) in a Digital Radio Mondiale (DRM) and DRM+ Receiver. J. Low Power Electron. Appl. 2013, 3, 99-113.

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