Madella, G.; Tesser, F.; Alonso, L.; Corbalan, J.; Cesarini, D.; Bartolini, A.
The REGALE Library: A DDS Interoperability Layer for the HPC PowerStack. J. Low Power Electron. Appl. 2025, 15, 10.
https://doi.org/10.3390/jlpea15010010
AMA Style
Madella G, Tesser F, Alonso L, Corbalan J, Cesarini D, Bartolini A.
The REGALE Library: A DDS Interoperability Layer for the HPC PowerStack. Journal of Low Power Electronics and Applications. 2025; 15(1):10.
https://doi.org/10.3390/jlpea15010010
Chicago/Turabian Style
Madella, Giacomo, Federico Tesser, Lluis Alonso, Julita Corbalan, Daniele Cesarini, and Andrea Bartolini.
2025. "The REGALE Library: A DDS Interoperability Layer for the HPC PowerStack" Journal of Low Power Electronics and Applications 15, no. 1: 10.
https://doi.org/10.3390/jlpea15010010
APA Style
Madella, G., Tesser, F., Alonso, L., Corbalan, J., Cesarini, D., & Bartolini, A.
(2025). The REGALE Library: A DDS Interoperability Layer for the HPC PowerStack. Journal of Low Power Electronics and Applications, 15(1), 10.
https://doi.org/10.3390/jlpea15010010