# A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

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## Abstract

**:**

_{RMS}, from 200 Hz to 11.5 kHz. The neurostimulator circuit is a programmable Howland current pump. Measurements have shown its capability to generate currents with arbitrary shapes and ranging from −325 µA to +318 µA. Simulations indicated a quiescent power consumption of 0.13 µW, with zero neurostimulation current. Both the LNA and the neurostimulator circuits are supplied with a 1.2 V voltage and occupy a microdevice area of 145 µm × 311 µm and 88 µm × 89 µm, respectively, making them suitable for implantation in applications involving closed-loop deep-brain stimulation.

## 1. Introduction

## 2. Design

#### 2.1. Low-Noise Amplifier (LNA)

_{1}and C

_{2}, and a pair of large pseudo-resistors R

_{2}. The function of the resistors, together with the capacitors, is to generate a low cutoff frequency.

_{8p}) and the NMOS (M

_{8n}) act as a resistor in series with the capacitor (C

_{c}), creating a pole and ensuring that the operational amplifier is unconditionally stable. The transfer function of the LNA is given as follows:

_{2}C

_{1}, A

_{mband}= (C

_{1}+ C

_{2})/C

_{2}, f

_{L}= 1/(2πR

_{2}C

_{2}), and f

_{H}= f

_{p}A

_{0}/A

_{mband}= GBW/A

_{mband}. The quantities f

_{p}, GBW, and A

_{0}are, respectively, the dominant pole, the gain × bandwidth product, and the open-loop gain of the operational amplifier. Typically, f

_{L}<< f

_{H}and C

_{2}<< C

_{1}; then, for medium-frequency operation, i.e., for f

_{L}<< frequency << f

_{H}, the LNA gain is as follows:

_{f}≈ C

_{1}/C

_{2}= A

_{mband}

_{L}and f

_{H}are the LNA low and high cutoff frequencies, respectively.

_{2}) must be on the order of teraohms to ensure that the low pole, f

_{L}= 1/(2πR

_{2}C

_{2}), of A

_{f}(s) has a value near or lower than 1.0 Hz. The integration of high-value resistors, like R

_{2}, in conventional form is not feasible because of the substantial area they would require. One feasible solution to this challenge involves implementing R

_{2}through the utilization of pseudo-resistors [16], as depicted in Figure 2b.

_{rms}), the low and high cutoff frequencies (6.0 Hz and 7.0 kHz, respectively), the power consumption (minimum), and the area (minimum).

_{rms}[21,22], so the input-referenced noise of LNAs is expected to be lower than this value. A noise floor as low as 4.0 μVrms is typically pursued by neuronal amplifier designers, but this level is significantly below the levels of thermal and biological noises. Initially, during the design and optimization phase, an input noise of 4.0 μVrms was targeted. However, achieving this level of noise requires a significant amount of power consumption in the utilized process, because of various factors, such as the large gate capacitance of the differential pair transistors, M

_{1}and M

_{2}. For this reason, in our design, we allowed for a higher input noise while maintaining low power consumption.

_{1}, C

_{2}, and C

_{c}generated by the sizing/optimization algorithms. The simulated performance parameters of the LNA are a power consumption of 6.16 μW, for a power supply of 1.2 V; low and high cutoff frequencies of 12 Hz and 8.5 kHz, respectively; a gain of 39.9 dB; and input-referred noises (IRNs) of 3.93 μV

_{RMS}, from 12 Hz to 200 kHz, of 3.71 μV

_{RMS}, from 200 Hz to 8.5 kHz, and 5.4 μV

_{RMS}, from 12 Hz to 8.5 kHz. Additionally, the circuit is unconditionally stable for capacitive loads as high as 20 pF.

#### 2.2. Neurostimulator

_{1}, R

_{2}, R

_{3}, R

_{4}}, all fully implemented using the mask layers of the TSMC 65 nm CMOS process. Figure 4b presents the schematic of the operational amplifier used by the current pump. Table 2 lists the dimensions of the MOSFETs, the values of the operational amplifier’s internal capacitances, C

_{c}and C

_{x}, and the values of the current-pump’s resistors.

## 3. Experimental Results

#### 3.1. Low-Noise Amplifier (LNA)

_{CM}is generated with the help of a potentiometer.

_{CM}), different input common modes, and input signals with an amplitude of 2.2 mV

_{pp}. In this set of plots, the simulation results are also shown (dotted red line) to allow for comparisons. The measurements, in general, agree well with the simulation results. The most noticeable difference between the simulated and experimental results is the positions of the cutoff frequencies. The variation in these parameters is not surprising because f

_{L}depends on the pseudo-resistor, for which the value is difficult to estimate accurately, and f

_{H}depends on the transistors’ (M

_{1}and M

_{2}’s) transconductance parameter (g

_{m}), which varies considerably in a process.

_{CM,out}) at the output of the LNA, the maximum gain (G

_{max}), and the cutoff frequencies in terms of the common-mode voltage (V

_{CM}). The disparity between V

_{CM,out}and V

_{CM}arose because of the high-value pseudo-resistors and the gate leakage currents of M

_{1}and M

_{2}.

_{CM}), as depicted in Figure 6 and Table 3, leads to a decrease in both frequencies f

_{L}and f

_{H}. On the other hand, variations in V

_{CM}within the range of [0.5, 0.6] V did not yield significantly different gain curves. Additionally, variations in the input common mode did not alter the LNA operation. This demonstrates the robustness of the LNA concerning the input common mode, resulting in a low potential for the linear distortion of the signals during amplification.

_{BIAS}= 0.75 V, obtained using a bias resistance of R

_{BIAS}= 3.3 GΩ connected between the V

_{BIAS}node and the ground. This resulted in a total current of I

_{total}= 4.9 μA and a power consumption of 5.9 µW.

_{RMS}from 1.5 Hz to 200 kHz, 3.45 μV

_{RMS}from 200 Hz to 11.5 kHz, and 7.36 μV

_{RMS}from 1.5 Hz to 11.5 kHz.

_{pp}or less than −51 dB for input signals as high as 4.4 mV

_{pp}. The THD was calculated with the first nine harmonics.

_{pp}at the LNA input. The voltage value of the generator output ranged between 6 mV

_{pp}and 20 mV

_{pp}, depending on the frequency.

#### 3.2. Neurostimulator Circuit

_{BIAS}) was set at 315 mV.

_{CM,electrode}) applied in the reference terminal of the electrode. The implantable electrode is represented by the load resistor (R

_{LOAD}).

_{CM,electrode}) at the reference electrode was manually set between 0 V and 1.2 V in coarse steps of 0.3 V. Moreover, two breakout boards based on the MCP4725 digital-to-analog converter (DAC) with an I

^{2}C interface were used to make fine-tuning adjustments of the inputs (V

^{+}and V

^{−}) and, thus, precise adjustments of the currents injected into the load resistor (R

_{LOAD}). An Arduino board was selected to control the DACs.

^{+}, V

^{−}, V

_{CM,electrode}} in “raw” form to allow for a clear and immediate visualization of the wide and quasi-symmetrical range of currents that are possible to generate with this current pump. In contrast, Figure 10b illustrates the currents parameterized in terms of the reference voltage of the electrode (V

_{CM,electrode}) and the inverting input voltage (V

^{−}). The output current was determined using the following expression:

_{LOAD}= 986.5 Ω was used for these tests. The output voltage (V

_{out}) can range from 0 V to 1.2 V; therefore, the output current (I

_{out}) can either be positive or negative, simply by making the voltage of the reference electrode (V

_{CM,electrode}) either equal to 0 V or 1.2 V, respectively. As it is possible to observe in Figure 10a,b, other intermediate currents are possible to be generated. The inversion of the current direction is mandatory in deep-brain stimulation applications.

^{−}is ten times higher than the frequency of the signal applied at V

^{+}. The amplitudes of both signals varied between 0 V and 1.2 V. These settings result in a wave, the product of the two input waves, with a sliced sine shape. The reference voltage (V

_{CM,electrode}) of the electrode was also manually adjusted between 0 V and 1.2 V during these tests. Figure 11 shows the experimental results of the dynamic characterization.

^{+}), with V

^{−}and V

_{CM,electrode}set at one of the voltages {0, 0.6, 1.2} V. The voltage difference (ΔV

^{+}) in the plot is the difference between the maximum and the minimum values of the voltage (V

^{+}). The voltage difference (ΔV

^{+}) is equal to 2A

^{+}for a non-inverting input (V

^{+}) of V

^{+}= 0.6 + A

^{+}.cos(2πft). The amplitude (ΔV

^{+}) was swept from 0.2 V to 1.2 V in steps of 0.2 V. The non-inverting input (V

^{+}) voltage variation is rail-to-rail for A

^{+}= 0.6 V. Figure 11 also shows the results for seven combinations of {V

^{−}, V

_{CM,electrode}} in the set {0, 0.6, 1.2} V. Each combination defines the admissible range of the output current, for which plane domains are bounded above and below by two straight lines. The upper line occurs for V

^{+}= 0.6 + ΔV

^{+}, while the bottom line occurs for V

^{+}= 0.6 − ΔV

^{+}. It is possible to observe, in Figure 11, the ability to dynamically sweep the complete current limit, ranging from I

_{max}= +375 μA to I

_{min}= −218 μA, simply selecting the most suitable voltage combination of {V

^{+}, V

^{−}, V

_{CM,electrode}}.

**Figure 10.**(

**a**) Stimulation currents for the various combinations of voltages, {V

^{+}, V

^{−}, V

_{CM,electrode}}, in “raw” form to allow for a clear and immediate visualization of the wide and quasi-symmetrical range of currents. (

**b**) Stimulation currents are doubly parameterized in terms of the reference voltage of the electrode (V

_{CM}) and the inverting input (V

^{−}).

^{+}, V

^{−}, V

_{CM,electrode}} must be avoided, under the penalty of not being able to generate very specific values of the electric current. These voltage combinations are associated with the “no-man’s land” regions marked with gray shading. These “no-man’s land” regions represent combinations that are not contained in the set of the seven planar domains for the different voltage combinations {V

^{+}, V

^{−}, V

_{CM,electrode}}.

^{+}, V

^{−}, V

_{CM,electrode}} for a frequency of up to f

_{−3dB}= 1.5 MHz. This frequency is the one that narrows the current range from I

_{max}− I

_{min}to −3 dB. For example, the measurements indicated that I

_{max}= +297 μA and I

_{min}= +248.4 μA for V

^{+}= 0.6 + 0.1cos(2πft) or ΔV

^{+}= 0.2 V, with f < f

_{−3dB}/10, V

^{−}= 0 V, and V

_{CM,electrode}= 0 V. This results in ΔI

_{out}= I

_{max}− I

_{min}= +49 μA. The measurements also showed that ΔI

_{out}= (+49) × (2)

^{−1/2}× (10

^{−6}) = +34.6 μA for f = f

_{−3dB}= 1.5 MHz.

## 4. Discussion

_{total}is the total current absorbed by the amplifier stage (This current excludes the amount absorbed by the bias stage.); U

_{T}is the thermal voltage, given by kT/q (≈26 mV at a room temperature of 300 K); k is the Boltzmann constant; T is the room temperature, expressed in Kelvin; IRN is the total RMS input-referred noise; and BW is the LNA bandwidth.

## 5. Conclusions

_{rms}, which is below the levels of thermal and biological noises. This feature made it suitable for applications involving both LFP and AP signals. The implemented neurostimulator provides biphasic current pulses with non-standard waveforms and is suitable for delayed feedback.

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

## References

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**Figure 1.**Block diagram of a system for applications in CLBDS. The system is composed of a power management module, a communications module, and the CMOS microdevice, containing the acquisition blocks, the neurostimulator, and the control block. The proposed circuits, LNA, and the neurostimulator are filled with the yellow and green colors, respectively.

**Figure 2.**Schematics of (

**a**) an LNA and (

**b**) the operational amplifier. The red dots on (

**a**) indicate how the pseudo-resistors connects to the operational amplifier.

**Figure 3.**An example of (

**a**) a symmetric biphasic pulse shape without an inter-pulse delay and a mean value of zero; two examples of asymmetric biphasic pulse shapes, with (

**b**) zero and (

**c**) non-zero inter-pulse delays; and an example of (

**d**) a signal with an arbitrary shape. All the waves can have a mean value of zero.

**Figure 4.**Schematics of (

**a**) the current pump that implements the neurostimulator and (

**b**) the operational amplifier used by the current pump.

**Figure 5.**Photograph of the experimental setup used to obtain the gain and noise characteristics of the LNA.

**Figure 6.**Plots of the measured gain × frequency curves for input signals with an amplitude of 2 mV

_{pp}and several values of V

_{CM}and input common modes. These plots are compared with the simulations (dotted line in red).

**Figure 7.**Plots of the measured input-referenced noise × frequency for input signals with an amplitude of 2 mV

_{pp}(blue). These plots are compared with the simulations (dotted line in red).

**Figure 8.**Plot of the measured gain × frequency for signals injected into the saline solution. The signals injected into the solution were adjusted to obtain approximately 5 mV

_{pp}at the LNA input.

**Figure 9.**(

**a**) Schematic of the experimental setup used in the static characterization of the neurostimulator circuit. (

**b**) Photograph of the experimental setup used in the static characterization of the current pump.

**Figure 12.**Photograph of the fabricated CMOS microdevice (1.8 mm × 1.8 mm), with emphasis on the LNA and the current pump presented in the paper.

**Table 1.**Dimensions of the MOSFETs that comprise the operational amplifier and the pseudo-resistors, and the values of the capacitors C

_{c}, C

_{1}, and C

_{2}obtained with the optimizer.

MOSFET | (W/L) |

M_{1}, M_{2} | 59 μm/0.52 μm |

M_{3}, M_{4} | 25 μm/14.9 μm |

M_{5} | 48 μm/2.22 μm |

M_{6} | 12.5 μm/14.9 μm |

M_{7} | 12 μm/2.22 μm |

M_{8n} | 1.55 μm/12 μm |

M_{8p} | 3.1 μm/12 μm |

M_{9} | 2 μm/2.22 μm |

M_{p}_{1}, M_{p}_{2} | 12 μm/0.6 μm |

Capacitor | Total Value |

C_{c} | 7.5 pF |

C_{1} | 18.7 pF |

C_{2} | 0.18 pF |

**Table 2.**Dimensions of the MOSFETs, the capacitors (C

_{c}and C

_{x}) that comprise the operational amplifier, and the resistors of the current pump.

MOSFET | (W/L) |

M_{1}, M_{2} | 14.8 µm/0.24 µm |

M_{3}, M_{4} | 4.68 µm/0.18 µm |

M_{5} | 14.4 µm/0.36 µm |

M_{6} | 18.72 µm/0.18 µm |

M_{7} | 28.8 µm/0.36 µm |

M_{8} | 0.51 µm/7.2 µm |

M_{9} | 0.80 µm/0.36 µm |

Capacitor | Total Value |

C_{c} | 2.5 pF |

C_{x} | 417.2 fF |

Resistor | Total Value |

R_{1}, R_{2} | ≈3.52 kΩ |

R_{3}, R_{4} | ≈24.61 kΩ |

**Table 3.**Measured common-mode output voltage (V

_{CM,out}), maximum gain (G

_{max}), f

_{L}, and f

_{H}of the LNA for different V

_{CM}s values.

V_{in} (mV_{pp}) | V_{CM} (V) | V_{CM,out} (V) | G_{max} (dB) | f_{L} (Hz) | f_{H} (kHz) |
---|---|---|---|---|---|

2 | 0.5 | 0.506 | 41.1 | 6.1 | 13 |

0.6 | 0.63 | 41.2 | 1.5 | 11.5 | |

0.7 | 1.08 | 40.2 | 1.3 | 8 |

Ref. | CMOS Process | Mid-Band Gain (dB) | Bandwidth (Hz) | Power Supply (V) | Power Consumption (μW) | Area (mm^{2}) | IRN (μV_{rms}) | NEF |
---|---|---|---|---|---|---|---|---|

This work | 65 nm | 42 | 1.5–200 200–11.5 k 1.5–11.5 k | 1.2 | 5.88 | 0.046 | 6.48 3.45 7.36 | – 2.63 5.57 |

[21] | 40 nm | 25.7 | 200–5.0 k | 1.2 | 2.8 | N/A | 5.3 | 4.40 |

[22] | 65 nm | 52.1 | 1.0–8.2 k | 1.0 | 2.8 | 0.042 | 4.13 | 2.93 |

[23] | 65 nm | 46 | 1.0–10 k | 0.5 | 1.5 | 0.0039 | 6.5 | 4.34 |

[26] | 65 nm | 30 | 300–10 k | 0.5 | 2.3 | 0.025 | 5.8 | 4.76 |

[9] | 90 nm | 58.7 | 0.49–10.5 k | 1.0 | 2.85 | 0.137 | 3.04 | 1.93 |

[27] | 0.13 μm | 40 | 0.05–0.5 k | 1.0 | 12.1 | 0.072 | 2.2 | 2.90 |

[28] | 0.18 μm | 40 | 0.1–7.4 k | 1.0 | 3.44 | 0.012 | 4.27 | 3.07 |

[29] | 0.18 μm | 40 | 0.05–7.5 k | 1.2 | 4.8 | 0.022 | 3.87 | 3.44 |

[30] | 0.5 μm | 49.26, 60.63 | 0.5–300 270–12.9 k | 3.3 | 4.12 | 0.0144 | 3.16 | 2.53 |

[31] | 0.5 μm | 36.1 | 0.3–4.7 k | 1.0 | 0.805 | 0.046 | 3.6 | 1.8 |

[10] | 0.5 μm | 39.5 | 0.025–7.2 k | ±2.5 | 80 | 0.16 | 2.2 | 4.0 |

Ref. | Current (μA) | Voltage (V) | Maximum Pulse Frequency/ Bandwidth (Hz) | Minimum Pulse Duration/ Bandwidth ^{−1} (μs) | Charge Balance | Active Charge Balancing Method |
---|---|---|---|---|---|---|

This work | from −325 to +318 | 1.2 | 1.5 × 10^{6} (BW) | 25 | Active | Continuous (Howland current pump) |

[33] | from 20 to 2000 | 12 | 500 | 10 | Active | Switched (H-bridge) |

[34] | from −200 to +200 | 3.6 (bat) | 185 | 90 | Active | Switched |

[35] | from 0 to 200 | 3.2 (bat) | 130 | 90 | Passive | Switched |

[36] | from 30 to 1000 | 3.7 (bat) | 5000 | 10 | Active | Switched |

[37] | from −375 to +250 | 10 | 5000 | 20 | Active | Continuous (Howland current pump) |

[38] | from 20 to 2000 | 4.8 (bat) | 300 | 40 | Active | Switched (H-bridge) |

[39] | from 10 to 500 | 3.1 (bat) | 200 | 60 | Passive | Switched |

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© 2024 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Nordi, T.M.; Gounella, R.; Amorim, M.L.M.; Luppe, M.; Junior, J.N.S.; Afonso, J.L.; Monteiro, V.; Afonso, J.A.; Talamoni Fonoff, E.; Colombari, E.;
et al. A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS). *J. Low Power Electron. Appl.* **2024**, *14*, 28.
https://doi.org/10.3390/jlpea14020028

**AMA Style**

Nordi TM, Gounella R, Amorim MLM, Luppe M, Junior JNS, Afonso JL, Monteiro V, Afonso JA, Talamoni Fonoff E, Colombari E,
et al. A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS). *Journal of Low Power Electronics and Applications*. 2024; 14(2):28.
https://doi.org/10.3390/jlpea14020028

**Chicago/Turabian Style**

Nordi, Tiago Matheus, Rodrigo Gounella, Marcio L. M. Amorim, Maximiliam Luppe, João Navarro Soares Junior, Joao L. Afonso, Vitor Monteiro, Jose A. Afonso, Erich Talamoni Fonoff, Eduardo Colombari,
and et al. 2024. "A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)" *Journal of Low Power Electronics and Applications* 14, no. 2: 28.
https://doi.org/10.3390/jlpea14020028