# A CMOS Multiplied Input Differential Difference Amplifier: A New Active Device and Its Applications

^{1}

^{2}

^{3}

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## Abstract

**:**

## 1. Introduction

## 2. A Multiplied Input Differential Difference Amplifier

_{z}= V

_{X}× V

_{Y}× k, V

_{o}= V

_{z}− V

_{n}+ V

_{p}, where k (given by technological constants and dimensions of key transistors in internal structures) can be expressed using:

_{Pn}= 136 μA/V

^{2}, K

_{Pp}= 29 μA/V

^{2}, V

_{thn}= 0.6 V, and V

_{thp}= −0.62 V, for NMOS and PMOS in this I3T CMOS technology. The multiplying constant k was obtained from the detailed analysis of the MLT subpart. The first term of (1) represents the contribution of auxiliary linearization and attenuation blocks (components including M

_{X1,2}and M

_{Y1,2}with resistors R

_{a}and R

_{b}, as visible from Figure 2). The second term of (1) covers the effect of differential pairs of the multiplying core (transistors M

_{1–4}and M

_{5–6}and their aspect ratios), and the conversion of the output current of these transistors, to the differential output voltage of the R

_{L}resistors. The last term (right side of (1)) includes the contribution of boosting the output transconductance amplifier (aspect ratio of M

_{7,8}and 4I

_{bias}

_{1}, derived from I

_{bias}

_{1}through biasing current mirrors, see Figure 2). Constant 5 represents the effect of the current gain of internal mirrors on the boosting transconductance amplifier. Note that a hand calculation of k yields a value of about −2 mA/V

^{2}, whereas a simulation provides a value of about −1.8 mA/V

^{2}(note that the multiplier is inverting in basic configuration). This mismatch is caused by several inaccuracies in the ideal calculation: (a) a non-equal bulk and source voltage V

_{BS}≠ 0 V for some transistors (differential pairs where bulk terminals are connected to V

_{DD}or V

_{SS}), which impacts the V

_{th}and transconductance of partial specific transistors; (b) the rounding of resistor values (exact value supposes multiplication of 0.975 kΩ/square); (c) a process and temperature dependence of K

_{P(n,p}

_{)}, as well as partial transconductances of CMOS transistors in proposed topology. The real experimental value of the k parameter equal to −1.3 mA/V

^{2}, falls into the range of the predicted values from Monte Carlo and corner analyses. The CMOS structure of the MIDDA element, including W/L aspect ratios of all the transistors, values of passive elements, and biasing sources, are shown in Figure 2. Note that not all ESD precautions and bulk connections (NMOS to V

_{SS}, PMOS to V

_{DD}) are included in Figure 2, because of simplicity.

_{Y}) and output current (I

_{Z}), are shown in Figure 3a; V

_{X}serves as the DC constant, driving overall transconductance (in accordance to g

_{m}≅ 1.3 × 10

^{−3}V

_{X}). The gain bandwidth (GBW) of the real prototype overcomes 48 MHz for the MLT subpart of the MIDDA (Figure 3b). The sweep of voltage V

_{X}between ±0.05 and ±0.5 V, causes a change in g

_{m}between ±60 μS and ±660 μS (both polarities of g

_{m}are available by the DC control voltage, in comparison to a standard operational transconductance amplifier [1]), as illustrated by a graph shown in Figure 4. The DC input and output linear range of VDDB reaches approximately ±700 mV (range is valid for inputs z, n, p, and output o), as shown in Figure 5a. The bandwidth (3 dB) of the VDDB part is 45.1 MHz or more, based on the particular configuration (see Figure 5b). Full, detailed information relating to the overall MIDDA performance is summarized in Table 1, including the results of the real experiments. It always covers the whole range of tunability for the controllable parameters. Even in the case when characteristics are asymmetrical in positive and negative corners, i.e., limits of linearity in positive and negative polarity are not symmetrical. Note that the ranges mentioned above are valid when symmetrical operation is required, i.e., absolute values of parameters are the same in both polarities in the case of the ranges mentioned above, which are the most useful in practice.

_{z}as a nonlinear parabolic function of the input voltages V

_{X}= V

_{Y}= V

_{inp}. This behaviour can be confirmed in the time domain (Figure 6b), where sine wave excitation creates output current with single polarity (negative due to negative k) and double frequency. Figure 6c,d provide an overview of the linear operation in time domain. The first figure represents the summation V

_{o}= V

_{p}+ V

_{z}(Figure 6c), and the second figure provides the results of the operation of subtraction V

_{o}= V

_{p}− V

_{n}(Figure 6d). In both cases, square-wave excitations were provided in order to also present the stability of the device. All of these results confirm VDDB functionality, as well as transient responses for sine wave excitation (Figure 6e). All accompanying details are included in Figure 6.

_{m}(k × V

_{X}= g

_{m}), for example, the MIDDA usually operates in the linear applications. Nonlinear applications require a multiplier—both inputs (Y and X) are used for signal operations, as in the case of the AM modulator, for example.

## 3. Application Examples

#### 3.1. Simple Linear Applications (Linear Operation)

_{X}input voltage serves for DC control of transconductance g

_{m}= k × V

_{X}, in Figure 7a labeled as V

_{gm}). The second input Y serves as a signal input. Then, the input voltage V

_{inp}transforms through the g

_{m}, to the output current from terminal z of the MLT subpart, and the external resistive load (R) provides a conversion of the current, back to voltage. The VDDB subpart serves as a simple voltage follower. The most important benefit of this application is its simple and immediate ability to change the polarity and value of the voltage gain by DC control voltage, very high input impedance, low output impedance, and a single grounded external passive component. The ideal value for the voltage gain of this amplifier can be determined as:

_{gm}(see Figure 7).

#### 3.2. Simple Nonlinear Application (Nonlinear Operation)

_{m}(t) has an amplitude of V

_{m}= 200 mV, with a frequency of f

_{m}= 500 kHz connected to input Y, as an example. The carrier signal v

_{c}(t), with an amplitude of V

_{c}= 250 mV, and a frequency of f

_{c}= 5 MHz, feeds into the input terminal X and auxiliary terminal p, simultaneously. A description of the operation will now be given (also shown in Figure 9b). The modulating wave signal v

_{m}(t) is multiplied with the carrier wave v

_{c}(t), and their product is available at the z terminal of the MLT subpart, in the form of voltage (after conversion of output current from the z terminal, to voltage, through the grounded resistor R). Following this, the VDDB subpart creates a summation of the carrier wave v

_{c}(t) with the product from the MLT subpart. The output voltage of the modulator is available in the simple form:

_{m}(t) is the general (waveform shape) modulating signal and v

_{c}(t) = V

_{c}cos(ω

_{c}t) represents the carrier wave. For the sine wave, we can rewrite (6) to:

_{m}and V

_{c}(Figure 10a) reaches 25% (m = (V

_{o}

_{(max)}− V

_{o(min)})/(V

_{o}

_{(max)}+ V

_{o}

_{(min)}) × 100). A measured output spectrum is shown in Figure 10b. It can be seen that suppression of the closest spurious higher harmonics is above 47 dB. Overall power consumption of the MIDDA-based modulator is only 17 mW. Note that if the MIDDA is designed using more up-to-date technology (CMOS technology smaller than 0.35 µm), its power consumption is lower, however, its dynamic range available for signal processing is also significantly decreased. Therefore, the selection of a particular technology represents a trade-off that has to be accepted.

## 4. Discussion

_{1}and Y

_{2}terminals is available at X terminal). It may serve for the electronic control of voltage gain (A) between the Y and X terminals. However, as we stated in the introductory part of this paper, the MMCC does not simultaneously provide the results of multiplication in the form of current, and the summation/subtraction operations. Therefore, these limitations further complicate the implementation of the device in building blocks and applications discussed in this paper (for example in the case of the AM-DSB modulator).

## 5. Conclusions

## Acknowledgments

## Author Contributions

## Conflicts of Interest

## References

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**Figure 1.**Multiplied input differential difference amplifier (MIDDA) behavioural principles and subparts: (

**a**) Symbol and internal sub-sections, ideal transfers; (

**b**) Overview of the layout of cells (Cadence) of the fabricated prototype (0.31 mm

^{2}).

**Figure 3.**Measured characteristics of MLT (multiplier) with current output section in direction V

_{Y}→I

_{Z}(V

_{X}used for driving the transconductance by DC constant): (

**a**) DC transfers; (

**b**) AC magnitude responses.

**Figure 6.**A comparison of the simulated and measured examples of MIDDA nonlinear and linear basic operations: (

**a**) MLT subpart DC transfer response of I

_{z}at z terminal for V

_{X}= V

_{Y}, i.e., squaring function; (

**b**) MLT subpart transient output response I

_{z}at z terminal; (

**c**) VDDB subpart transient response of V

_{o}at terminal o for summation V

_{o}= V

_{p}+ V

_{z}of two square waveforms; (

**d**) VDDB subpart transient response of V

_{o}at terminal o for subtraction V

_{o}= V

_{p}− V

_{n}of two square waveforms; (

**e**) VDDB subpart transient response of V

_{o}at terminal o for subtraction V

_{o}= V

_{p}− V

_{n}of two sine waveforms (measured only).

**Figure 7.**Simple applications of a proposed MIDDA having voltage-controlled transfers in both polarities: (

**a**) Voltage-controlled voltage amplifier; (

**b**) Voltage-controlled lossless integrator.

**Figure 8.**Simple application of a proposed MIDDA in a first-order high-pass filter with adjustable pole frequency.

**Figure 9.**Simple nonlinear application of a proposed MIDDA—AM-DSB modulator: (

**a**) circuit implementation; (

**b**) explanation of operation of modulation.

**Figure 10.**Example of measured output response of the AM-DSB modulator with 5 MHz carrier frequency and modulation depth m = 25%: (

**a**) time domain; (

**b**) frequency domain (output spectrum).

CMOS MLT Subpart | |
---|---|

Parameter/Transfer from→to | |

Small-Signal AC Transfer (GBW > 42 MHz) | |

g_{m (X→z)} (V_{Y} = 50→800 mV) | 45→974 μS |

g_{m (X→z)} (V_{Y} = −50→−800 mV) | −80→−2210 μS |

g_{m (Y→z)} (V_{X} = 50→800 mV) | 60→1030 μS |

g_{m (Y→z)} (V_{X} = −50→−800 mV) | −62→−1700 μS |

input DC dynamical range | |

X→z (V_{Y} = ±50→±500 mV) | −500→900 mV |

Y→z (V_{X} = ±50→±500 mV) | −600→900 mV |

harmonic distortion | |

THD_{X}_{→z} (1 kHz, V_{Y} = ±1000 mV) | 0.06%→1.08% (for V_{X} = 200→1000 mV_{pk-pk}) |

THD_{Y}_{→z} (1 kHz, V_{X} = ±1000 mV) | 0.08%→1.38% (for V_{Y} = 200→700 mV_{pk-pk}) |

input/output resistances | |

R_{X}_{_DC} (any value of V_{Y}) | 100 MΩ |

R_{Y}_{_DC} (any value of V_{X}) | 100 MΩ |

R_{z}_{_DC} (V_{Y} = 50→800 mV) | 1 MΩ→176 kΩ |

R_{z}_{_DC} (V_{Y} = −50→−800 mV) | 3 MΩ→140 kΩ |

R_{z_DC} (V_{X} = 50→800 mV) | 66 kΩ→5.2 kΩ |

R_{z_DC} (V_{X} = −50→−800 mV) | 107 kΩ→2.4 kΩ |

CMOS VDDB Subpart | |

small-signal AC transfer | |

K_{z}_{→O} [−] (−3 dB) | 1.02 (55 MHz) |

K_{n}_{→O} [−] (−3 dB) | 1.02 (62 MHz) |

K_{p}_{→O} [−] (−3 dB) | 1.01 (45 MHz) |

input dynamical range | |

z→o | −800→700 mV |

n→o | −700→700 mV |

p→o | −1600→1000 mV |

distortion | |

THD_{z}_{→o} | 0.04%→0.41% (for V_{z} = 100→1500 mV_{pk-pk}) |

THD_{n}_{→o} | 0.07%→0.33% (for V_{n} = 100→1500 mV_{pk-pk}) |

THD_{p}_{→o} | 0.03%→0.11% (for V_{p} = 100→1500 mV_{pk-pk}) |

input/output resistances | |

R_{z,n,p} | 100 MΩ |

R_{O} | 0.54 Ω |

**Table 2.**Comparison of recently reported electronically controllable advanced multi-terminal active devices (selected examples).

Work | Active Device | No. of Terminals ^{f} | No. of Controllable Parameters (Type) | MULTIPLICATIVE Inter-Terminal Relation Available | Device Fabricated as IC |
---|---|---|---|---|---|

[1,3,10,11,12] | CDTA ^{1} | 5 | 1 (g_{m}) ^{a} | No | Yes |

[13] | CCCDTA ^{2} | 4 | 3 (R_{p}, R_{n}, g_{m}) ^{b} | No | No |

[14] | MCDTA ^{3} | 8 | 2 (g_{m1}, g_{m2}) | No | No |

[15,16] | CCTA ^{4} | 4 | 1 (g_{m}) | No | Yes |

[17] | CCCCTA ^{5} | 4 | 2 (R_{X}, g_{m}) | No | No |

[18,19] | CFTA, ZC-CFTA ^{6} | 4 (5) | 1 (g_{m}) | No | No |

[4,20] | VDCC, ZC-CG-VDCC ^{7} | 6 (7) | 2 (R_{X}, g_{m}) 3 (R _{X}, g_{m}, B) ^{c} | No | Yes |

[21] | DO-VDBA ^{8} | 5 | 1 (g_{m}) | No | No |

FB-VDBA ^{9} | 6 | 1 (g_{m}) | |||

DO-CG-VDBVA ^{10} | 6 | 2 (g_{m}, A) ^{d} | |||

[22] | MCDU ^{11} | 5 | 4 (R_{p}, R_{n}, B_{1}, B_{2}) | No | No |

[23] | ZC-CCCFDITA ^{12} | 6 | 2 (R_{f}, g_{m}) | No | No |

[7,8] | VDDDA ^{13} | 6 | 1 (g_{m}) | No | No |

[5,6] | MMCC ^{14} | 4 | 1 (A) ^{e} | Yes | No |

this work | MIDDA | 6 | 1 (g_{m}) ^{e} | Yes | Yes |

^{1}Current Differencing Transconductance Amplifier (CDTA);

^{2}Current Controlled CDTA (CCCDTA);

^{3}Modified CDTA (MCDTA);

^{4}Current Conveyor Transconductance Amplifier (CCTA);

^{5}Current Controlled CCTA;

^{6}(Z-copy) Current Follower Transconductance Amplifier ((ZC)-CFTA);

^{7}(Z-copy Controlled-Gain) Voltage Differencing Current Conveyor (VDCC, (ZC-CG)-VDCC);

^{8}Dual Output Voltage Differencing Buffered Amplifier (DO-VDBA);

^{9}Fully Balanced VDBA (FB-VDBA);

^{10}Dual Output Controlled Gain Voltage Differencing Buffered Voltage Amplifier (DO-CG-VDBVA);

^{11}Modified Current Differencing Unit (MCDU);

^{12}Z-copy Current Controlled Current Followed Differential Input Transconductance Amplifier (ZC-CCCFDITA);

^{13}Voltage Differencing Differential Difference Amplifier (VDDDA);

^{14}Multiplication Mode Current Conveyor (MMCC);

^{a}transconductance (g

_{m});

^{b}electronically adjustable resistance of single current input terminal (R

_{X}, R

_{f}) or resistances of differential input terminals (R

_{p}, R

_{n});

^{c}electronically adjustable current gain (B);

^{d}electronically adjustable voltage gain (A);

^{e}available if one of the input voltages of the multiplier section is supposed as the DC constant (if necessary for linear inter-terminal operation);

^{f}terminals for DC control of parameters not included.

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**MDPI and ACS Style**

Sotner, R.; Jerabek, J.; Prokop, R.; Kledrowetz, V.; Polak, J.
A CMOS Multiplied Input Differential Difference Amplifier: A New Active Device and Its Applications. *Appl. Sci.* **2017**, *7*, 106.
https://doi.org/10.3390/app7010106

**AMA Style**

Sotner R, Jerabek J, Prokop R, Kledrowetz V, Polak J.
A CMOS Multiplied Input Differential Difference Amplifier: A New Active Device and Its Applications. *Applied Sciences*. 2017; 7(1):106.
https://doi.org/10.3390/app7010106

**Chicago/Turabian Style**

Sotner, Roman, Jan Jerabek, Roman Prokop, Vilem Kledrowetz, and Josef Polak.
2017. "A CMOS Multiplied Input Differential Difference Amplifier: A New Active Device and Its Applications" *Applied Sciences* 7, no. 1: 106.
https://doi.org/10.3390/app7010106