Resonant Asymmetrical Half-Bridge Flyback Converter

Abstract

The active clamp flyback (ACF) converter is gradually becoming popular in the application field of low or medium output power range due to its advantage of soft switching and high conversion efficiency. An asymmetric half-bridge (AHB) flyback converter has been proposed in previous studies. The main advantages of the AHB flyback are the same number of components as the ACF converter and the soft switching technique. In this paper, an AHB flyback converter with constant off-time (COT) plus pulse frequency modulation (PFM) is proposed, so that the resonant time is not affected by the input voltage and load, and can achieve a wide range of zero voltage switching (ZVS) operating range. Compared to pulse width modulation (PWM), the PFM control with COT can make the system more stable. Finally, a prototype circuit with a specification input of 48 V to an output of 2.5 V/8 A is made for verification.

1. Introduction

The flyback converter is widely used in the low to medium output power range because of the advantages of fewer circuit components and simple control. Compared with the LLC converter, the flyback converter requires fewer components, but the switching voltage stress of the flyback converter is higher than that of the LLC converter. The voltage stress of the main switch of the flyback converter is the input voltage plus the reflection voltage and spike voltage. The snubber circuit is added to switches of the flyback converter to reduce the voltage surge. However, the voltage stress of an LLC converter is only equal to the input voltage, so low-voltage components can be used. The advantage of flyback converter over LLC converter is the wide input voltage and the simple control method, so that no pre-stage voltage regulator is required. Although the research in [1,2] provides the input voltage range with wide variation range of switching frequency, it also results in efficiency reduction and EMI problems. The multi-level approaches proposed in [3,4,5,6,7,8,9,10,11] make LLC converters extend the operating voltage range, but still have the problems of the number of components, complex structure, and difficult control, so as to make it difficult to balance cost and performance. Based on the reasons above, the flyback-based topologies are still attractive solutions.

To increase conversion efficiency, more technologies have been added to the conventional flyback converter, such as quasi-resonance (QR) [12,13,14,15] or active clamping [16,17,18,19] to achieve zero-voltage switching (ZVS) and reduce switching loss. Synchronous rectification (SR) [20,21] can also be applied to reduce the conduction loss and further improve the conversion efficiency. The difference in the number of components between the active clamp flyback (ACF) converter and the LLC converter is that the ACF converter needs only a single secondary SR switch, which is the cost advantage of the ACF converter.

The asymmetric half-bridge (AHB) flyback converter has been proposed in previous studies [20,21,22,23,24,25,26,27,28,29], whose main advantage is that the number of components is the same as that of ACF converter, and it also provides the same voltage stress on the switching elements as the LLC converter with ZVS turn-on. Most studies of AHB flyback converters adopt pulse width modulation (PWM) control.

However, previous researches in [20,21,22,23,24,25,26,27] suggest that PWM should not be used because T_off of PWM mode varies with the input voltage and load condition to affect the ZVS operation range. In [28], the AHB flyback converter is unstable with the PWM control method. The article [20,30] proposes a resonant AHB flyback, which provides a ZVS function on its switches. However, the efficiency at light load and dynamic response are not mentioned.

The resonant high step-down converter [31], shown in Figure 1, is proposed with constant off-time (COT) and pulse frequency modulation (PFM), which is verified with a wide range of ZVS operations. In this paper, a resonant AHB flyback converter with COT control is proposed as shown in Figure 2 to improve the ZVS operation. A prototype with a specification input of 48 V to output 2.5 V/8 A is made to verify that the concept is feasible.

2. Proposed Circuit Configuration

As shown in Figure 2, the proposed circuit consists of half-bridge switches Q₁ and Q₂, a SR switch Q₃, resonant capacitor C_r, and coupling inductor L with magnetizing inductance L_m, leakage inductor L_r, and windings N₁ and N₂. The proposed circuit adopts the combinational control method of QR and COT [31], which is suitable for a converter with low voltage gain and high output current. Figure 3 shows the waveforms of each point of the circuit. The proposed circuit has 8 states, as shown in Figure 4.

Before entering the following behavior description, the definitions of the resonance tanks are listed as (1) to (8). In addition, the i_N2(0) and the i_ds2(0) are both supposed as 0 A at t₀, respectively. The inductance of L_m is assumed to be much higher than the inductance of L_r, so i_Lm can be considered a constant current source.

$$Z_1=\sqrt{\frac{L_m+L_r}{C_r}},$$

(1)

$${\omega }_{r1}=\frac{1}{\sqrt{C_r\left(L_m+L_r\right)}},$$

(2)

$$Z_2=\sqrt{\frac{L_m+L_r}{C_r+\left(C_{oss1}+C_{oss2}\right)}}=\sqrt{\frac{L_m+L_r}{C_r+2\cdot C_{oss2}}},$$

(3)

$${\omega }_{r2}=\frac{1}{\sqrt{\left(C_r+\left(C_{oss1}+C_{oss2}\right)\right)\left(L_m+L_r\right)}}=\frac{1}{\sqrt{\left(C_r+2\cdot C_{oss2}\right)\left(L_m+L_r\right)}},$$

(4)

$$Z_3=\sqrt{\frac{L_r}{C_r}},$$

(5)

$${\omega }_{r3}=\frac{1}{\sqrt{C_r\cdot L_r}},$$

(6)

$$Z_4=n^2\cdot \sqrt{\frac{L_r}{C_{oss3}}},$$

(7)

$${\omega }_{r4}=\frac{1}{\sqrt{C_{oss3}\cdot L_r}},$$

(8)

2.1. State 1 (t₀ − t₁)

During this interval, Q₁ is turned on, and Q₂ and Q₃ are turned off. V_in charges C_r and magnetizes L_m to make i_Lm (i_Lm = i_Lr = i_Cr) rise. When Q₁ is turned off, it enters state 2.

$$\left(L_m+L_r\right)\cdot \frac{d{i}_{Lr}}{dt}=V_{in}-v_{Cr},$$

(9)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr}=i_{Lm},$$

(10)

$$i_{Lr}\left(t\right)=\frac{V_{in}-v_{Cr}\left(t_0\right)}{Z_1}\cdot \sin \left({\omega }_{r1}\left(t-t_0\right)\right)+i_{L_r}\left(t_0\right)\cdot \cos \left({\omega }_{r1}\left(t-t_0\right)\right),$$

(11)

$$v_{Cr}\left(t\right)=V_{in}-\left(V_{in}-v_{Cr}\left(t_0\right)\right)\cdot \cos \left({\omega }_{r1}\left(t-t_0\right)\right)+i_{Lr}\left(t_0\right)\cdot Z_1\cdot \sin \left({\omega }_{r1}\left(t-t_0\right)\right),$$

(12)

2.2. State 2 (t₁ − t₂)

During this interval, Q₁ is turned off, and Q₂ and Q₃ are turned off. The freewheeling current i_Lr of L_r charges C_r. Therefore, i_Lr is demagnetized to decrease. i_Lm is more than i_Lr. The partial i_Lm flows through winding N₁ and releases energy to winding N₂ to the output terminal with transformer behavior. i_Lr charges C_oss1 and discharges C_oss2, so v_ds1 rises and v_ds2 falls. At the same time, i_N2 discharges C_oss3 to make v_ds3 drop. The i_N2 flows through the body diode of Q₃, so v_ds3 is zero. i_Lm releases energy from winding N₁ to winding N₂ to the output terminal. When v_ds2 falls to zero, it enters state 3.

$$\left(L_m+L_r\right)\cdot \frac{d{i}_{Lr}}{dt}=v_{ds2}-v_{Cr},$$

(13)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr}=i_{Lm},$$

(14)

$$C_{oss1}\cdot \frac{d\left(V_{in}-v_{ds1}\right)}{dt}+C_{oss2}\cdot \frac{d{v}_{ds2}}{dt}=i_{Lm}=i_{Lr},$$

(15)

$$2\cdot C_{oss2}\cdot \frac{d{v}_{ds2}}{dt}=i_{Lm}=i_{Lr},$$

(16)

$$i_{Lr}=i_{Lm}+i_{N1}=i_{Lm}+i_{N2}\cdot \frac{N_2}{N_1},$$

(17)

$$i_{Lr}\left(t\right)=\frac{V_{in}-v_{Cr}\left(t_1\right)}{Z_2}\cdot \sin \left({\omega }_{r2}\left(t-t_1\right)\right)+i_{Lr}\left(t_1\right)\cdot \cos \left({\omega }_{r2}\left(t-t_1\right)\right),$$

(18)

$$v_{Cr}\left(t\right)=\left(V_{in}-v_{Cr}\left(t_1\right)\right)\frac{C_r+2C_{oss2}}{C_r}\cdot \left[1-\cos \left({\omega }_{r2}\left(t-t_1\right)\right)\right]+\left[\frac{i_{Lr}\left(t_1\right)}{{\omega }_{r2}\cdot 2C_r}\cdot \sin \left({\omega }_{r2}\left(t-t_1\right)\right)\right]+v_{Cr}\left(t_1\right),$$

(19)

$$v_{ds1}\left(t\right)=\left(V_{in}-v_{Cr}\left(t_1\right)\right)\frac{C_r+2C_{oss2}}{C_r}\cdot \left[1-\cos \left({\omega }_{r2}\left(t-t_1\right)\right)\right]+\left[\frac{i_{Lr}\left(t_1\right)}{{\omega }_{r2}\cdot 2C_{oss2}}\cdot \sin \left({\omega }_{r2}\left(t-t_1\right)\right)\right],$$

(20)

$$v_{ds2}\left(t\right)=V_{in}-v_{ds1}\left(t_1\right),$$

(21)

2.3. State 3 (t₂ − t₃)

During this interval, Q₁ and Q₃ remain off, and Q₂ is turned on. The freewheeling current i_Lr charges C_r. i_Lr is demagnetized and drops. i_Lr charges C_oss1 to V_in, while C_oss2 is discharged to zero. i_Lr and i_N2 flow through the body diodes of Q₂ and Q₃, so v_ds2 and v_ds3 are 0, respectively. At this time, Q₂ and Q₃ are turned on with the ZVS function. However, in order to avoid triggering Q₃ by mistake, the SR control IC turns on Q₃ after a short time delay. i_Lm transmits energy through the winding N₁ to the winding N₂ to the output terminal. When v_ds3 falls to zero, it enters state 4.

$$\left(L_m+L_r\right)\cdot \frac{d{i}_{Lr}}{dt}=-v_{Cr},$$

(22)

$$L_m\cdot \frac{d{i}_{Lm}}{dt}=-n\cdot V_O,$$

(23)

$$L_r\cdot \frac{d{i}_{Lr}}{dt}=n\cdot V_O-v_{Cr},$$

(24)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr},$$

(25)

$$i_{Lr}\left(t\right)=\frac{n\cdot V_O-v_{Cr}\left(t_2\right)}{Z_3}\cdot \sin \left({\omega }_{r3}\left(t-t_2\right)\right)+i_{Lr}\left(t_2\right)\cdot \cos \left({\omega }_{r3}\left(t-t_2\right)\right),$$

(26)

$$v_{Cr}\left(t\right)=n\cdot V_O-\left(n\cdot V_O-v_{Cr}\left(t_2\right)\right)\cdot \cos \left({\omega }_{r3}\left(t-t_2\right)\right)+i_{Lr}\left(t_2\right)\cdot Z_3\cdot \cos \left({\omega }_{r3}\left(t-t_2\right)\right),$$

(27)

2.4. State 4 (t₃–t₄)

During this interval, Q₂ and Q₃ remain on, and Q₁ is turned off. After the default delay time, the SR control IC turns Q₃ with ZVS turned on. i_Lr still is demagnetized and drops when the freewheeling current i_Lr charges C_r. The stored energy of L_m is released from the winding N₁ to the winding N₂ to the output terminal. When the polarity of i_Cr is changed from positive to negative, it enters state 5.

$$i_{N_2}=\frac{N_1}{N_2}\cdot i_{N1}=\frac{N_1}{N_2}\cdot \left(i_{Lr}-i_{Lm}\right),$$

(28)

$$\left(L_m+L_r\right)\cdot \frac{d{i}_{Lr}}{dt}=-v_{Cr},$$

(29)

$$L_m\cdot \frac{d{i}_{Lm}}{dt}=-n\cdot V_O,$$

(30)

$$L_r\cdot \frac{d{i}_{Lr}}{dt}=n\cdot V_O-v_{Cr},$$

(31)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr},$$

(32)

$$i_{Lr}\left(t\right)=\frac{n\cdot V_O-v_{Cr}\left(t_3\right)}{Z_3}\cdot \sin \left({\omega }_{r3}\left(t-t_3\right)\right)+i_{Lr}\left(t_3\right)\cdot \cos \left({\omega }_{r3}\left(t-t_3\right)\right),$$

(33)

$$v_{Cr}\left(t\right)=n\cdot V_O-\left(n\cdot V_O-v_{Cr}\left(t_3\right)\right)\cdot \cos \left({\omega }_{r3}\left(t-t_3\right)\right)+i_{Lr}\left(t_3\right)\cdot Z_3\cdot \cos \left({\omega }_{r3}\left(t-t_3\right)\right),$$

(34)

2.5. State 5 (t₄ − t₅)

During this interval, Q₁ remains on, and Q₂ and Q₃ remain off. L_r is demagnetized to reduce i_Lr to zero gradually. C_r magnetizes L_r reversely in the third quadrant to increase i_Lr and releases energy to output terminal via winding N₂. Additionally, v_Cr discharges and falls. When Q₂ is turned off, it enters state 6.

$$i_{N2}=\frac{N_1}{N_2}\cdot i_{N1}=\frac{N_1}{N_2}\cdot \left(i_{Lr}-i_{Lm}\right),$$

(35)

$$\left(L_m+L_r\right)\cdot \frac{d{i}_{Lr}}{dt}=-v_{Cr}$$

(36)

$$L_m\cdot \frac{d{i}_{Lm}}{dt}=-n\cdot V_O,$$

(37)

$$L_r\cdot \frac{d{i}_{Lr}}{dt}=n\cdot V_O-v_{Cr},$$

(38)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr},$$

(39)

$$i_{Lr}\left(t\right)=\frac{n\cdot V_O-v_{Cr}\left(t_4\right)}{Z_3}\cdot \sin \left({\omega }_{r3}\left(t-t_4\right)\right)+i_{Lr}\left(t_4\right)\cdot \cos \left({\omega }_{r3}\left(t-t_4\right)\right),$$

(40)

$$v_{Cr}\left(t\right)=n\cdot V_O-\left(n\cdot V_O-v_{Cr}\left(t_4\right)\right)\cdot \cos \left({\omega }_{r3}\left(t-t_4\right)\right)+i_{Lr}\left(t_4\right)\cdot Z_4\cdot \cos \left({\omega }_{r3}\left(t-t_4\right)\right),$$

(41)

2.6. State 6 (t₅ − t₆)

During this interval, Q₁ remains off. Q₃ remains on. Q₂ is turned off. After Q₂ is turned off, the freewheeling current i_Lr charges C_r, then i_Lr is demagnetized and reduced. i_Lr discharges C_oss1 to decrease v_ds1, and i_Lr charges C_oss2 to raise v_ds2 gradually. During this interval, C_r discharges, so v_Cr falls.

$$L_m\cdot \frac{d{i}_{Lm}}{dt}=-n\cdot V_O,$$

(42)

$$L_r\cdot \frac{d{i}_{Lr}}{dt}=n\cdot V_O-v_{Cr}-\left(-n\cdot V_O\right)-v_{ds1},$$

(43)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr},$$

(44)

$$C_{oss2}\cdot \frac{d{v}_{ds2}}{dt}+C_{oss1}\cdot \frac{d\left(V_{in}-v_{ds1}\right)}{dt}=i_{Lr},$$

(45)

$$2\cdot C_{oss2}\cdot \frac{d{v}_{ds2}}{dt}=i_{Lr},$$

(46)

$$v_{Cr}\left(t\right)=\left(n\cdot V_{in}-v_{Cr}\left(t_5\right)\right)\frac{C_r+2C_{oss2}}{C_r}\cdot \left[1-\cos \left({\omega }_{r2}\left(t-t_5\right)\right)\right]+\left[\frac{i_{Lr}\left(t_5\right)}{{\omega }_{r2}\cdot 2C_r}\cdot \sin \left({\omega }_{r2}\left(t-t_5\right)\right)\right]+v_{Cr}\left(t_5\right),$$

(47)

$$v_{ds1}\left(t\right)=\left(n\cdot V_{in}-v_{Cr}\left(t_5\right)\right)\frac{C_r+2C_{oss2}}{C_{oss2}}\cdot \left[1-\cos \left({\omega }_{r2}\left(t-t_5\right)\right)\right]+\left[\frac{i_{Lr}\left(t_5\right)}{{\omega }_{r2}\cdot 2C_{oss2}}\cdot \sin \left({\omega }_{r2}\left(t-t_5\right)\right)\right],$$

(48)

$$i_{Lm}\left(t\right)=i_{Lm}\left(t_5\right)-\frac{n\cdot V_O}{L_m}\left(t-t_5\right),$$

(49)

$$i_{Lr}\left(t\right)=\frac{n\cdot V_{in}-v_{Cr}\left(t_5\right)}{Z_2}\cdot \sin \left({\omega }_{r2}\left(t-t_5\right)\right)+i_{Lr}\left(t_5\right)\cdot \cos \left({\omega }_{r2}\left(t-t_5\right)\right),$$

(50)

2.7. State 7 (t₆ − t₇)

During this interval, Q₁ is turned on. Q₃ remains on. Q₂ remains off. i_Lr discharges C_oss1 to reduce v_ds1 to zero. Thus, C_oss2 is charged and v_ds2 gradually rises to V_in. During this state, Q₁ is turned on with the ZVS function. When v_ds1 falls to zero, it enters state 8.

$$L_m\cdot \frac{d{i}_{Lm}}{dt}=-n\cdot V_O,$$

(51)

$$L_r\cdot \frac{d{i}_{Lr}}{dt}=V_{in}-v_{Cr}-\left(-n\cdot V_O\right),$$

(52)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr},$$

(53)

$$i_{Lm}\left(t\right)=i_{Lm}\left(t_6\right)-\frac{n\cdot V_O}{L_m}\left(t-t_6\right),$$

(54)

$$i_{Lr}\left(t\right)=\frac{n\cdot V_{in}-v_{Cr}\left(t_6\right)+n\cdot V_O}{Z_2}\cdot \sin \left({\omega }_{r2}\left(t-t_6\right)\right)+i_{Lr}\left(t_6\right)\cdot \cos \left({\omega }_{r2}\left(t-t_6\right)\right),$$

(55)

$$v_{Cr}\left(t\right)=\left(V_{in}-v_{Cr}\left(t_6\right)+n\cdot V_O\right)\left[1-\cos \left({\omega }_{r2}\left(t-t_6\right)\right)\right]+\left[i_{Lr}\left(t_6\right)\cdot Z_2\cdot \cos \left({\omega }_{r2}\left(t-t_6\right)\right)\right]+v_{Cr}\left(t_6\right),$$

(56)

2.8. State 8 (t₇ − t₀ − T_s)

During this interval, Q₁ and Q₃ remain on. Q₂ is turned off. When i_Lr is demagnetized to zero, V_in magnetizes L_r to increase i_Lr positively. C_r is also charged to raise v_Cr. Since i_Lr is the sum of i_Lm and i_N1, both v_N1 and v_N2 are higher than zero when i_Lr is higher than i_Lm. C_oss3 is charged to increase v_ds3 from zero. Once v_ds3 is positive and detected by the SR control IC, which turns Q₃ off immediately. Due to L_m >> L_r and C_r >> C_oss3, L_m and C_r do not resonate with L_m and C_r. Therefore, it only needs to consider the resonant operations of L_r and C_oss3. L_r and C_oss3 resonate for half a cycle to raise v_ds3. When v_ds3 is charged to (v_N2 + V_O), it returns to state 1.

$$\left(L_m+L_r\right)\cdot \frac{d{i}_{Lr}}{dt}=V_{in}-v_{Cr},$$

(57)

$$C_r\cdot \frac{d{v}_{Cr}}{dt}=i_{Lr}=i_{Lm},$$

(58)

$$L_r\cdot \frac{d{i}_{Lr}}{dt}=V_{in}-v_{Cr}-\left(-n\cdot V_O\right),$$

(59)

$$i_{Lm}\left(t\right)=i_{Lm}\left(t_7\right)-\frac{n\cdot V_O}{L_m}\left(t-t_7\right),$$

(60)

$$i_{Lr}\left(t\right)=\frac{V_{in}-v_{Cr}\left(t_7\right)+n\cdot V_O}{Z_4}\cdot \sin \left({\omega }_{r4}\left(t-t_7\right)\right)+i_{Lr}\left(t_7\right)\cdot \cos \left({\omega }_{r4}\left(t-t_7\right)\right),$$

(61)

$$v_{ds3}\left(t\right)=i_{N2}\left(t\right)\cdot Z_4=n\cdot \left(i_{Lr}\left(t\right)-i_{Lm}\left(t_7\right)\right)\cdot Z_4,$$

(62)

$$v_{Cr}\left(t\right)=\left(V_{in}-v_{Cr}\left(t_7\right)+n\cdot V_O\right)\left[1-\cos \left({\omega }_{r4}\left(t-t_7\right)\right)\right]+\left[i_{Lr}\left(t_7\right)\cdot Z_4\cdot \cos \left({\omega }_{r4}\left(t-t_7\right)\right)\right],$$

(63)

The formulas for Q₁ and Q₂ to achieve ZVS turn-on are shown as (64):

$$\frac{1}{2}{L}_r\cdot i_{Lr}{\left(t_5\right)}^2\ge \frac{1}{2}\left(C_{oss1}+C_{oss2}\right)V_{in}^2=\frac{1}{2}\left(2C_{oss2}\right)V_{in}^2=2C_{oss2}\cdot V_{in}^2,$$

(64)

The calculation of output current can be expressed as (68).

$$i_{N2}=n\cdot i_{N1},$$

(65)

$$i_{N1}=i_{Lr}-i_{Lm},$$

(66)

$$i_{N2\left(Toff\right)}=n\cdot {\displaystyle {\int }_{t_6}^{t_1}\left(i_{Lr}-i_{Lm}\right)}\cdot dt,$$

(67)

$$I_O=i_{N2\left(avg\right)}=\frac{n}{T_{Sw}}\cdot {\displaystyle {\int }_{t_6}^{t_1}\left(i_{Lr}-i_{Lm}\right)}\cdot dt,$$

(68)

3. Design Considerations

Figure 5 shows the structure of the prototype circuit, where the feedback compensator is the digital PID-based controller [31,32,33] with the peak current mode. The digital compensator is implemented with the field programmable gate array (FPGA) chip.

Table 1. Specification of the prototype circuit.

Symbol	Definition
Vin	24 V~48 V
VO	2.5 V
IO	Rated 8 A
fsw	120 kHz~180 kHz

shows the system specifications and the component list. The design procedure is shown in Figure 6.

3.1. Design of Ideal D and T_on

First, the ideal duty cycle is obtained as (69) and (70) without considering the leakage inductance L_r. Then, the ideal V_Cr(24V) and V_Cr(48V) can be obtained as (71) and (72). The ideal values of T_on are shown in (73) and (74).

$$D=\frac{T_{on}}{T_{on}+T_{off}}=\frac{V_O}{V_{in}\cdot \frac{N_2}{N_1}},$$

(69)

$$D_{(24\mathrm{V})}=\frac{2.5 \mathrm{V}}{24 \mathrm{V}\cdot \frac{N_2}{N_1}}=20.8\%, D_{(48\mathrm{V})}=\frac{2.5 \mathrm{V}}{48 \mathrm{V}\cdot \frac{N_2}{N_1}}=10.4\%,$$

(70)

$$v_{Cr}=D\cdot V_{in},$$

(71)

$$V_{Cr\left(24\mathrm{V}\right)}=D_{\left(24\mathrm{V}\right)}\cdot V_{in}=5\mathrm{V}, V_{Cr\left(48\mathrm{V}\right)}=D_{\left(48\mathrm{V}\right)}\cdot V_{in}=5\mathrm{V},$$

(72)

$$T_{on}=\frac{V_O}{f_{sw}\cdot V_{in}\cdot \left(\frac{N_2}{N_1}\right)}$$

(73)

$$T_{on\left(24\mathrm{V}\right)}=\frac{V_O}{120 \mathrm{kHz}\cdot 24 \mathrm{V}\cdot \left(\frac{N_2}{N_1}\right)}=1.736 \mathsf{\mu }\mathrm{s}, T_{on\left(48\mathrm{V}\right)}=\frac{V_O}{180 \mathrm{kHz}\cdot 48\mathrm{V}\cdot \left(\frac{N_2}{N_1}\right)}=0.579 \mathsf{\mu }\mathrm{s},$$

(74)

3.2. Design of Ideal L_m of the Coupled Inductor

The turns ratio of the coupled inductor L and the maximum flux density B_max are defined to be 2:1 and 0.1 T, respectively. Then, the turns of L can be designed according to the given information of B_max and core material. Then, the ideal windings of L are calculated as (75) to (77). The ideal magnetizing inductance L_m is calculated in (78). However, the leakage inductance L_r is highly relative to its geometry structure. The value of L_r is measured after the coupled inductor L of the prototype is made.

$$N=\left(V_{Lm}\right)\cdot \frac{T_{on}}{B_{\max }\cdot A_e},$$

(75)

$$N_{(24\mathrm{V})}=\left(V_{(24\mathrm{V})}-V_{Cr(24\mathrm{V})}\right)\cdot \frac{T_{on(24\mathrm{V})}}{B_{\max }\cdot A_e}=14.93,$$

(76)

$$N_{(48\mathrm{V})}=\left(V_{(48\mathrm{V})}-V_{Cr(48\mathrm{V})}\right)\cdot \frac{T_{on(24\mathrm{V})}}{B_{\max }\cdot A_e}=11.26,$$

(77)

$$L_m={14}^2\cdot A_L=18.82 \mathsf{\mu }\mathrm{H},$$

(78)

3.3. Measurement of L_m and L_r

The coupled inductor L of the prototype is measured with an LCR meter, and the values of L_m and L_r are obtained as 18.2 μH and 1.9 μH, respectively. The values of D, T_on, and T_off can be recalculated according to [22] as (79) to (82).

3.4. Calculation of Actual D, T_on and T_off

The T_on, T_off, D, and the voltage gain can be reprensented as (79), (76), (81), and (82), respectively.

$$T_{on}=\frac{V_O\left(T_{on}+T_{off}\right)\left(\frac{L_m+L_r}{L_m}\right)}{V_{in}\cdot \frac{N_2}{N_1}}=\frac{V_O\left(T_S\right)}{V_{in}\cdot \frac{N_2}{N_1}}\left(\frac{L_m+L_r}{L_m}\right)=\frac{V_O}{f_{sw}\cdot V_{in}\cdot \frac{N_2}{N_1}}\left(\frac{L_m+L_r}{L_m}\right)=1.547 \mathsf{\mu }\mathrm{s},$$

(79)

$$T_{off}=\frac{1}{f_{sw}}-\frac{V_O}{f_{sw}\cdot V_{in}\cdot \frac{N_2}{N_1}}\left(\frac{L_m+L_r}{L_m}\right)=5.12 \mathsf{\mu }\mathrm{s},$$

(80)

$$D=\frac{T_{on}}{T_{on}+T_{off}}=\frac{V_O\left(\frac{L_m+L_r}{L_m}\right)}{V_{in}\cdot \frac{N_2}{N_1}},$$

(81)

$$\frac{V_O}{V_{in}}=D\cdot \left(\frac{L_m}{L_m+L_r}\right)\cdot \frac{N_2}{N_1},$$

(82)

3.5. Determination of T_r, C_r and f_sw

The current i_Lr can discharge and charge C_oss1 and C_oss2, respectively. To extend the effect of ZVS turn-on to light load as much as possible, it is better to design T_off to be T_r/4 so as to obtain i_Lr at its maximum point. The maximum frequency designed at 180 kHz with C_r as 4.45 μF and 5.06 μF for input voltages of 48 V and 24 V, respectively.

$$T_r=\frac{1}{2\pi \sqrt{C_r\cdot L_r}},$$

(83)

$$C_r=\frac{1}{L_r{\left(2\pi \cdot T_r\right)}^2},$$

(84)

$$T_r=4\cdot T_{off}=20.48 \mathsf{\mu }\mathrm{s},$$

(85)

$$C_r=\frac{1}{L_r\cdot {\left(2\pi \frac{1}{T_r}\right)}^2}=5.059 \mathsf{\mu }\mathrm{F},$$

(86)

Finally, C_r is chosen to be a 4.7 μF MLCC. Then, f_sw is recalculated to obtain 179 kHz and 155 kHz at input voltages of 24 V and 48 V, respectively.

$$D_{\left(24\mathrm{V}\right)}=\frac{V_O\left(\frac{L_m+L_r}{L_m}\right)}{V_{in}\cdot \frac{N_2}{N_1}}=23.2\%,$$

(87)

$$D_{\left(48\mathrm{V}\right)}=11.6\%,$$

(88)

$$T_{on\left(24\mathrm{V}\right)}=\frac{V_O\left(\frac{L_m+L_r}{L_m}\right)}{f_{sw}\cdot V_{in}\frac{N_2}{N_1}}=1.491 \mathsf{\mu }\mathrm{s},$$

(89)

$$T_{on\left(48\mathrm{V}\right)}=0.648 \mathsf{\mu }\mathrm{s},$$

(90)

$$f_{sw(24\mathrm{V})}=\frac{1}{T_{on(24\mathrm{V})}+T_{off(24\mathrm{V})}}=155.63 \mathrm{kHz},$$

(91)

$$f_{sw(48\mathrm{V})}=179.1 \mathrm{kHz},$$

(92)

3.6. Determination of Q₃

Q₃ is a synchronous rectifier, which always has a ZVS turn-on function without considering switching loss. The minimum rated voltage of Q₃ can be expressed as (94). To reduce conduction loss, the AON6500 is adopted with drain-source resistance of 0.95 mΩ and a rated voltage of 30 V.

$$V_{Cr}=\left(1+\frac{L_r}{L_m}\right)\left(\frac{N_1}{N_2}\right)V_O\approx 5.5\mathrm{V},$$

(93)

$$v_{ds3}=\left(V_{in}-V_{Cr}\right)\left(\frac{L_m}{L_m+L_r}\right)\left(\frac{N_2}{N_1}\right)+V_O\approx 21.6\mathrm{V},$$

(94)

3.7. ZVS Operation of Q₁ and Q₂

The ZVS operation of Q₁ and Q₂ is needed to satisfy the condition in (95) when in state 5. From (96), it can be seen that more i_Lr can result in ZVS turn-on. However, the output capacitance of a MOSFET is nonlinear and varies with v_ds. Consequently, it is not easy to obtain an accurate result from calculations in (96) and (97).

$$\frac{L_r{\left(i_{Lr\left(\mathrm{pk}\right)}\right)}^2}{2}\ge \frac{\left(C_{oss1}+C_{oss2}\right){\left(V_{in}\right)}^2}{2}$$

(95)

$$i_{Lr\left(\mathrm{pk}\right)}\ge \sqrt{\frac{\left(C_{oss1}+C_{oss2}\right){\left(V_{in}\right)}^2}{L_r}},$$

(96)

$$L_r{\left(\frac{i_{Lr\left(\mathrm{pk}\right)}}{V_{in}}\right)}^2\ge \left(C_{oss1}+C_{oss2}\right),$$

(97)

Table 2. Key components information of the prototype circuit.

Part Number	Component Information
Q1, Q2	AON7246, 60 V, 15 mΩ (Alpha & Omega Semiconductor, Sunnyvale, CA, USA)
Q3	AON6500, 30 V, 0.95 mΩ (Alpha & Omega Semiconductor, Sunnyvale, CA, USA)
Cr	4.7 μF/50 V/1206(Murata)
Lm of L	N1:N2 = 14:7; AL = 96 nH/N2; Ae = 22.1 mm2; Le = 50.9 mm C055200A2 (Magnetics Inc., Pittsburgh, PA, USA) 18.25 μH@100 kHz 18.15 μH@150 kHz
Lr of L	1.854 μH@100 kHz 1.954 μH@150 kHz
Half bridge driver	HIP2101(Renesas, Tokyo, Japan)
CO	470 μF/16 V FPCAP(Nichicon, Kyoto, Japan)
Cin	390 μF/63 V(Chemicon, Tokyo, Japan)
SR driver	MP6905(Monolithic Power Systems, Kirkland, WA, USA)
Controller	EP3C5 FPGA (Intel/Altera, Santa Clara, CA, USA)
DAC	TLV5637 (Texas Instruments, Dallas, TX, USA)

is the list of the key components in the prototype circuit.

4. Experimental Results

Figure 7 shows the experimental setup blocks of the system test.

Figure 8a shows the measured result of the conversion efficiency. The prototype can achieve better efficiency at lower input voltages and more load currents. This prototype circuit is based on COT control, so the controller increases T_on and reduces f_sw as the load increases. When the input voltage decreases, T_on also increases. Figure 8b shows the frequency curve with variation of load current and input voltage. Since the previous calculation does not take the parasitic effect of individual components into consideration, the actual switching frequency is lower than the theoretical calculation result. The results of f_sw at high input voltage and low input voltage at light load are 148 kHz and 129 kHz, respectively. Finally, the variation range Δf_sw of f_sw can be calculated as ±16.7%, which is much less than the results of ±95.4% in [1] and ±100% in [2], respectively.

$$\Delta f_{sw}=\pm \frac{f_{\max }-f_{\min }}{2\cdot f_{\min }}=\pm \frac{148 \mathrm{kHz}-110 \mathrm{kHz}}{2\cdot 110 \mathrm{kHz}}=\pm 16.7\%,$$

(98)

Figure 9 and Figure 10 show the measured waveforms of v_gs1, v_ds1, v_gs2, and v_ds2 for different input voltages of 24 V and 48 V at 10%, 50%, and 100% load, respectively. They show that higher input voltage induces more parasitic capacitance energy of the switch and lower i_Lr under the same load, so it is not easy to achieve the complete ZVS turn-on. However, the switches turned-on at the lowest v_ds still reduce the switching loss. As the load increases, i_Lr rises to expand the voltage range of ZVS turn-on. When the output load is more than 40% of the rated load, ZVS turn-on is also achieved at the high voltage input.

Figure 11 and Figure 12 show the measured waveforms of v_gs1, v_gs2, v_Cr, and i_Lr for different input voltages of 24 V and 48 V at 10%, 20%, 50%, and 100% load, respectively. The variation of i_Lr and v_Cr at different input voltages is not significant. However, i_Lr and v_Cr increase significantly with the rising load.

Figure 13 and Figure 14 show the waveforms of v_gs1, v_gs2, v_ds3, and i_N2 for different input voltages of 24 V and 48 V at 10%, 20%, 50%, and 100% load, respectively. The more i_N2 is, the higher v_ds3 becomes. This is the driving mechanism of MP6905 SR IC, which controls the conduction resistance of MOSFET Q₃ at a fixed interval, so that v_ds3 remains at −32 mV.

Figure 15 shows the measurement results of the phase margin (PM) and gain margin (GM) under different load and different input voltage conditions, and the effect of increasing load on PM and GM is not significant under the same input voltage. Under the same load, the change of input voltage can cause the PM and GM to deteriorate. The detailed results are shown as

Table 3. Measured results of phase margin and gain margin.

Test Condition	Phase Margin	Gain Margin	Crossover Frequency
10% load at input 24 V	74.2°	15.5 dB	3.01 kHz
Full load at input 24 V	74.4°	16.8 dB	2.59 kHz
10% load at input 48 V	47.2°	10.3 dB	4.38 kHz
Full load at input 48 V	73.5°	13.6 dB	3.28 kHz

. According to [34,35], the experimental results of GM of 6 dB and PM of 45° can make sure the closed-loop system is stable.

Figure 16 shows the experimental results of the load transient response. v_CF is the current reference of the inner current-loop controller. V_o(AC) and v_Cr(AC) are the ac coupled signals from V_o and v_Cr to enlarge the ripple waveforms, respectively. Due to the weak sampling rate and the memory depth of the oscilloscope, the waveforms are measured with significant glitch. The measured results show the close loop response is stable under load transient at different input voltages.

Table 4. Comparison of the proposed method and other topologies.

Item	Proposed AHB Flyback	Conventional AHB Flyback	LLC	ACF
Active switch Primary side/secondary side	2/1	2/1	2/2	2/1
Modulation	PFM	PWM	frequency modulation	PWM
Voltage stress on switches	medium	medium	medium	high
Input voltage range	medium	narrow	narrow	medium
ZVS range at light load (without burst mode)	good	medium	medium	medium
Frequency variation range	medium	constant	high	constant
Output ripple current	high	high	medium	high

shows the comparison of the proposed and other topologies. Figure 17 shows the photographs of the power stage of the proposed prototype, not showing the part of the controller. Q₁~Q₃ and SR IC are soldered to the PCB in an upside-down placement, and only the bottom of the components can be seen externally. There is a buck module to power the FPGA control board.

5. Conclusions

This paper proposes an AHB flyback converter derived from a resonant high step-down converter. For applications with wide input voltage range, this circuit features the same low stress on all active switches as an LLC converter with fewer components and less frequency variation than an LLC converter. Compared to the ACF converter, the proposed AHB flyback has a similar wide input voltage range with ZVS turn-on, but lower voltage stress on all active switches. Finally, the system performance and stability are verified with the prototype circuit.