# Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of a High-Power-Density PFC Boost Converter

^{*}

## Abstract

**:**

## 1. Introduction

## 2. PFC Converter Total Harmonic Distortion (THD) and Power Factor (PF)

_{vs}is the voltage angle and θ

_{is}is current angle for the input supply.

_{s}_

_{rms}) for the PFC converter can be expressed as

_{dc}is the average current component and n is the harmonic order. When n = 1, I

_{1_rms}is the fundamental component of the supply input current. With an ideal voltage source that offers voltage only at the fundamental frequency (Vs_

_{rms}= V

_{1_rms}), the converter input average power (P

_{avg}) can be calculated as

## 3. Telecom AC/DC PFC Boost Converter Operation Principle and Design

_{b}); the switching elements, represented by high voltage switch (Q

_{b}); high-speed switching diode (D

_{b}); and the output filtering capacitor C

_{b}.

_{b}) is closed, as shown in Figure 4a, the current flows through the energy storage element (L

_{b}) in the direction marked by the red dotted line. At this moment, the energy is storage in the inductor, generating a magnetic field. When Q

_{b}is opened, as shown in Figure 4b, the current circuit impedance increases, thereby reducing the current, and the magnetic field previously created is reduced to maintain the current toward the load, as also marked by the red dotted line. Thus, the polarity of the inductor voltage is reversed, which places the two sources in series, providing a higher voltage to charge the capacitor (C

_{b}) through the high-speed switching diode (D

_{b}).

_{b}) was designed based on the specified circuit ripple current (%Ripple) and the corresponding input and output voltage conditions [29]. PFC control circuits are usually designed to offer good performance for a wide range of input AC voltage (85–265 V). Using these design specifications, L

_{b}can be calculated as

_{Lb Max}) is determined based on the specified maximum current ripple [29] as expressed in

_{s}

_{min}is the minimum supply voltage’s root mean square (RMS) value, V

_{o}is the rated output DC voltage, η is the converter designed efficiency, P

_{o}is the output rated power, and F

_{sw}is the switching frequency.

_{rpp}is the output voltage ripple peak-to-peak value. Additionally, the bulk output capacitor should be designed to offer the minimum voltage hold up with the specified time (t

_{hold}), as expressed in

## 4. Design of the Proposed PFC Boost Converter Control Systems

_{o}) of the PFC converter to the reference value and to generate the voltage error signal, which is modified with the input sinusoidal voltage (V

_{in}) to generate the reference current (I

_{ref}) value for the inner control loop, as depicted in the control blocks in Figure 6. The inner loop is used to make the inductor current (I

_{Lb}) track the refence current (I

_{ref}); the inductor current is the DC value of the input supply current, so that any distortion in the inductor current will affect in the sinusoidal shape of the input supply current.

#### 4.1. PFC Boost Converter Average Small-Signal Modeling

_{Lb}) can be expressed as:

_{Cb}) can be expressed as

_{o}is the output bus voltage (V

_{o}= V

_{bus}), and R is the load resistance in ohms.

_{o}) and the inductor current (I

_{Lb})

_{.}

#### 4.2. Design of the Outer Voltage Loop

_{CLV}(s)) can be obtained as

_{Pv}and K

_{Iv}can be designed using Equation (31) and the standard form of the second order system TF by selecting the optimal stability criteria for the control system bandwidth and the undamped natural frequency. Usually, the bandwidth of the outer voltage loop must be very small to eliminate the harmonics of the DC bus voltage reflected by the AC input voltage at 60 Hz [8].

_{n}) was assumed to be about 85 rad/s and the undamped natural frequency (ξ) was about 0.707. For the reliable operation of a controller with a wide loading range, the PI controller parameters were set to work with the minimum value of the load voltage (V

_{o}) of 320 V and the rated input supply voltage (V

_{s}) of 220 V

_{rms}. Using these values, the closed-loop TF of the outer voltage control loop finally can be expressed as

#### 4.3. Design of the Inner Current-Control Loop

_{sw}) to reject the noise at the switching frequency. Using the small signal model of the boost converter obtained in Equation (18), the open-loop TF of the inductor current control system G

_{i}(s) can be expressed as

_{min}= 0.40, the open loop roots r

_{1,2}= −6.97 ± 826.82i, and at D

_{max}= 0.95, r

_{1,2}= −6.97 + 68.55i. Varying the duty cycle from 0.4 to 0.95, the real part of the roots is usually negative; at constant value of about −6.97, only the imaginary parts change with the different values of the converter duty cycle, in which the current system of the CCM-PFC converter is absolutely stable in open loop with the operating range of the converter duty cycle (D).

_{Pi}and K

_{Ii}are the proportional and integral gains for the PI current controller, respectively.

_{sw}) was selected as about 100 kHz in this work, for high frequency analysis, the capacitor can be shorted, and the open-loop TF of the inductor current system in Equation (35) can be simplified as

## 5. Design and Implementation of the Isolated Voltage Sensors

_{1}and R

_{2}and the isolation amplifier (IC

_{1}) to offer isolation between the high-voltage power circuit and the low-voltage control circuit. The second stage is the operational amplifier (IC

_{2}) circuit, which is used to adjust the sensor voltage to the required value based on its operation mode.

_{1}) in the first stage, the values of resistors R

_{1}and R

_{2}can be designed as

_{p_Max}is the maximum primary voltage of the isolation amplifier and can be easily known from the datasheet of the chosen isolation amplifier (IC1). Then, by choosing the value of R

_{1}, the value of R

_{2}can be calculated from Equation (46). An AMC1311 isolation amplifier from Texas instruments (TI) with a primary voltage range of about 2 V and unity voltage gain was used in the designed sensor, which provides galvanic isolation up to 7 kV, low offset error, very low nonlinearity of less than 0.03%, and is inexpensive (about USD 3), which provides a highly reliable and economic design of isolated voltage sensing [32].

_{s_Max}is the maximum secondary voltage of the isolation amplifier and can be calculated using

_{3}value, the value of the resistance R

_{4}can be easily calculated using Equation (47).

_{offset}) was used to remove the negative voltage part from the sensed voltage to ensure the range of the DSP MCU input specification (0 to 3 V), as shown in the waveform of the input–output waveforms in Figure 22.

## 6. Simulation Results and Discussion

_{rms}, 60 Hz) and full load condition of P

_{o}= 2500 W and V

_{bus}= 400 V, Figure 24 shows the waveform of the inductor current (I

_{Lb}) with the reference current (Iref) for the PI current controller. We observed distortion at the inductor current around the zero-crossing point due to the slow dynamic response of the PI controller and the failing of the inductor current (I

_{Lb}) to track the reference current (I

_{ref}).

_{Lb}) at the zero-crossing point caused current distortion in the supply current (I

_{supply}), as shown in Figure 25, from which we can observe the zero-crossing distortion (ZCD) period was about 1.45 ms at the supply current.

_{supply}), as shown in the supply voltage–current waveforms in Figure 26.

_{rms}, 60 Hz) and full load condition of P

_{o}= 2500 W and V

_{bus}= 400 V, the IP digital controller was applied in the inner current-control loop to remove the distortion around the zero-crossing point. Figure 28 shows the waveform of the inductor current (I

_{Lb}) with the reference current (I

_{ref}) for the IP current controller. The inductor current (I

_{Lb}) was successfully able to track the reference current (I

_{ref}) and the ZCD significantly decreased.

## 7. Experimental Verification

## 8. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

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**Figure 2.**Supply voltage-current waveforms for PFC-boost converter with conventional PI current controller.

**Figure 28.**Waveforms of the inductor and reference currents with the proposed IP current controller.

**Figure 31.**Frequency spectrum of the supply current at full load with the proposed IP current controller.

**Figure 35.**Experimental waveforms of the supply voltage-current with the conventional PI controller.

**Figure 37.**Experimental waveforms of the supply voltage-current with the conventional PI current controller at 25% loading condition.

**Figure 38.**Experimental waveforms of the supply voltage-current with the proposed IP current controller at 25% loading condition.

Parameter | Specification | Unit |
---|---|---|

AC Input voltage (V_{s}) | 220 (85–265) | V rms |

AC Input frequency (F) | 60 (47–63) | Hz |

DC output voltage (V_{o}) | 400 (320–410) | V |

Rated power (P_{out}) | 2500 | W |

Switching frequency (F_{sw}) | 100 | kHz |

Input ripple current (%Ripple) | 10% | at full load |

output ripple voltage (V_{rpp}) | 20 | V__{peak to peak} |

Hold up time (t_{hold}) | 6 | ms |

Output capacitor (C_{b}) | 1120 | μF |

Boost converter inductor (L_{b}) | 470 | μH |

Parameter | With Conventional PI Controller | With Proposed IP Controller | ||||||
---|---|---|---|---|---|---|---|---|

Load condition (W) | 625 | 1250 | 1875 | 2500 | 625 | 1250 | 1875 | 2500 |

THD% | 34.80 | 26.50 | 21.39 | 19.37 | 30.20 | 20.70 | 11.00 | 5.23 |

PF% | 93.86 | 96.38 | 97.52 | 98.31 | 94.50 | 96.60 | 99.12 | 99.93 |

Power Losses (W) | 15.69 | 22.90 | 30.90 | 38.40 | 11.40 | 18.00 | 26.10 | 34.00 |

Efficiency% | 97.48 | 98.17 | 98.35 | 98.47 | 98.18 | 98.57 | 98.13 | 98.66 |

Component | Description/Part Number |
---|---|

Bridge Rectifier | GSIB2580 |

PFC Inductor (Lb) | 2 stacked cores (Kool Mμ), 60 windings 1.15 mm copper wire (500 μH) |

Switch (Qb) | IPW65R080 |

Output Capacitor (Cb) | KEMET ALA7DA561DE450 (2 X560 μF) |

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**MDPI and ACS Style**

Okilly, A.H.; Jeong, H.; Baek, J.
Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of a High-Power-Density PFC Boost Converter. *Appl. Sci.* **2021**, *11*, 539.
https://doi.org/10.3390/app11020539

**AMA Style**

Okilly AH, Jeong H, Baek J.
Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of a High-Power-Density PFC Boost Converter. *Applied Sciences*. 2021; 11(2):539.
https://doi.org/10.3390/app11020539

**Chicago/Turabian Style**

Okilly, Ahmed H., Hojin Jeong, and Jeihoon Baek.
2021. "Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of a High-Power-Density PFC Boost Converter" *Applied Sciences* 11, no. 2: 539.
https://doi.org/10.3390/app11020539