# Modification of Cockcroft–Walton-Based High-Voltage Multipliers with 220 V and 50 Hz Input for Non-Thermal Food Processing Apparatus

^{1}

^{2}

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Proposed Modification

_{1}and T

_{2}are the ‘on’ periods of the first and second clock signals, respectively, and T = T

_{1}+ T

_{2}is the period of clock signals. The parameters V

_{in}and V

_{out}= V

_{po}− V

_{no}are the input peak value and the output peak value, respectively, V

_{po}is the positive output, and V

_{no}is the negative output. In order to convert the 220 V and 50 Hz input into the DC output between 3.5 and 4.0 kV, the step-up gain of three proposed HVMs is set to 14. Each proposed HVM is designed to provide two amplification stages. The gains of the first and second amplification stages are equal to 2 and 7, respectively.

_{po}, V

_{no}, and V

_{out}of all proposed HVMs, where V

_{th}denotes the forward threshold voltage of the diode. It is seen that the voltage outputs of the HVM-A and HVM-B are most affected by the diode switch non-idealities, whereas the voltage outputs of the HVM-C are less affected by the diode switch non-idealities. However, neglecting the small voltage V

_{th}will cause the high DC output V

_{out}of the three proposed HVMs to closely rise to 14V

_{in}. Hence, the step-up gain of 14 can be achieved.

## 3. Theoretical Analysis

_{SC}, and an output load R

_{L}. To save space, only the analysis of the proposed HVM-A is described in detail under the following assumed conditions.

- (1)
- The dielectric loss is not considered.
- (2)
- The time constant of the proposed HVM-A is greater than the time period of clock pulses.
- (3)
- The input is a rectangular waveform.

_{ri}and State-T

_{mi}(i = 1, 2) are shown in Figure 3a–d, respectively. The diode switch is represented as an ideal diode, an on-resistance (R

_{d}), and a voltage source (V

_{th}), while the transistor switch is modeled by the on-resistance (R

_{on}). In steady state, the differential values of electric charges in C

_{0pk}(k = 1, 2), C

_{1pq}, C

_{2pq}(q = 1, 2, 3, 4), and C

_{1nr}, C

_{2nr}(r = 1, 2) can be written as

_{ri}and State-T

_{mi}, respectively, and the time interval of clock pulses satisfies the following conditions:

_{r}depends on the frequency of the AC input V

_{in}, and the time interval T

_{m}depends on the switching frequency for driving the transistor switch. Therefore, the relationship of differential values of electric charges in the input and output terminals ($\Delta {q}_{{T}_{r1}},{V}_{in}^{1}$, $\Delta {q}_{{T}_{r2}},{V}_{in}^{1}$, $\Delta {q}_{{T}_{m1}},{V}_{in}^{2}$, $\Delta {q}_{{T}_{m2}},{V}_{in}^{2}$, $\Delta {q}_{{T}_{r1}},{V}_{o}^{}$, $\Delta {q}_{{T}_{r2}},{V}_{o}^{}$, $\Delta {q}_{{T}_{m1}},{V}_{po}^{}$, $\Delta {q}_{{T}_{m2}},{V}_{po}^{}$, $\Delta {q}_{{T}_{m1}},{V}_{no}^{}$, and $\Delta {q}_{{T}_{m2}},{V}_{no}^{}$) for the symmetrical circuit structure in State-T

_{ri}and State-T

_{mi}can be expressed as

_{1}and M

_{2}of Figure 2 are equal to 2 and 7, respectively. Thus, the consumed energy W

_{T}in one period of State-T

_{ri}and State-T

_{mi}can be expressed as

_{T}and the internal resistances R

_{SC}

_{1}and R

_{SC}

_{2}of the four-terminal equivalent model under the defined conditions can respectively be obtained as

_{SC}can be calculated as

_{out}, the output power P

_{out}, and the power (or voltage) efficiency η for the proposed HVM-A of Figure 1a can be approximated to

_{out}and P

_{out}as well as the power efficiency η are affected by the resistance values of R

_{d}, R

_{on}, and R

_{L}. The instantaneous equivalent circuits of the proposed HVM-B and HVM-C are depicted in Figure 4 and Figure 5, respectively. The theoretical analysis procedures for these two modified schemes follow the same analysis steps of the proposed HVM-A. The theoretical analysis results for comparing the internal resistance R

_{SC}of each modified scheme in the case of the step-up gain of 14 are summarized in Table 2.

## 4. Simulation Results

_{in}= 220 V and 50 Hz, T

_{1}= T

_{2}= 100 µs, R

_{on}= 1 Ω, and C

_{out}= 100 µF. The results obtained from the simulations using SPICE and calculations using (14) are shown in Figure 6, Figure 7 and Figure 8.

_{L}in the range of 0.01−1000 kΩ. In the case of setting R

_{L}= 5 kΩ, the simulated (calculated) values of the power efficiency of the proposed HVM-A, HVM-B, and HVM-C are approximately equal to 79.73% (80.19%), 93.85% (94.31%), and 92.16% (92.62%), respectively. In order to obtain the power efficiency greater than 80%, the values of R

_{L}for the HVM-A, HVM-B, and HVM-C should be greater than 6, 2, and 2 kΩ, respectively.

_{L}, shown in Figure 9, was selected to generate the target output voltage, such as 3.5 kV. From Figure 9a, the HVM-A can generate an output voltage of 3.55 kV within 600 ms when setting R

_{L}= 6 kΩ. The HVM-B can produce the output voltage of 3.69 kV within 200 ms in the case of R

_{L}= 2 kΩ, as shown in Figure 9b. From Figure 9c, the HVM-C can produce the output voltage of 3.58 kV within 1.8 s for setting R

_{L}= 5 kΩ. The traditional half-wave CWM [16] can generate an output voltage of 3.55 kV within 190 s for R

_{L}= 1500 kΩ, as illustrated in Figure 9d. It is obvious that the HVMs with different schemes can convert the 220 V and 50 Hz input into the DC output to have more than 3.5 kV within different settling time periods. This implies that the response speed values of the proposed HVMs and the traditional CWM [16] are different.

## 5. Discussion and Conclusions

_{SC}, which is in good agreement with the results shown in Table 2. By considering in terms of size of the circuit, the proposed HVM-C can be realized by using the smallest number of components. However, the settling time of the HVM-C is slower than that of HVM-A and HVM-B because the frequency of the input source is fixed at 50 Hz.

## Author Contributions

## Funding

## Conflicts of Interest

## References

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**Figure 1.**Modified schemes of three proposed high-voltage multipliers (HVMs): (

**a**) HVM-A; (

**b**) HVM-B; (

**c**) HVM-C.

**Figure 3.**Instantaneous equivalent circuits of HVM-A: (

**a**) State-Tr

_{1}; (

**b**) State-Tr

_{2}; (

**c**) State-Tm

_{1}; (

**d**) State-Tm

_{2}.

**Figure 4.**Instantaneous equivalent circuits of HVM-B: (

**a**) State-Tr

_{1}; (

**b**) State-Tr

_{2}; (

**c**) State-Tm

_{1}; (

**d**) State-Tm

_{2}.

**Figure 5.**Instantaneous equivalent circuits of HVM-C: (

**a**) State-Tr

_{1}; (

**b**) State-Tr

_{2}; (

**c**) State-Tm

_{1}; (

**d**) State-Tm

_{2}.

**Figure 9.**Simulated output voltages: (

**a**) HVM-A; (

**b**) HVM-B; (

**c**) HVM-C; (

**d**) Cockcroft–Walton multiplier (CWM) [16].

Modified Scheme | V_{po} | −V_{no} | V_{out} |
---|---|---|---|

HVM-A | V_{po} = 10V_{in} − 11V_{th} | −V_{no} = 4V_{in} − 4V_{th} | V_{out} = 14V_{in} − 15V_{th} |

HVM-B | V_{po} = 10V_{in} − 11V_{th} | −V_{no} = 4V_{in} − 4V_{th} | V_{out} = 14V_{in} − 15V_{th} |

HVM-C | V_{po} = 10V_{in} − 6V_{th} | −V_{no} = 4V_{in} − 3V_{th} | V_{out} = 14V_{in} − 9V_{th} |

Modified Scheme | Step-Up Gain | R_{SC} |
---|---|---|

HVM-A | 14 | 114R_{d} + 1144R_{on} |

HVM-B | 14 | 114R_{d} + 132R_{on} |

HVM-C | 14 | 8R_{d} + 392R_{on} |

Modified Scheme | 1st Multiple Block | 2nd Multiple Block |
---|---|---|

HVM-A | Positive FWR | Parallel-Connected Positive CWM |

Positive VMB | Parallel-Connected Negative CWM | |

HVM-B | Positive/Negative HWRs | Parallel-Connected Positive CWM |

(AC-DC Rectifier) | Parallel-Connected Negative CWM | |

HVM-C | Positive/Negative VMBs | Positive CWM |

(SC AC-AC Converter) | Negative CWM |

Modified Scheme | Diode | Capacitor | Switch | Total |
---|---|---|---|---|

HVM-A | 18 | 16 | 8 | 42 |

HVM-B | 18 | 14 | 4 | 36 |

HVM-C | 8 | 8 | 4 | 20 |

Traditional CWM [16] | 14 | 14 | - | 28 |

Modified Scheme | Size | Internal Resistance | Response Speed | Efficiency |
---|---|---|---|---|

HVM-A | 4 | 4 | 2 | 3 |

HVM-B | 3 | 2 | 1 | 1 |

HVM-C | 1 | 3 | 3 | 2 |

Traditional CWM [16] | 2 | 1 | 4 | 4 |

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**MDPI and ACS Style**

Jaiwanglok, A.; Eguchi, K.; Smerpitak, K.; Julsereewong, A. Modification of Cockcroft–Walton-Based High-Voltage Multipliers with 220 V and 50 Hz Input for Non-Thermal Food Processing Apparatus. *Sustainability* **2020**, *12*, 6330.
https://doi.org/10.3390/su12166330

**AMA Style**

Jaiwanglok A, Eguchi K, Smerpitak K, Julsereewong A. Modification of Cockcroft–Walton-Based High-Voltage Multipliers with 220 V and 50 Hz Input for Non-Thermal Food Processing Apparatus. *Sustainability*. 2020; 12(16):6330.
https://doi.org/10.3390/su12166330

**Chicago/Turabian Style**

Jaiwanglok, Anurak, Kei Eguchi, Krit Smerpitak, and Amphawan Julsereewong. 2020. "Modification of Cockcroft–Walton-Based High-Voltage Multipliers with 220 V and 50 Hz Input for Non-Thermal Food Processing Apparatus" *Sustainability* 12, no. 16: 6330.
https://doi.org/10.3390/su12166330