Comparative Dynamic Performance Evaluation of Si IGBTs and SiC MOSFETs ^†

Abstract

Power semiconductor devices are fundamental components in modern electronic power conversion. In applications demanding high power density and efficiency, the choice between silicon (Si) IGBTs and Silicon Carbide (SiC) MOSFETs is critical. SiC MOSFETs, owing to their high critical electric field, superior thermal conductivity, wide band gap, and low power loss, realize significant performance improvements and compact design. This work presents a comprehensive, simulation-driven comparative investigation under identical setups, evaluating both technologies across various parameters. The effects of temperature variations on gate-source threshold voltage drift, current slew rate, device stress, and energy dissipation during switching transitions are evaluated. Furthermore, the characteristic switching behavior when the DC-bus voltage, gate resistance, and load current are varied is investigated. This study addresses a current scarcity of systematic investigation by presenting a comprehensive comparative evaluation of switching losses and efficiency across varied operating conditions, providing validated conclusions for the design of advanced WBG converters. The results demonstrate that SiC exhibits lower losses and faster switching speeds than Si IGBTs, with minimal temperature-dependent loss variations, unlike Si devices, whose losses rise significantly with temperature. Si shows distinct tail currents during turn-off, absent in SiC devices. A conclusive comparative evaluation of switching energy losses under varied operating conditions demonstrates that SiC devices can effectively retrofit Si counterparts for fast, low-loss, high-efficiency applications.

1. Introduction

In comparison with the material properties of Silicon (Si) IGBT, Silicon Carbide (SiC) MOSFET proves to be advantageous in having a Wide Band Gap (WBG) energy, a critical electrical field, and thermal conductivity. A higher electrical field enables the device to withstand higher voltages, reduce resistance, and achieve lower conduction loss [1,2,3]. The high thermal properties allow for a compact size due to their small cooling requirements and significantly improve the power density. Additionally, the SiC MOSFETs have various advantages, such as higher blocking voltage capability, higher switching frequency, higher voltage, and the ability to operate at relatively higher junction temperatures [4,5]. Moreover, SiC exhibits superior switching characteristics compared to its counterpart Si devices, which has an impact on the switching loss as well as the passive magnetic components utilized. Additionally, the technical maturity of the commercially available SiC-WBG devices acts as a catalyst for rapid and transformative advances in power electronics devices. This significantly affects power utility applications, as they are preferred, considering their high efficiency and frequency capability [6].

This work aims to investigate the differences in switching characteristics between Si and SiC MOSFET devices, including the various losses and the effects resulting from variation in parameters, such as parasitic effects and temperature fluctuations in both devices. Traditionally, Si-based power devices have dominated the power converter industry. However, with the increased penetration of renewable energies, efficient storage systems, and high-voltage DC systems, their theoretical limits have been saturated. The increased switching losses act as a hindrance when the device is operated at high frequencies and voltages [7]. Especially during the turn-off, since the majority carrier injected in the drift region during the forward conduction results in a tail current. This results in a very slow turn-off and high turn-off losses due to the absence of an intrinsic body diode in Si devices; a high reverse recovery current is needed, which leads to a high overshoot through the device during the turn-on, leading to a high loss during the turn-on process. With the limitations above, high-end power conversion devices are being sought. WBG devices become a better alternative and are thus given detailed attention. The premium in SiC enables higher temperature operation with a more dense system design [8]. Additionally, the SiC MOSFET on-state resistance has remarkably reduced, thus achieving an incredibly high current and voltage performance [9,10]. It is observed that the switching patterns of the SiC MOSFET are predictable, as it performs zero-voltage transitions. Again, the SiC devices do not have the turn-off tail currents and forward voltage drop during transitions. In addition, the device endures less stress and small ripple currents; thus, it exhibits better Electromagnetic Interference (EMI) performance and higher efficiency. Combining the excellent switching performance of SBD and the elevated switching speed of SiC devices results in the device working at higher frequencies in both soft and hard-switching converter technology, resulting in reduced active volume of passive elements, with ultimate compact converters [11,12,13,14,15].

Enhanced switching speed offers an advantage in reducing switching loss, minimizing the passive components, and decreasing the size of the heat sink, thereby achieving higher efficiency and frequency [16]. When the Si material properties are compared with their counterpart SiC, the latter exhibits numerous advantages in their high thermal conductivity value (i.e., 3× than that of Si), larger wide band gap values (i.e., 3× than that of Si), critical electrical field (i.e., 10× that of Si), low intrinsic carrier concentration, carrier mobility, higher breakdown electrical fields, higher thermal conductivity, larger saturation electric drift velocity (i.e., 2× that of Si), and higher radiation resistance, among others [4,17,18]. The comparison of these physical properties is shown in Figure 1 for Si and SiC.

However, despite the above-listed strong characteristics of the SiC MOSFET, full adoption remains a challenge. This is contributed to by the global chain manufacturing and module packaging still being relatively in the evolutionary stages. In comparison, Si technology is highly cost-optimized and highly standardized, mature technology. The theoretical benefits of SiC devices cannot be fully realized, as advanced packaging is still complex and costly, and partial discharge and thermal stress hinder total transition [19,20]. For the WBG devices, the fast switching transitions, despite being a merit, introduce higher $dv/dt$ and $di/dt$, which consequently exacerbate the common mode emissions in the conductive EMI frequency range, calling for expensive filtering requirements, compared to slower switching transitions in Si devices, which do not require expensive filtering [21,22]. In addition, the SiC device constitutes a smaller chip area in comparison with Si IGBTs with the same voltage-current ratings. This leads to high short-circuit current density as well as smaller heat capacity. Ultimately, the short-circuit withstand capability of the WBG devices is less than that of Si devices. This implies that the SiC devices’ gate failure in a short circuit or thermal runaway can be reached in a few microseconds [23]. The SiC, unlike Si devices, requires tighter gate voltage and current margins (−5 V/+18 V), and has a lower threshold voltage, $V_{gs,\left(th\right)}$ drift, and is highly susceptible to parasitic turn-on due to high $dv/dt$ [24,25]. Amongst other limitations, these factors render SiC less economically viable in comparison with Si in applications where premium performance is not required. Finally, the practical utilization of the SiC devices comes with the constraint of significantly higher gate drive complexity for EMI suppression [26] and rigorous layout optimization to mitigate inductance-induced voltage overshoots. These critical issues in SiC are less prevalent in Si since it is more robust [27].

Figure 1. Comparison of physical material properties of Si and SiC MOSFETs [18,28].

Figure 1. Comparison of physical material properties of Si and SiC MOSFETs [18,28].

Although the SiC device is more expensive than the mature Si technology devices, its high switching frequency makes it compact, thus requiring a small cooling system, which translates to lower total cost. However, due to their narrow Short-Circuit Safe Operation Area (SCSOA), they have shorter withstand times in comparison with the Si device; thus, their practical implementation necessitates a more stringent and fast protection method to mitigate the risk associated with their reduced thermal capacity during the fault period [29].

Despite the performance of the discrete SiC MOSFET being discussed in various publications, such as the authors of [30,31] did a comparison of thermal, $di/dt$, and $dv/dt$ and transient signals with similar parameters, few have considered the performance when various parameters are varied. This paper investigates the performance of the Wolfspeed C3M0075120D SiC MOSFET with a SiC Schottky Barrier Diode (SBD) module, comparing it with the Rohm RGC80TSX8R Si IGBT and a diode module, with an emphasis on performance and efficiency under variations in various parameters. Further, this paper will present a characterization of both the Si and SiC devices under static and dynamic switching states in different operating conditions. Their various performances under various operational conditions will be given.

The main contribution of this work is the presentation of an in-depth comparative evaluation and analysis of Si and SiC modules with similar related conditions and thermal characteristics. This comparison is based on the identical simulation platform, gate driver standards as close as possible, while being conducted at operating points that simulate industrial converters, which would be used when operating these devices. Therefore, this provides the most sought-after technical background information for selecting the right module over others, depending on specific application requirements. Additionally, the SiC power MOSFET has low on-state resistance $R_{ds\left(on\right)}$, which makes the device integration preferred due to lower losses and manageable thermal performance. With this, a stable temperature operation is observed, making the device operation very rugged while the mounting of the heat sink is applicable with possible low junction-to-case thermal resistance [17].

This paper is organized as follows: In Section 2, a comprehensive description of the inductive load Double Pulse Test (DPT) is provided, along with its commutation process. In Section 3, the dynamic characteristics of the transient signals and losses are presented and discussed. Section 4 presents the efficiency associated with the Si IGBT and SiC MOSFET devices, and finally, a brief discussion and conclusion are given.

2. Modeling Analysis of Si IGBT and SiC MOSFET

2.1. Circuit Modeling and Simulation Methodology

The evaluation of the dynamic behavior of the SiC and Si power devices, taking into consideration the accuracy and speed, involved a robust circuit simulation. The circuit comprises model parameters that can be extracted straightforwardly when the manufacturer’s data sheet is available. The model comprises intrinsic elements, such as the gate resistance, capacitance, and load currents, among others, to emulate the real switching conditions of the devices closely. The simulation setup configuration allows the extraction of the transition energy loss, conduction characteristics, influence of temperature, DC bus voltage, and load current on the devices. As a result of this, the LTspice Simulation Software V24.1.10 was used [32]. This modeling approach has merit in that it ensures a reliable correlation between the device parameters and their impact on the performance of the converter.

This study was critically evaluated using manufacturer-verified high-fidelity Spice models, which provide reliable insights into the switching transient behavior of the switching devices, closely presenting the actual physical Si and SiC devices’ evaluated behavior. Consequently, the simulation results provide a credible foundation for understanding the guiding practical design optimization, with future experimental verification.

2.2. The Double Pulse Test (DPT) Platform

Switching transient contributes the highest portion of losses at elevated frequency. To evaluate the performance of the Si and SiC devices, an inductive load Double Pulse Test (DPT) setup was designed and implemented in LTspice simulation software V24.1.10 to characterize the switching performance and losses during turn-on (turn-off) of the Si and SiC switching devices. In the foregoing studies, instead of using entirely different gate driver typologies, the tests for the two devices use a similar configuration with a few different key components to ensure uniformity. To maintain the level of stray inductance, devices with the same housing structure were chosen.

The circuit of the DPT is shown in Figure 2a. This is utilized in testing the switching behaviors of the switch devices during the turn-on and turn-off transitions [33,34,35]. The DPT comprises the power supply ($V_{dc}$), the gate drive circuitry, a supply voltage stabilizing capacitor during the test, the load inductor, and the free-wheeling diode. Figure 2b shows the basic ideal waveform for drain–current and drain–source voltage during the transition events.

Since semiconductor devices used in the tests have different gate drive characteristics, as noted from their respective manufacturers’ data sheets, the gate minimum/maximum drive voltage of SiC (gate–source voltage) and Si (gate–emitter voltage) are −8 V/+19 V and −30 V/+30 V, respectively. A gate driver with a maximum gate voltage source swing of −4 V/+15 V and −5 V/+20 V signals ensured that the switching devices were switching appropriately since the gate threshold voltage, $V_{gs\left(th\right)}$, is 2.5 V and 6.0 V for SiC and Si, respectively. The LTspice simulation was configured to calculate the average switching power dissipation over a period of $30\mu \mathrm{s}$, which corresponded to a switching frequency of 33.3 kHz. The high gate voltage, higher than the gate threshold voltage of the respective devices, ensured that there is no spurious triggering, which would otherwise lead to noise and parasitic coupling. The negative gate voltage during the device turn-off ensures reliable turn-off, and there is no spurious turn-on. SiC, having a higher gate drive voltage, can significantly minimize the conduction resistance; however, the switching speed does not change since it is determined by the gate resistance rather than the input maximum gate voltage. Both devices are equipped with internal resistors whose work is to prevent unwanted oscillations between the connected parallel chips in the module; unfortunately, these can not be altered or varied from the outside.

The external gate resistor is a good candidate to control the voltage overshoot, the switching speed, and the slew rate ($di/dt$) of the device, though this is not practical for all the values of the load current $I_L$. The selection of the gate resistance comes as a balance between ringing, overshoots, EMI, cross-talk effects, and switching loss. Thus, optimum gate resistance should be chosen for both gate drivers. It is noted that the SiC over-voltages result from the stray inductance of the device commutation loop and the switching speed. In contrast, for the Si, it comprises the peak forward voltage of the free-wheeling diode and the stray inductance on the device. The Si turn-off over-voltage comprises a high peak dynamic forward voltage, whereas SiC does not show dynamic forward voltage. When the stray inductance and overshoot voltage were the same, the SiC showed an ability to clear faster during the turn-off [36].

The main parameters of the Double Pulse Test (DPT) were introduced as follows: The main Device Under Test (DUT) is a commercially available SiC MOSFET from Wolf-speed C3M0075120D [37], in a TO-247-3 package, and a Discrete SiC Schottky Barrier Diode (SBD), also from Wolf-speed C4D20120A (1200V, 20A) in a TO-220-2 package. For comparison, a Rohm RGC80TSX8R Field Stop Trench IGBT in a TO-247N package was chosen [38]. The typical characterizing parameters, such as the input capacitance $C_{iss}$, output capacitance $C_{oss}$, and the reverse transfer capacitance, also known as the Miller Capacitance $C_{rss}$, of the modules used are listed in

Table 1. Comparison of data-sheet parameters for SiC MOSFET (C3M0075120D) and Si IGBT (RGC80TSX8R) at ${25}^{\circ }$C.

Parameter	Symbol	SiC MOSFET	Si IGBT	Unit
Name	–	C3M0075120D	RGC80TSX8R	–
Drain current/Conduction Current (25 °C)	$I_d$/$I_C$	32	40	A
Gate Drive Voltage	$V_{GS}$	−4/15	−30/30	V
Gate Threshold Voltage	$V_{th}$	2.5	6.0	V
On-State Resistance/Saturation voltage (20 A)	$R_{\mathrm{ds}\left(\mathrm{on}\right)}$/$V_{CES\left(sat\right)}$	80	2.2	m$\Omega$/V
Junction Temperature Range	$T_j$	−40∼175	−55∼150	°C
Input Capacitance	$C_{iss}$	1390	9550	pF
Output Capacitance	$C_{oss}$	33	115	pF
Reverse Transfer Capacitance	$C_{rss}$	2	102	pF
Total Gate Charge	$Q_g$	54	468	nC
Turn-on energy loss	$E_{on}$	Low	High	$\mu$J
Turn-off energy loss	$E_{off}$	Low	High	$\mu$J
Reverse recovery charge	$Q_{rr}$	Negligible	High	nC
Switching frequency range	$f_{sw}$	>200 kHz	<20 kHz	kHz

. Moreover, other details of the parameters of the Si and SiC devices used are listed. The gate change is indicated as $Q_g$ is 54 nC for the SiC and 468 nC for the Si device. The higher value of $Q_g$ in Si IGBT has a disadvantage in that it increases the cost of the gate driver, the driver power losses, and the component costs, besides driver complexity [39]. Moreover, eliminating the stored charges during the conduction-to-blocking transitions leads to a high reverse recovery current spike, voltage overshoot, and significant switching loss. Additionally, the internal gate resistance $R_{int}$ of the SiC and IGBT module is $9\Omega$ and $1.7\Omega$, respectively. A slightly higher value of $R_{int}$ acts as a limiter to the switching speed of the device. Manufacturers intentionally use a higher intrinsic gate resistance to dampen the gate oscillations associated with $di/dt$ and $dv/dt$ in SiC devices. Both devices are usually designed with internal gate resistance to ensure that the oscillations between the parallel-connected chips within the model are maintained as low as possible [36].

To ensure the simulation results accurately reflect the real environment setup and switching transient, stray inductance was included in the model. The PCB power loop lumped inductance was taken as 10 nH, and the gate loop parasitic inductance was 2 nH. Furthermore, to account for the discrete device package parasitic, the simulation included drain, source, and gate inductance of 5 nH, 2 nH, and 10 nH, respectively. The drain–source parasitic capacitance $C_{ds}$, gate–source parasitic capacitance $C_{gs}$, and gate–drain parasitic capacitance $C_{gd}$ used in the simulations were 84.5 pF, 1122.5 pF, and 7.5 pF, respectively.

The SiC-enhanced switching characteristics illustrate a significant switching loss reduction. Despite the Si’s ability to withstand low resistance and slightly higher voltage, the tail current significantly increases losses. In contrast, the SiC can withstand very high voltages, high switching speeds, and low on-state resistance, attributed to the significant WBG. It is remarkable to see that the time required for the convergence conditions is overwhelmingly faster in SiC than in Si devices. The extended time taken by Si devices contributes to the loss of energy. Additionally, the turn-on current through the device includes the diode recovery current, inbuilt or external, which is between the IGBT’s collector, and this contributes to the effects of diode recovery characteristics.

It is noted that a large value of $R_g$ prolongs the turn-on delay and current rise time but does not change the gate signal, as can be seen in Figure 3 and Figure 4. From these two figures, the device has been characterized under different operating conditions with $V_{dc}$ = 800 V and a varied gate resistance $R_g$. Specifically, the transient have been captured at $R_g$ = $5\Omega$, $10\Omega$, $15\Omega$, $20\Omega$, and $25\Omega$. Furthermore, as the value of $R_g$ is increased, the amount of energy lost increases. The gate resistance has a strong influence on the turn-on and turn-off energy dissipation. Smaller gate resistance implies a lower switching loss, though, on the other hand, very small gate resistance increases the device loss and current-voltage ridging. The summation of the energy loss indicates that the energy loss is proportional to the value of the gate resistance. Figure 5 points out that when the value of $R_g$ = $5\Omega$, the turn-on energy loss is 0.76 mJ and 1.03 mJ, and the turn-off energy loss is 0.45 mJ and 1.32 mJ for SiC and Si, respectively. Increasing the $R_g$ linearly increases the turn-on energy loss to 0.95 mJ and 2.24 mJ, while the turn-off energy increases to 0.70 mJ and 5.02 mJ for SiC and Si, respectively. A clear indication that the turn-off energy, especially in the Si device, is significantly high due to the tail current associated with its turn-off process, when the value of gate resistance $R_g$ is high. The other values of turn-on (turn-off) energy loss in the range of the different resistances are shown in

Table 2. Switching energy losses for SiC MOSFET (C3M0075120D) and Si IGBT (RGC80TSX8R) under different gate resistances.

${\mathit{R}}_{\mathit{g}}$ ($\mathbf{\Omega }$)	SiC MOSFET			Si IGBT
	Turn-on (mJ)	Turn-off (mJ)	Total Loss (mJ)	Turn-on (mJ)	Turn-off (mJ)	Total Loss (mJ)
5	0.7607	0.4570	1.2177	1.0335	1.3233	2.3568
10	0.8059	0.5183	1.3243	1.3292	2.3922	3.7214
15	0.8523	0.5804	1.4327	1.5708	3.3717	4.9425
20	0.9004	0.6421	1.5425	1.8885	4.2533	6.1418
25	0.9483	0.7044	1.6528	2.2411	5.0175	7.2586

.

Table 3. Switching behavior by changes in the gate resistor.

Parameter	Symbol	High Value of ${\mathit{R}}_{\mathit{g}}$	Small Value of ${\mathit{R}}_{\mathit{g}}$	Unit
Turn-on time	$t_{on}$	↑	↓	ns
Turn-off time	$t_{off}$	↑	↓	ns
Turn-on energy	$E_{on}$	↑	↓	mJ
Turn-off energy	$E_{off}$	↑	↓	mJ
Turn-on peak current	–	↓	↑	A
Turn-off peak current diode	–	↓	↑	A
Voltage slew rate	$\frac{dv}{dt}$	↓	↑	V/ns
Current slew rate	$\frac{di}{dt}$	↓	↑	A/ns
Voltage spike	–	↓	↑	V
EMI noise	–	↓	↑	–

“↑” denotes an increase and “↓” denotes a decrease in the considered parameter when transitioning from one condition to another(i.e., from high to low $R_g$).

below shows a summary of the effects associated with increasing and decreasing the value of gate resistance $R_g$ and the various influences on different parameters of typical SiC and Si devices during the turn-on (turn-off) switching transitions. As mentioned previously, it can be clearly deduced that when the value of $R_g$ is raised, the gate voltage transitions slow down, consequently increasing the turn-on (turn-off) transition time ($t_{on}$, $t_{off}$), ultimately leading to increased switching energy loss ($E_{on}$, $E_{off}$). The ultimate result is lowered current and voltage slew rates ($di/dt$, $dv/dt$), implying reduced voltage overshoots, reduced peak and recovery currents, and reduced EMI noise, which provides a safer, smoother switching process, though at the expense of efficiency. Notably, the converse is true for a smaller $R_g$.

A thorough comparison of Si IGBT modules and SiC MOSFET modules operated under the same conditions is shown in

Table 4. SiC MOSFET electrical parameters.

Characteristic	Symbol	Si MOSFET	SiC MOSFET
Switching Rate	$f_{sw}$	Slow	Fast
di/dt	${\displaystyle \frac{di}{dt}}$	Low	High
dv/dt	${\displaystyle \frac{dv}{dt}}$	Low	High
Switching Loss	$E_{sw}$	High	Low
Temperature Influence	T	Strong	Weak
Crosstalk	$X_{talk}$	Moderate	High
Tail Current	$I_{tail}$	Available	None
Overshoot Current vs. Load Current	$I_{os}$ vs. $I_{load}$	Exponential	Linear
Ability to control losses via $R_g$	$R_g$	Weak	Strong

. The SiC, as shown, achieves faster switching and higher slew rates, leading to lower losses and weaker temperature dependence compared to Si. Nonetheless, increasing the speed of operation raises noise and cross-talk [40].

2.3. The Switching Behavior of the Si IGBT and SiC MOSFET

Figure 6 and Figure 7 illustrate the quantified turn-on and turn-off switching behavior of the Si and SiC devices. To have a better visibility of this illustration, the two waveforms are placed on the same scale. These devices have been tested with input constants, which are the dc-link voltage source $V_{ds}$ = $800\mathrm{V}$, the output current, which is modeled as a constant current source $I_{ds}$, and the gate signal $V_{gate}$, which flips between −4 V and $V_{gs}$. In Figure 6, the SiC demonstrates a significantly faster voltage drop during turn-on, with a clean transition and minimal oscillations, in comparison with the Si device dynamic curve, which exhibits a slower voltage decrease and a delayed current rise due to higher gate resistance and minority carrier effects. The said delay contributes to significant switching losses in Si compared to SiC devices. Conversely, Figure 7 shows the turn-off dynamic characteristic, in which the SiC MOSFET shows a great performance against the Si IGBT. This is because the SiC exhibits rapid voltage recovery with minimal ringing, whereas the Si shows a pronounced tail current, which further increases turn-off switching losses. Generally, from the two figures, it is clearly observed that the SiC device showcases superior switching performances with reduced energy loss and enhanced dynamic switching characteristics, making it superior for high-efficiency and high-frequency operations.

Figure 8 is an illustration of a double pulse test transient for a Si IGBT. The green curve shows the $i_c$, and the blue shows the $V_{ce}$. Similarly, Figure 9 shows the transient of the SiC MOSFET device. The tests are carried out when both are under nominal design conditions, i.e., with the same value of gate resistance. The DPT transient was compared at a supply voltage of 800V. In the case of the SiC device, a small value of gate charge is required to switch on the device, and the low transconductance aids in eliminating the Miller plateau, which is observed in the Si devices. Additionally, the Si during the turn-off transitions has a visible current tail, which increases the current fall time, whereas the SiC device has a fast fall time, hence a lower transitional time. This transitions to a lower turn-off time in Sic in comparison with Si devices.

Figure 10 shows the ideal waveform of the devices during the switching transitions. $t_{ri}$ is the current rise time, $t_{fv}$ is the voltage fall time, $t_{tv}$ is the voltage rise time, and $t_{fi}$ is the current fall time. The region between the time $t_1$–$t_3$ shows the turn-on transition period, and $t_6$–$t_8$ shows the turn-off switching transition. $t_3$–$t_6$ is the period when the switch is on, where the drain–source voltage $V_{ds\left(on\right)}$ is minimum and the drain current $I_d$ is maximum. This region is signified by the conduction losses.

2.4. Modeling of the Switching Losses

When quantifying the power losses, the switching loss of the diode is usually neglected, since it is much smaller in comparison with the switching loss of both devices [41]. Although different switching devices are used in the evaluation, the loss computation methodology is identical. The loss prediction under a similar setup provides an accurate comparison of losses and performance, taking temperature effects into account. It was observed that the total switching energy losses in Si and SiC MOSFETs primarily consist of the turn-on ($E_{\mathrm{on}}$) and turn-off ($E_{\mathrm{off}}$) dissipated energy. These two added together give the total switching energy loss $E_{sw}$ expressed as Equation (1):

$$E_{sw}=E_{on}+E_{off}$$

(1)

With the energy loss during turn-on, denoted as $E_{on}$, can be calculated using Equation (2), and the $E_{off}$ is computed using Equation (3):

$$E_{on}={\int }_{t_1}^{t_3}{V}_{ds}\left(t\right)·I_d\left(t\right)dt$$

(2)

$$E_{off}={\int }_{t_6}^{t_8}{V}_{ds}\left(t\right)·I_d\left(t\right)dt$$

(3)

where $V_{ds}\left(t\right)$ is the drain–source voltage and $I_d\left(t\right)$ is the drain current during the turn-on and turn-off transitions.

2.5. Comparison of Junction Temperature Variation on Si and SiC Devices

The temperature influence is significant on the switching transitions for both the Si and SiC devices. The gate threshold voltage, device carrier mobility, and transconductance, among others. Figure 11 is a clear illustration that the temperature has a relatively obvious influence on the devices in question during the turn-off events. Furthermore, it is observed that the rising time of the drain–source voltage $V_{ds}$ increases with an increase in the temperature (25–${175}^{\circ }$C), being more significant in Si devices as seen in Figure 11D, compared to SiC devices observed in Figure 11B, and so does the decay time of the current as observed in Figure 11A,C, with it being more pronounced in Si devices than SiC, respectively. Figure 11C shows the tail current clearly. Additionally, during the turn-on process, the voltage decay time and the current rise time decrease as the temperature increases. Ideally, for this work, turn-off variations were preferred for detailed evaluation as they contain the tail current; similarly, variations in turn-on energy loss could also have been performed, though the tail current would not have been shown.

Figure 12a,b show the behavior of the threshold voltage with temperature increase for Si and SiC devices, respectively. The extraction of the variation in threshold voltage from the manufacturer’s modules followed the data sheets test conditions for recommended drain current, which is then extrapolated to the whole range of temperature from −50 °C to 150 °C. In this case, where the average $V_{ge\left(th\right)}$ is given as 6V at $I_c$ = 120.7 mA, a −4/15 V gate source voltage is used. The +15 V provides a strong drive that is way beyond the maximum threshold voltage of the device to ensure low conduction losses. In this device, the minimum voltage is −5 V, and the supplied gate voltage during the off state is −4 V, which is way below the pin level. This ensures total prevention from spurious triggering, which could accidentally switch on the switch, thus providing a degree of inherent noise immunity. When plotting $V_{ge\left(th\right)}$ vs. temperature, the curve has a negative coefficient, meaning the threshold voltage decreases as the junction temperature increases. Thus, the graph has an almost linear curve with a negative slope. From the figures, it is clear that the gate-emitter threshold voltage decreases from −50 V to 150 V, i.e., from 6.16 V to 4.52 V, which is approximately 8.2 mV/°C. Similarly, the threshold voltage vs. temperature curve of the SiC MOSFET showed a decrease in threshold voltage almost linearly with increasing temperature; thus, at higher temperatures, less threshold voltage is required to turn on the device. This is due to the consequent decrease in carrier mobility and intrinsic carrier concentration with temperature increase, subsequently reducing the required gate voltage. From Equation (4), the gate threshold voltage rate of change is $-3.3\mathrm{mV}{/}^{\circ }\mathrm{C}$. The negative temperature coefficient of $V_{gs\left(th\right)}$ improves the static thermal stability as the device naturally limits currents when the temperature is elevated.

Table 5. Variation of threshold voltage with temperature for SiC MOSFET and Si IGBT devices.

Device	−50 °C	−25 °C	0 °C	25 °C	50 °C	75 °C	100 °C	125 °C	150 °C
SiC MOSFET	3.2203	3.1235	3.0606	3.0277	2.9951	2.9327	2.8332	2.7033	2.5607
Si IGBT	6.1647	6.0890	5.9776	5.8292	5.6426	5.4180	5.1558	4.8573	4.5233

shows the data trend for the SiC and Si threshold voltage as the temperature increases.

$${\displaystyle \frac{d{V}_{\mathrm{GS}\left(\mathrm{th}\right)}}{dT}}=-3.3\mathrm{mV}{/}^{\circ }\mathrm{C}$$

(4)

With a dc-link voltage of 800 V, the switching energy loss of Si IGBT and SiC MOSFET under different junction temperatures was computed and illustrated in Figure 13a,b, respectively. It was observed that there is a linear trend across all temperatures. In higher currents, a great energy is stored in the device’s magnetic components and capacitance, which is dissipated, translating to higher energy loss. Since there is a long current tail in Si IGBT during the turn-off process, the energy dissipation is higher. As observed, at 4A, 1.2 mJ is lost at ${25}^{\circ }\mathrm{C}$, with an energy loss of 3.3 mJ lost at ${175}^{\circ }\mathrm{C}$ in the Si device. Comparatively, the energy loss in the SiC device increases with an increase in drain current; however, a slight variation was observed with temperature variations, as shown in

Table 6. Variation of threshold voltage with temperature for Si IGBT and SiC MOSFET devices.

Device	Temp (°C)	4 A	8 A	12 A	16 A	20 A	24 A	28 A	32 A	36 A
Si IGBT	25	1.2469	1.3905	1.5699	1.7480	1.9509	2.1479	2.3700	2.5900	2.8443
	175	1.4825	1.6754	1.8958	2.1021	2.3407	2.5825	2.8407	3.0823	3.3725
SiC MOSFET	25	0.0142	0.0286	0.0439	0.0720	0.1114	0.1608	0.2185	0.2851	0.3589
	175	0.0140	0.0288	0.0436	0.0716	0.1106	0.1604	0.2178	0.2843	0.3578

.

Temperature variations, as seen in Figure 14a, significantly influence the rate of change in drain current $di/dt$. However, in opposite ways. As temperature increases, the turn-on rate of $di/dt$ decreases, whereas the rate of change in drain current increases during the turn-off [42,43]. This is because the channel mobility reduces with temperature during turn-on, and the channel resistance increases during turn-off, reducing the mobility. Finally, Figure 14b illustrates the turn-on and turn-off energy loss. As expected, the energy losses in the Si device are higher than it they are the SiC MOSFET.

3. Comparison of Si and SiC MOSFET Different Parameters

3.1. Dynamic Comparision of SiC MOSFET and Si IGBT

The switching energy loss was quantified for the Si and SiC MOSFETs under the same conditions and with similar parameters as much as possible. Figure 15 shows a comparison between the SiC and Si energy loss $E_{on}$ across different drain currents, whereas Figure 16 shows the switching energy loss during the turn-off for the Si and SiC MOSFETs. Amongst the ones quantified, i.e., from $V_{ds}$ = 200 V to 1200 V and $I_{ds}$ = 4–36 A, for demonstration purposes, only at $V_{ds}$ = 600 V and 1000 V were plotted against the $I_{ds}$. It is observed that the energy loss for Si is consistently higher than for SiC at all current levels. The trend shows a near-linear increase in energy loss as the drain current increases, with SiC exhibiting a significantly lower loss than Si. For instance, at $V_{ds}$ = 600 V and $I_{\mathrm{ds}}=36\mathrm{A}$, SiC energy loss is 0.5185 mJ against Si’s 2.4173 mJ, highlighting a $78\%$ reduction when using the SiC MOSFETs. The trend continues until 1000 V operation, with SiC maintaining $84\%$ lower losses (0.93 mJ vs. 5.95 mJ), which reinforces the great advantage of SiC in higher power applications. The total energy loss shown in Figure 17 affirms that even after the summation of the turn-on and turn-off, the SiC energy loss remains significantly lower. At lower current, the SiC MOSFET has a lower conduction loss compared to the Si IGBT; this is because of the pure Ohmic characteristics of the SiC MOSFETs. This shows that the SiC is more preferable in comparison with Si. The converse is true in IGBT due to the presence of the current tail, which increases the switching time, causing non-linear behavior during the turn-off and consequently increased turn-off losses.

The characterized switching power loss during turn-on is illustrated in Figure 18, showing a consistent power loss increase as current increases. Additionally, SiC consistently achieves lower values of turn-on power dissipation. Figure 19 and Figure 20 reaffirm this observation. As Figure 19 indicates, the comparison of the power loss between Si and SiC shows that Si power loss remains higher than SiC. The total power loss from the two devices, which is shown by Figure 20, exhibits that the cumulative total loss in SiC MOSFETs is lower than the Si counterparts across the whole operation range, whereas

Table 7. Comparative switching and conduction losses in Si and SiC devices.

(a) Switching Power Loss in Si and SiC Devices
${\mathit{I}}_{\mathit{d}}$ (A)	600 V		1000 V
	Si	SiC	Si	SiC
4	42.4709	3.1373	121.6422	6.7865
8	49.4300	4.4295	140.6034	9.3433
12	57.4019	6.1429	161.9583	12.2371
16	66.4156	8.4920	184.4582	16.3223
20	76.6853	11.3149	208.5049	21.2577
24	88.0433	14.3868	234.4967	26.7184
28	101.0921	18.1326	261.9542	32.9639
32	114.8473	22.2732	289.8145	39.9474
36	129.3231	26.6974	316.7611	47.4049
(b) Conduction Power Loss in Si and SiC Devices
${\mathit{I}}_{\mathit{d}}$ (A)	600 V		1000 V
	Si	SiC	Si	SiC
4	258.0845	2.1005	416.2828	2.1153
8	302.0432	8.4336	462.2972	8.4644
12	346.7432	19.1298	509.1550	19.2452
16	391.9124	34.2999	556.5243	34.3626
20	437.8360	54.2118	604.3694	54.2068
24	484.1624	78.7614	653.0516	78.8639
28	531.3691	108.9639	702.3533	108.5656
32	579.0616	143.3253	754.0992	144.2730
36	627.3500	183.6523	812.1488	183.8255

a,b details the segregated switching power loss and condition power loss for the devices under texts, at 600V and 800V respectively.

Table 8. Comparative performance of Si IGBT and SiC MOSFET devices under different load currents and voltages.

(a) Comparative Total Power Loss in Si and SiC Devices
${\mathit{I}}_{\mathit{d}}$  (A)	600 V		1000 V
	Si IGBT	SiC MOSFET	Si IGBT	SiC MOSFET
4	300.56	5.24	537.93	8.90
8	351.47	12.86	602.90	17.81
12	404.15	25.27	671.11	31.48
16	458.33	42.79	740.98	50.68
20	514.52	65.53	812.87	75.46
24	572.21	93.15	887.55	105.58
28	632.46	127.10	964.31	141.53
32	693.91	165.60	1043.91	184.22
36	756.67	210.35	1128.91	231.23
(b) Comparative Efficiency in Si and SiC Devices
${\mathit{I}}_{\mathit{d}}$  (A)	600 V		1000 V
	Si IGBT	SiC MOSFET	Si IGBT	SiC MOSFET
4	88.87	99.78	88.15	99.78
8	93.18	99.73	92.99	99.78
12	94.69	99.65	94.70	99.74
16	95.44	99.55	95.57	99.68
20	95.89	99.45	96.09	99.62
24	96.18	99.35	96.43	99.56
28	96.37	99.24	96.67	99.50
32	96.51	99.14	96.84	99.42
36	96.62	99.03	96.96	99.36

a,b shows in detail the total loss for Si and SiC devices in the whole load current range as well as the respective efficiency.

3.2. Si IGBT and SiC MOSFET Efficiency Comparison

The total cumulative loss in each device forms a significant part of determining the efficiency achieved. The lower the losses, the higher the efficiency. It has been seen that the SiC MOSFETs consistently had lower losses than the Si IGBT; consequently, the efficiency of the SiC, as seen in Figure 21, is higher. It was observed that at lower currents, the losses are significantly lower and increase as the current increases. In tandem with this, the efficiency is higher at lower current, resulting from lower cumulative losses for the same power output. From the figure, the efficiency of 99.78% and 99.03% was observed at $I_{ds}$ = 4 A and $I_{ds}$ = 36 A, respectively, for a SiC MOSFET at 600 V. Comparatively, efficiency of 88.87% and 96.62% was observed at $I_{ds}$ = 4 A and $I_{ds}$ = 36 A, respectively, for a Si IGBT at 600V. Notably, whilst the switching losses increase with the increase in voltages, they do so at a significantly smaller rate at high voltages.

4. Conclusions

This study presented a comprehensive evaluation of the dynamic performance characteristics of Silicon-Insulated Gate Bipolar Transistors (Si IGBTs) and Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistors (SiC MOSFETs) under various operating parameters for high-frequency DC-DC converter applications. The switching behaviors were analyzed, and switching losses were analyzed as a function of load current, gate resistance, and DC-bus voltage. Notably, switching losses increase with an increase in gate resistance. The analysis done indicates that the SiC-based devices have superior and better performance in comparison with the Si-based devices. This is attributed to Si IGBTs’ significant tail current and slower switching behavior, which contributes to higher turn-off loss, hence limiting their stability at elevated frequencies, whereas the SiC MOSFETs’ superior performance was noted, resulting from reduced energy loss, the fast turn-on and turn-off making them better suited for higher frequencies, albeit with higher EMI sensitivity. The SiC demonstrated high efficiency in comparison with Si. The study offers invaluable insights into the trade-off involved in selecting semiconductor devices for power electronic systems, particularly under high-frequency switching conditions. The SiC MOSFET showed lower losses when compared with Si modules at the same test parameters. Moreover, lower voltage overshoots were observed, and this allowed a further increase in the dc-link voltage levels. This implies that the SiC can replace the Si IGBT even at a higher voltage class. It was observed that the turn-on loss in SiC is lower than in Si, even when the ringing was similar. The higher losses in Si are attributed to the higher $Q_{rr}$ of the Si diode. These findings provide valuable insights that govern device selection for high efficiency and high frequency, and confirm that the SiC can be used to retrofit Si devices even for higher voltages.