Search Results (37)

This study compared the effectiveness of gallium nitride (GaN) with a single carbon-doped (C-doped) buffer layer and a composite carbon/iron-doped (C/Fe-doped) buffer layer within an AlGaN/GaN high-electron-mobility transistor (HEMT). In traditional power devices, Fe-doping has a large memory effect, causing Fe ions to diffuse outwards, which is undesirable in high-power-device applications. In the present study, a C-doped GaN layer was added above the Fe-doped GaN layer to form a composite buffer against Fe ion diffusion. Direct current (DC) characteristics, pulse measurement, low-frequency noise, and variable temperature analysis were performed on both devices. The single C-doped buffer layer in the AlGaN/GaN HEMT had fewer defects in capturing and releasing carriers, and better dynamic characteristics, whereas the composite C/Fe-doped buffers, by suppressing Fe migration toward the channel, showed higher vertical breakdown voltage and lower sheet resistance, and still demonstrated potential for further performance tuning to achieve enhanced semi-insulating behavior. With optimized doping concentrations and layer thicknesses, the dual-layer configuration offers a promising path toward improved trade-offs between leakage suppression, trap control, and dynamic performance for next-generation GaN-based power devices. Full article

This paper presents a physics-guided machine learning (PGML) approach to model the I–V characteristics of GaN current aperture vertical field effect transistors (CAVET). By adopting the method of transfer learning and the shortcut structure, a physically guided neural network model is established. The shallow neural network with $tanh$ as the basis function is combined with a hypernetwork that dynamically generates its weight parameters. The influence of transconductance is added to the loss function. This model can synchronously predict the output and transfer characteristics of the device. Under the condition of small samples, the prediction error is controlled within 5%, and the $R^2$ value reaches above 0.99. The proposed PGML approach outperforms conventional approaches, ensuring physically meaningful and robust predictions for device optimization and circuit-level simulations. Full article

AlGaN-based high-electron-mobility transistors are critical for next-generation power electronics and radio-frequency applications, yet achieving stable enhancement-mode operation with a high threshold voltage remains a key challenge. In this work, we designed p-AlGaN superlattices with different structures and performed energy band structure simulations using the device simulation software Silvaco. The results demonstrate that thin barrier structures lead to reduced acceptor incorporation, thereby decreasing the number of ionized acceptors, while facilitating vertical hole transport. Superlattice samples with varying periodic thicknesses were grown via metal-organic chemical vapor deposition, and their crystalline quality and electrical properties were characterized. The findings reveal that although gradient-thickness barriers contribute to enhancing hole concentration, the presence of thick barrier layers restricts hole tunneling and induces stronger scattering, ultimately increasing resistivity. In addition, we simulated the structure of the enhancement-mode HEMT with p-AlGaN as the under-gate material. Analysis of its energy band structure and channel carrier concentration indicates that adopting p-AlGaN superlattices as the under-gate material facilitates achieving a higher threshold voltage in enhancement-mode HEMT devices, which is crucial for improving device reliability and reducing power loss in practical applications such as electric vehicles. Full article

This study proposes an AlGaN/GaN current aperture vertical electron transistor (CAVET) featuring a double superjunction (SJ) to enhance breakdown voltage (BV) and investigates its electrical characteristics via technology computer-aided design (TCAD) Silvaco Atlas simulation. An additional p-pillar was formed beneath the gate current blocking layer to create a lateral depletion region that provided a high off-state breakdown voltage. To address the tradeoff between the drain current and off-state breakdown voltage, the key design parameters were carefully optimized. The proposed device exhibited a higher off-state breakdown voltage (2933 V) than the device with a single SJ (2786 V), although the specific on-resistance of the proposed method (1.29 mΩ·cm⁻²) was slightly higher than that of the single SJ device (1.17 mΩ·cm⁻²). In addition, the reverse transfer capacitance was improved by 15.6% in the proposed device. Full article

This paper introduces a novel technology for the monolithic integration of GaN-based vertical and lateral devices. This approach is groundbreaking as it facilitates the drive of high-power GaN vertical switching devices through lateral GaN HEMTs with minimal losses and enhanced stability. A significant challenge in this technology is ensuring electrical isolation between the two types of devices. We propose a new isolation method designed to prevent any degradation of the lateral transistor’s performance. Specifically, high voltage applied to the drain of the vertical GaN power FinFET can adversely affect the lateral GaN HEMT’s performance, leading to a shift in the threshold voltage and potentially compromising device stability and driver performance. To address this issue, we introduce a highly doped n⁺ GaN layer positioned between the epitaxial layers of the two devices. This approach is validated using the TCAD-Sentaurus simulator, demonstrating that the n⁺ GaN layer effectively blocks the vertical electric field and prevents any depletion or enhancement of the 2D electron gas (2DEG) in the lateral GaN HEMT. To our knowledge, this represents the first publication of such an innovative isolation strategy between vertical and lateral GaN devices. Full article

In this work, fully vertical GaN trench MOSFETs were fabricated and characterized to evaluate their electrical performances. Transistors show a normally-OFF behavior with a high I_ON/I_OFF (~10⁹) ratio and a significantly small gate leakage current (10⁻¹¹ A/mm). Thanks to an improved resistance partitioning method, the resistances of the trench bottom and trench channel were extracted accurately by taking into account different charging conditions. This methodology enabled an estimation of the effective channel and bottom mobility of 11.1 cm²/V·s and 15.1 cm²/V·s, respectively. Full article

Molecular beam epitaxy (MBE) is demonstrated as an excellent growth technique for growing a low-defect GaN channel layer, which is crucial for controlling vertical leakage current and improving breakdown voltage (BV) in GaN-based high-electron mobility transistors (HEMTs). The 3D islands to 2D growth mode transition approach was induced by modulating substrate growth temperature (Tsub), displaying an overall improvement in film quality. A comprehensive investigation was conducted into the effects of Tsub on surface morphologies, crystal quality, and the optical and electrical properties of GaN films. Optimal results were achieved with a strain-relaxed GaN film grown at 690 °C, exhibiting significantly improved surface characteristics (root-mean-square roughness, Rq = 0.3 nm) and impressively reduced edge dislocations. However, the film with the smoothest surface roughness, attributed to the effect of the Ga-rich condition, possessed a high surface pit density, negatively affecting optical and electrical properties. A reduction in defect-related yellow emission further confirmed the enhanced crystalline quality of MBE GaN films. The optimized GaN film demonstrated outstanding electrical properties with a BV of ~1450 V, surpassing that of MOCVD GaN (~1180 V). This research significantly contributes to the advancement of MBE GaN-based high electron mobility transistor (HEMT) applications by ensuring outstanding reliability. Full article

The breakdown characteristics are very important for GaN high-electron-mobility transistors (HEMTs), which affect the application voltage, power density, efficiency, etc. In order to further enhance the breakdown voltage of the device, it is necessary to carry out research on the breakdown mechanisms of the device. This article summarizes several breakdown mechanisms of GaN devices, including electric field concentration, buffer leakage current, gate leakage current, and vertical breakdown. In order to suppress the breakdown mechanisms, techniques such as the use of a field plate, reduced surface field (RESURF), back barrier, gate dielectric, substrate removal, and addition of AlGaN channels can be developed. With the continuous development of various technologies, the breakdown characteristics of GaN devices can be fully explored, laying the foundation for improving the performance of power electronic systems. Full article

We present a series of TCAD analysis of gallium nitride (GaN) heterojunction bipolar transistors (HBTs) that investigates the impact of various key parameters on the gain characteristics, output characteristics, and breakdown characteristics. It has been observed that the DC gain of the AlGaN/GaN HBTs exhibits a non-linear relationship with the increase in the Al fraction. Specifically, the DC gain initially rises, then declines after reaching its peak value at approximately 7%. By optimizing the concentration of the base and the concentration and thickness of the collector epitaxial layer, it is possible to achieve devices with breakdown voltages of 1270 V (with a collector thickness of 6 μm and a carrier concentration of 2 × 10¹⁶ cm⁻³), specific on-resistance of 0.88 mΩ·cm², and a current gain of 73. In addition, an investigation on breakdown characteristics is conducted for HBTs with two types of substrates, namely QV-HBTs and FV-HBTs, at different inclinations of the ramp. We propose that critical angles are 79° and 69° to prevent the surface breakdown of the device, which helps to achieve an avalanche in GaN HBTs. We anticipate that the aforementioned findings will offer valuable insights for designing GaN-based power HBTs with elevated breakdown thresholds, heightened current densities, and increased power capabilities. Full article

We report that, for the first time, a low-temperature GaN (LT-GaN) layer prepared by metal–organic chemical vapor deposition (MOCVD) regrowth was used as a Mg stopping layer (MSL) for a GaN trench current–aperture vertical electron transistor (CAVET) with p-GaN as a carrier blocking layer (CBL). Inserting LT-GaN on top of the p-GaN effectively suppresses Mg out-diffusion into the regrown AlGaN/GaN channel, contributing to the high current capability of GaN vertical devices with a p-GaN CBL. With different MOCVD growth conditions, MSLs inserted in trench CAVETs were comprehensively investigated for the influence of MSL regrowth temperature and thickness on device performance. With the best on-state current performance obtained in this study, the trench CAVET with a 100 nm thick MSL regrown at 750 °C shows a high drain current of 3.2 kA/cm² and a low on-state resistance of 1.2 mΩ∙cm². The secondary ion mass spectrometry (SIMS) depth profiles show that the trench CAVET with the 100 nm thick MSL regrown at 750 °C has a dramatically decreased Mg diffusion decay rate (~39 nm/decade) in AlGaN/GaN channel, compared to that of the CAVET without a MSL (~104 nm/decade). In developing GaN vertical devices embedded with a Mg-doped p-type layer, the LT-GaN as the MSL demonstrates a promising approach to effectively isolate Mg from the subsequently grown layers. Full article

The last decade’s studies show that the PoL (point-of-load) converter’s output capacitor is an important component for reliability, implying that its careful selection may determine the overall converter’s failure rate and lifetime. PoL converters are commonly found in many electronic systems, usually as part of the Intermediate Bus Architecture (IBA). Their important requirements are a stable output voltage at load current variation, good temperature stability, a low output ripple voltage, high efficiency, and reliability. If the electronic system is portable, a small footprint and low volume are also important considerations. These were recently well accomplished with eGaN (enhancement gallium nitride) transistor technology, whose VUFoM (vertical unipolar figure of merit) is 1.48 compared to 1.00 for silicon. This ensures a higher converter power density (watts/area). This paper reviews the most-used capacitor technologies, highlighting the reliability of these components as part of the converter’s output filter by presenting original data related to their best performance. The test was set up with EPC’s eGaN FET transistor, which was enclosed within a 9059/30 V evaluation board with a 12 V input and 1.2 V output. Different output capacitor technologies were evaluated, and reliability was calculated based on measurements of the ripple of the output voltage and thermal scanning. Full article

The proposed study demonstrates a single-step CVD method for synthesizing three-dimensional vertical MoS₂ nanosheets. The postulated synthesizing approach employs a temperature ramp with a continuous N₂ gas flow during the deposition process. The distinctive signals of MoS₂ were revealed via Raman spectroscopy study, and the substantial frequency difference in the characteristic signals supported the bulk nature of the synthesized material. Additionally, XRD measurements sustained the material’s crystallinity and its 2H-MoS₂ nature. The FIB cross-sectional analysis provided information on the origin and evolution of the vertical MoS₂ structures and their growth mechanisms. The strain energy produced by the compression between MoS₂ islands is assumed to primarily drive the formation of vertical MoS₂ nanosheets. In addition, vertical MoS₂ structures that emerge from micro fissures (cracks) on individual MoS₂ islands were observed and examined. For the evaluation of electrical properties, field-effect transistor structures were fabricated on the synthesized material employing standard semiconductor technology. The lateral back-gated field-effect transistors fabricated on the synthesized material showed an n-type behavior with field-effect mobility of 1.46 cm² V⁻¹ s⁻¹ and an estimated carrier concentration of 4.5 × 10¹² cm⁻². Furthermore, the effects of a back-gate voltage bias and channel dimensions on the hysteresis effect of FET devices were investigated and quantified. Full article

In this study, we propose and simulate the design of a non-regrowth staircase channel GaN vertical trench transistor, demonstrating an exceptional threshold and breakdown characteristic for high power and high frequency applications. The unique staircase design provides a variable capacitance through the gate-dielectric-semiconductor interface, which results in a high breakdown voltage of 1.52 kV and maintains a channel on-resistance of 2.61 mΩ∙cm². Because of the variable length and doping profile in the channel region, this model offers greater flexibility to meet a wide range of device application requirements. Full article

Substrate voltage (V_SUB) effects on GaN-on-Si high electron mobility transistors (HEMTs) power application performance with superlattice transition layer structure was investigated. The 2DEG conductivity and buffer stack charge redistribution can be affected by neutral/ionized donor and acceptor traps. As the donor/acceptor traps are excessively ionized or de-ionized by applying V_SUB, the depletion region between the unintentionally doped (UID)/Carbon-doped (C-doped) GaN layer may exhibit a behavior similar to the p–n junction. An applied negative V_SUB increases the concentration of both the ionized donor and acceptor traps, which increases the breakdown voltage (BV) by alleviating the non-uniform distribution of the vertical electric field. On the other hand, an applied positive V_SUB causes the energy band bending flattener to refill the ionized traps and slightly improves the dynamic R_on degradation. Moreover, the amount of electrons injected into the buffer stack layer from the front side (2DEG channel/Ohmic contact) and the back side (AlN nucleation layer/superlattice transition layer) are asymmetric. Therefore, different V_SUB can affect the conductivity of 2DEG through the field effect, buffer trapping effect, and charge redistribution, which can change the electrical performance of the device. Full article

This paper attempts to describe a laser diode driver circuit using the depletion mode gallium nitride high electron mobility transistor (D-mode GaN HEMT) to generate nanosecond pulses at a repetition rate up to 10 MHz from the vertical-cavity surface-emitting laser (VCSEL). The feature of this driver circuit is a large instantaneous laser power output designed in the most efficient way. The design specifications include a pulse duration between 10 ns and 100 ns and a peak power up to above 100 W. The pulsed laser diode driver uses the D-mode GaN HEMT, which has very small C_oss difference between turn-on and turn-off states. The analysis is according to a laser diode model that is adjusted to match the VCSEL, made in National Yang Ming Chiao Tung University (NYCU). A design guide is summarized from the derivations and analysis of the proposed laser diode driver. According to the design guide, we selected the capacitor, resistor, and diode components to achieve 10 ns to 100 ns pulse duration for laser lighting. The experiment demonstrated that the maximum power-to-light efficiency can be as high as 86% and the maximum peak power can be 150 W, which matches the specifications of certain applications such as light detection and ranging (LiDAR). Full article