Search Results (694)

This study presents a high-efficiency T-type three-level inverter for interior permanent magnet synchronous motor (IPMSM) drive applications, featuring a comprehensive performance comparison with a conventional two-level inverter. To address the high switching losses and noticeable harmonic distortion typically associated with conventional two-level configurations, the T-type architecture is developed and evaluated. First, PLECS simulations are conducted to verify the proposed dual-loop control architecture, which integrates field-oriented control (FOC), space-vector pulse-width modulation (SVPWM), and a neutral-point voltage balancing mechanism. Subsequently, a 2.2 kW experimental platform is constructed using silicon carbide (SiC) wide-bandgap (WBG) semiconductor devices. To characterize the dynamic switching behavior of the adopted SiC MOSFETs, a dedicated double-pulse test (DPT) platform is developed to evaluate their switching losses and determine appropriate gate-drive parameters. In addition, the digital control firmware is implemented on a digital signal processor (DSP) platform. The dual-loop control algorithms, SVPWM strategy, and two-layer protection framework are implemented as real-time executable routines, enabling close integration of the control software and hardware platform. Finally, motor drive experiments at switching frequencies of 20 kHz and 40 kHz are performed to validate the proposed system. The experimental results demonstrate that the developed architecture significantly reduces phase-current total harmonic distortion (THD) and improves overall energy conversion efficiency compared with a conventional two-level inverter, confirming its potential for high-efficiency next-generation electric vehicle applications. Full article

Power quality measurements in medium- and high-voltage networks are often performed indirectly using current transformers (CTs) and voltage transformers (VTs). Even when the power quality instrument itself complies with relevant standards, frequency-dependent transformer errors may affect harmonic quantities used for compliance assessment. This paper proposes an interval-based compliance-decision framework for stationary harmonic states to evaluate the influence of CT and VT magnitude errors on harmonic compliance decisions. The framework converts admissible transformer errors into lower and upper bounds of assessed harmonic quantities and compares these intervals with normative limits. The approach is applied to voltage harmonic limits according to EN 50160 and to current harmonic and total demand distortion limits according to IEEE Std 519-2022. The results show that transformer errors are most relevant in near-limit cases, where the error interval may cross the compliance boundary and lead to possible false compliance or possible false non-compliance. An illustrative application using measured CT current-error data demonstrates how transformer-specific frequency-response data can be introduced into the proposed framework. The proposed method provides a decision-oriented assessment of instrument-transformer error contributions in indirect harmonic compliance studies. Full article

Multiphase permanent magnet synchronous motors (PMSMs) have been widely used in renewable energy, electric vehicle, and aviation applications. Model predictive control has emerged as a mainstream technique for multiphase drives, although conventional implementations suffer from the complexity of weighting factor tuning and excessive computational burden. This paper proposes a dimensionless multi-objective model predictive current control (MPCC) strategy for six-phase PMSM drives that operate without conventional weighting factors. Instead of penalizing harmonic subspace x-y currents through weighted cost terms, the proposed method pre-filters the 64 candidate voltage vectors to a selective set of 12 vectors whose α-β and x-y plane projections are inherently balanced, thereby constraining harmonic excitation at the source. A dimensionless multi-objective cost function is subsequently formulated, integrating current tracking, switching reduction, torque ripple suppression, and voltage/current constraints without additional weighting factors. The proposed strategy is evaluated under startup, steady-state, disturbance, and parameter sensitivity scenarios, with comparative analysis against conventional MPCC. Simulation results demonstrate that the phase current total harmonic distortion is reduced from 29.64% to 6.00%. The q-axis current settling time is reduced from 0.12 s to 0.025 s and the startup overshoot is reduced from 22 A to 11 A. The x-y subspace current ripple and average switching frequency are also reduced. Full article

On model predictive control, the weighting factors are often challenging to tune, which usually relies on trial-and-error methods. To bypass this inconvenience, this paper enhances a previously proposed weightless method applied to Finite Control Set Model Predictive Control (FCS-MPC). An induction motor driven by a neutral point clamped inverter on a Back-to-Back configuration, connected to the grid and allowing power regeneration is presented. On the control side, a weightless predictive current control is presented along with a novel strategy to build the torque reference based on the motor dynamics, which can also dismiss load torque measurement or estimation with a speed deviation lower than 0.1%. To ensure reliable results, the power circuit was assembled on a hardware-in-the-loop environment, whilst the control was embedded on a digital signal processor, bringing the simulation closer to a real power plant. Simulation results proved that the strategy could regulate the Direct Current (DC) link voltage and the rotor speed and that the machine still operates on all four quadrants with a power factor close to unity. The mean absolute percentage error presented during full load was 0.12% for the DC link voltage and 0.22% for the rotor speed. For the grid current, the Total Harmonic Distortion (THD) obtained is 1.00% during pre-charge of the DC link capacitors, whilst for the stator current, it was 0.76% during full load. The control strategy also proved to be more efficient than previous works and presented robustness under many parameters mismatching. Full article

Modular multilevel converters (MMCs) are attractive for medium- and high-power motor drive applications; however, low-speed motor operation can cause significant submodule (SM) capacitor voltage ripple. In conventional carrier phase-shifted pulse-width modulation (CPS-PWM), the carrier phase displacement is usually fixed. This fixed setting does not account for the longer capacitor charging and discharging intervals that occur as a motor’s electrical frequency decreases. To address this issue, this paper develops a dynamic carrier phase-shift control strategy for MMCs under low-frequency motor drive electrical operating conditions. The proposed strategy relates the carrier phase-shift angle to the motor operating frequency through a piecewise function. A larger phase-shift angle is adopted in the low-frequency region, whereas the angle gradually returns to the conventional CPS-PWM value as the frequency increases. The strategy is implemented in the PWM generation stage through an equivalent carrier delay update, without modifying the MMC power circuit. Comparative MATLAB/Simulink simulations over the frequency range of 0.5–10 Hz are carried out to evaluate the capacitor voltage ripple, output current total harmonic distortion (THD), upper-arm current, and circulating current. The results indicate that the proposed scheme can effectively reduce the peak-to-peak capacitor voltage ripple at low frequencies while maintaining comparable AC-side output current quality and acceptable internal current behavior within the investigated converter-side electrical model. Full article

The efficacy of low-carbon power systems is reduced by the high energy demand of conventional CO₂ capture processes, the loss of recoverable thermal energy, and power-quality disturbances associated with variable renewable generation. This study suggests an integrated framework that integrates membrane-assisted CO₂ capture, thermoelectric waste-heat recovery, photovoltaic generation, battery energy storage, and a grid-connected converter to address these issues. During the capture of CO₂, the waste heat is converted into electrical energy using a thermoelectric generator and integrated with the photovoltaic and battery outputs through a common DC link. A conventional phase-locked loop is not necessary for reference-signal extraction, DC-offset rejection, harmonic compensation, and power management, as an Enhanced Notch Filter-Based Second-Order Generalized Integrator (ENF-SOGI) controller is employed. The effectiveness of the proposed system is demonstrated by simulation and experimental studies conducted under variable irradiance, nonlinear loading, distorted-load, and distorted-grid-voltage conditions. The membrane unit achieves a CO₂ capture efficiency of approximately 92%, with a specific energy consumption of 1.2 GJ/tCO₂. The controller reduces the source-current total harmonic distortion from 24.3% to approximately 1.2–1.3%, limits its experimental variation to ±5 V, and maintains the DC-link voltage at approximately 600 V. Consequently, the proposed architecture is designed to facilitate low-carbon grid operation by integrating a unified energy-management system that includes high-efficiency CO₂ separation, the productive recovery of waste heat from the capture process, increased renewable energy utilization, and IEEE-compliant source-current quality. Full article

For the problem of additional copper loss, iron loss, and efficiency degradation caused by current harmonics in surface-mounted permanent magnet synchronous motor (SPMSM), this study proposes a novel optimization strategy based on harmonic current and the conventional loss minimization control (LMC) strategy, namely Harmonic-Current-Inclusive Loss Minimization Control (HCI-LMC). For the 5th, 7th, and 11th current components, a compensatory harmonic voltage injection scheme is adopted for suppression. Simulation studies are conducted to verify the effectiveness of the proposed optimization strategy. The total harmonic distortion (THD) of the stator current is reduced from 14.87% to 1.36%, and the amplitudes of the 5th, 7th, and 11th harmonics are attenuated by 82.6%, 80.0%, and 79.3%, respectively. The results indicate that HCI-LMC can significantly suppress harmonic losses and improve the overall motor efficiency by 1.32% compared with the conventional LMC strategy. Full article

The rapid electrification of transportation has accelerated the demand for high-power electric vehicle (EV)-charging systems with high efficiency, compact size, galvanic isolation, and flexible scalability. Conventional isolated EV chargers typically adopt cascaded AC–DC and DC–DC conversion stages, which require additional semiconductor devices, passive components, and bulky dc-link capacitors, thereby increasing system complexity and limiting power density. This paper proposes a scalable three-phase modular parallel quasi-single-stage isolated single-ended primary-inductor converter (SEPIC) for high-power EV fast-charging applications. The proposed converter integrates power factor correction, voltage regulation, and high-frequency isolation within a unified SEPIC-based conversion cell, eliminating the intermediate dc-link capacitor while reducing the number of magnetic components and power conversion stages. By employing a Δ-connected three-phase input and input/output-parallel modular configuration, the proposed architecture provides a flexible power expansion approach based on a 9 kW basic module, with the potential to extend to higher power levels, such as 54 kW, through paralleling multiple identical modules. The operating principle, steady-state characteristics, continuous conduction mode (CCM)/discontinuous conduction mode (DCM) transition mechanism, current-sharing behavior, and control strategy are systematically investigated. An 18 kW prototype consisting of two parallel modules is experimentally validated under 380 V three-phase AC input and 400 V DC output conditions. The experimental results demonstrate a peak efficiency of 97.5%, a rated efficiency of 97.3%, a power factor (PF) of 0.999, and an input current total harmonic distortion (THD) of 2.55%, confirming the effectiveness and scalability of the proposed converter for high-power EV fast-charging applications. Full article

Photovoltaic converters operate under varying climatic conditions and non-ideal grid regimes, but factor importance is often assessed either through isolated local metrics or through pooled operating data that hide regime shifts and interaction effects. This study develops a hierarchical framework for sensitivity analysis of operating profiles of grid-connected PV converters under climatic and grid uncertainty. A compact operating-profile formulation is introduced that relates solar radiation, cell and ambient temperature, grid voltage, load, and selected design/control parameters to active power, efficiency, power factor, harmonic distortion, DC bus ripple, clipping behavior, and thermal headroom. The proposed workflow combines local normalized sensitivities for fast ranking around nominal conditions, Morris screening for factor reduction, and Sobol/Saltelli variance-based indices for global prioritization under uncertainty. The framework is demonstrated on a 100 kW synthetic reduced-order benchmark representing a three-phase two-level grid-connected PV inverter with an LCL filter. To clarify the scope of validity, the reduced-order model is cross-checked against switching-level simulations for representative nominal, clipping-prone, high-temperature and grid-stress operating windows. The results show that factor importance is not universal, but depends on the selected KPI, operating regime and uncertainty scenario. In the considered benchmark, grid voltage, cell temperature and equivalent thermal resistance are the dominant total-effect contributors, while the strongest second-order contribution appears between grid voltage and filter inductance under grid-stress conditions. The proposed framework is therefore intended as a reproducible, regime-aware sensitivity workflow rather than as a universal ranking of PV converter parameters. Full article

This paper presents a multi-stage waveform generator based on second-generation Voltage Conveyors (VCIIs). The proposed architecture enables the generation of multiple waveform types, including a sinusoid, a square wave, a triangular wave, and a reconstructed quasi-sinusoidal waveform. The system is designed using cascaded VCII-based blocks, where each stage performs a specific signal-processing function. A theoretical analysis including non-ideal effects is carried out by considering the parasitic impedances at the conveyor terminals and highlighting their impact on the frequency response and signal amplitude. The proposed architecture is validated through measurements performed with a discrete AD844-based VCII realization and through transistor-level simulations of a 0.15 μm CMOS integrated implementation. The CMOS solution includes the layout design of the VCII building block, which occupies an active area of 40 μm × 40 μm. Simulation results confirm correct operation of the CMOS implementation at distinct frequency-scaled design points between 80 kHz and 30 MHz, while the discrete AD844-based realization is validated up to 1 MHz. The obtained results also indicate an intrinsic waveform shaping mechanism, where the comparator and cascaded integration stages contribute to improving the spectral purity of the reconstructed quasi-sinusoidal output. Robustness is further verified through Total Harmonic Distortion (THD), Process-Voltage-Temperature (PVT), and Monte Carlo analyses, which show limited variability and stable performance, with a maximum THD reduction of 21.7%. At 80 kHz, the square-wave duty cycle exhibits a mean value of 50.08% and a standard deviation of 0.42% over 200 Monte Carlo runs. Full article

This work presents a novel method known as the Red Deer Algorithm-Based Artificial Neural Network (RDA-ANN) for managing real-time voltage and harmonic control in a cascade H-bridge multilevel inverter (CHB-MLI) that is fed by photovoltaic (PV) panels. The RDA-ANN technique proposed here computes the switching angles in real-time for selective harmonic elimination (SHE) on the output voltage of a multilevel inverter (MLI). In the proposed approach, a comprehensive lookup table containing 7776 permutations of switching angles was first generated offline using RDA optimization for a three-phase, 11-level CHB-MLI with five PV panels operating across a voltage range of 30 V to 35 V. This dataset was subsequently used to train a feed-forward ANN model capable of predicting optimal switching angles corresponding to any real-time voltage measurements from the panels. The SHE-PWM approach based on RDA-ANN targets the elimination of the 5th, 7th, 11th, and 13th order harmonics. This algorithm guarantees that the intended fundamental voltage is achieved, even during fluctuations in the voltages of the panels caused by varying irradiation and temperature conditions, while effectively removing the unwanted harmonics. The findings, validated under multiple environmental scenarios, illustrate that the RDA-ANN-based SHE-PWM technique successfully eliminates the selected harmonics from the load voltage with a fundamental voltage error not exceeding 0.18%, and results in a low total harmonic distortion (THD) value that complies with the IEEE 519-2022 standard across all tested conditions. Full article

This paper proposes a single-stage common-ground series-capacitor-compensated buck–boost inverter (CG-SCC-BBI) for wide-input DC–AC applications. Featuring a common-ground neutral and a series-blocking film capacitor, the topology inherently suppresses high-frequency common-mode leakage-current excitation and blocks the structural DC offset. To counteract frequency-dependent voltage attenuation caused by the output network, a fundamental-frequency equivalent model is derived to pre-scale the modulation reference and fully restore output voltage amplitude. The four-switch power stage operates with single-active-leg PWM, confining high-frequency switching to a single half-bridge at any instant to significantly reduce the switching-loss budget. Furthermore, by eliminating the conventional line-frequency output filter choke and utilizing film capacitors exclusively, the topology completely avoids electrolytic capacitors, thereby enhancing long-term operational reliability and lifespan. The proposed inverter supports seamless transition between boost and buck operating modes across the entire input-voltage range. Its operating principles are validated through time-domain simulations, and these were experimentally verified on a 300 W SiC MOSFET standalone laboratory prototype. Experimental results confirm correct operation from 95 V to 400 V DC input, achieving maximum measured efficiencies of 96.79% at the rated 300 W under low-input operation and 97.66% at the rated 300 W under high-input operation, while maintaining an output-current total harmonic distortion (THD) below 2.5%. Full article

This study presents and evaluates a system-level optimization of an electrical resistance tomography (ERT) measurement platform based on a ZYNQ-7020 all-programmable system-on-chip (APS-SoC). The design combines deterministic programmable-logic (PL) acquisition, processing-system (PS) configuration and communication scheduling, AXI/DMA data movement, Gigabit Ethernet transmission, and a seventh-order Butterworth excitation filter. FFT-based amplitude extraction and Tikhonov reconstruction remain on the host computer so that the reconstruction algorithm and regularization settings remain identical for the baseline and proposed systems; the present prototype is therefore not claimed as a fully standalone smart sensor. Under the same 16-electrode tap-water testing configuration, the average frame rate increased from 58.23 ± 1.88 FPS to 123.02 ± 1.62 FPS (mean ± sample standard deviation, n = 10), end-to-end latency decreased from 5.2 ms to 2.1 ms, SFDR increased from 68 dB to 95 dB, and SSIM increased from 0.72 to 0.94. In one representative static hardware record at 160 kHz, the calculated amplitude-stability SNR values were 65 dB and 100 dB for the baseline and proposed excitation paths, respectively, while total harmonic distortion decreased from 15.2% to 7.5%. These single-condition signal quality values are descriptive rather than uncertainty-bounded performance specifications. The image-quality differences are attributed primarily to cleaner boundary-voltage measurements with an unchanged reconstruction method, whereas the frame-rate gain reflects the combined PL/PS data path and Gigabit Ethernet upgrade. Full article

Modeling and stability analysis of a PV–energy storage AC/DC integrated three-port grid-connected power electronic device is investigated in this paper for low-voltage single-phase renewable energy applications. The device consists of a PV Boost converter port, a battery-side bidirectional DC-DC converter port, and a single-phase full-bridge grid-connected inverter. To analyze the coupling-induced stability characteristics of this multi-converter system, mathematical models of the PV array, battery, and AC/DC integrated device are established. Considering the periodic time-varying nature introduced by the single-phase grid voltage, a phase-angle-based simplified discrete model is developed to transform the system into a discrete model evaluated at a fixed grid-voltage phase angle. Based on this model, eigenvalue sensitivity, eigenvalue trajectories, and bifurcation diagrams are used to identify the influence of key control parameters on system stability. The results show that excessive proportional gains in the inverter current loop and energy storage control loop reduce the stability margin and may lead to period-doubling bifurcation, Hopf bifurcation, or unstable grid current operation. The period-doubling and Hopf stability boundaries are identified at k_p4 ≈ 1.40 and k_p2 ≈ 1.75, respectively. In simulation, the grid-current THD increases from 2.07% to 3.60% as k_p4 rises from 1.3 to 1.6 and from 2.07% to 2.27% as k_p2 rises from 1.7 to 1.8. MATLAB/Simulink simulations and hardware-in-the-loop experiments further verify that the identified stability boundaries are consistent with the degradation of grid current quality and the increase in total harmonic distortion. The proposed modeling and analysis method provides a reference for parameter tuning and stable operation of single-phase PV–energy storage three-port grid-connected devices. Full article

In this study, an Artificial Neural Network (ANN)-based adaptive DC-link voltage (V_dc) controller is developed for a Parallel Hybrid Active Power Filter (PHAPF). The proposed controller aims to simultaneously determine the DC-link reference voltage (V_{dc_ref}) and the PI controller gains (K_i, K_p) as a function of the operating conditions. Training data for the ANN are obtained from simulations performed in the MATLAB/Simulink environment. Simulations performed using this training set show that adapting the DC-link reference voltage reduces total harmonic distortion (THD) compared to a PHAPF with a fixed V_{dc_ref} and reduces the DC-link voltage at low-power loads, which has the potential to lower switching losses, while adaptive PI gains improve transient behavior after large load changes. Therefore, the two adaptive quantities affect complementary aspects of performance. The trained ANN model is coded in the C programming language and implemented on a microcontroller-based control card. A 5 kVA PHAPF system is designed and fabricated for experimental verification. Experimental results demonstrate that the proposed ANN-based adaptive DC-link voltage control algorithm achieves lower total harmonic distortion (THD) than PHAPFs employing a constant $V_{dc\_ref}$. In addition, reducing the DC-link voltage under low-power operating conditions has the potential to decrease voltage stress across the power switches and reduce switching losses. Furthermore, the proposed ANN-based adaptive DC-link voltage control algorithm exhibits better harmonic suppression performance despite the processing load and filtering delays. Full article