Search Results (91)

This paper presents the first hybrid supply modulator (HSM) designed for envelope tracking power amplifiers (ET-PAs) in base station applications. The focus is on a rail-to-rail Class-AB linear amplifier (LA) optimized for high-voltage and wide-bandwidth operation. The LA is designed using 130 nm BCD technology, utilizing Laterally Diffused Metal-Oxide Semiconductor (LDMOS) transistors for high-voltage operation and incorporating shielding MOSFETs to protect the low-voltage devices. The circuit utilizes dual power supply domains (5 V and 30 V) to improve power efficiency. The proposed LA achieves a bandwidth of 100 MHz and a slew rate of +1003/−852 V/$\mathsf{\mu }\mathrm{s}$, with a quiescent power consumption of 0.89 W. Transient simulations using a 50 MHz bandwidth 5G NR envelope input demonstrate that the proposed HSM achieves a power efficiency of 83%. Consequently, the proposed HSM supports high-output (100 W) wideband 5G NR transmission with enhanced efficiency. Full article

Insulation materials are critical for the reliability and performance of electrical power systems, particularly in high-voltage rotating machines. While failures can arise from thermal, mechanical, or electrical stress, they predominantly manifest as electrical breakdowns. Prior research has primarily concentrated on aging in straight winding sections, despite evidence indicating that failures frequently occur in the bending regions of turn insulation. This study explores the influence of high-frequency pulsed electrical stress on the lifetime behavior of Type II insulation systems used in high-voltage rotating machines. Practical samples, designed with geometric configurations and technology akin to that in rotating machines, were tested under conditions characterized by voltage slew rates (dv/dt) exceeding 10 kV/μs, with variations in frequency and waveform shape. The findings reveal that the rate of electrical aging remains consistent across differing pulse widths, risetimes, and polarities, displaying a similar lifetime exponent. Nonetheless, insulation durability is markedly more compromised under pulsed conditions. At the identical times-to-failure, the sinusoidal waveform necessitated nearly twice the applied peak voltage as the bipolar pulse waveform. This finding clearly suggests that pulsed excitation exacerbates insulation degradation more effectively due to the sharp rise times and high (dv/dt) rates imposing substantial electrical stress on dielectric materials. Full article

In light of the large and fast-growing use of power electronics in electrical generation, distribution and utilization systems, and with the focus on electrified transportation, evaluating the significance of testing insulation systems for design and quality control under AC sinusoidal or power electronics waveforms is a due knowledge step. This paper has a twofold aim. One is presenting a procedure for the comparison between two insulation system solutions for partial discharge, PD, free design, referring to motorettes of a MV speed-controlled motor. The other is to carry out an evaluation of the most effective testing waveform, from AC sinusoidal to AC modulated (PWM), varying the number of inverter levels and switching the slew rate. It is shown that AC sinusoidal is effective for a qualitative evaluation of insulation system design as regards partial discharge risk, but PD inception voltage can be significantly dependent on supply voltage waveforms. Hence, if quantitative estimation of partial discharge inception voltage is requested, for design and quality control purposes, PWM waveforms as close as possible to those planned under operation should be used. Full article

In this paper, we present a novel enhanced recycling folded cascode (ERFC) operational transconductance amplifier (OTA), which exhibits high efficiency and a fast transient response under weak inversion. Our innovative combination of adaptive biasing with nested local feedback (ABNLF) effectively enhances the input transconductance and slew rate (SR), thus improving the transient response. By incorporating coupling capacitors at the output stage, we achieve a stable operating region with large signal responses. Both the traditional RFC OTA and the proposed ERFC OTA were designed in a 0.18 $\mathsf{\mu }$m CMOS process, operating at a power supply of 1.8 V, with quiescent currents of 8 $\mathsf{\mu }$A and 10.4 $\mathsf{\mu }$A, respectively. Post-layout simulations reveal a remarkable enhancement in the proposed ERFC OTA over the traditional RFC OTA, with the SR and gain–bandwidth (GBW) surging by 120- and 5.95-fold, respectively. This advancement boosts the efficiency of the traditional RFC OTA and provides an impressive figure of merit (FoM) of 130.04 (V/$\mathsf{\mu }$s)·pF/$\mathsf{\mu }$A. Full article

A family of improved low-voltage switched-capacitor circuits is introduced. It is based on the utilization of multiple-output class AB/AB op-amp architectures that provide true sample and hold outputs that are not subject to a reset phase as with conventional switched-capacitor circuits. This feature essentially relaxes the op-amp slew rate requirements, allowing a higher speed and simple low-voltage operation. A power-efficient GB boosting technique based on resistive local common mode feedback is used to significantly improve the GB and internal/external slew rate of the op-amps with only a 36.5% additional power dissipation. Full article

GaN High-Electron-Mobility Transistors have gained some foothold in the power-electronics industry. This is due to wide frequency bandwidth and power handling. Gallium Nitride offers a wide bandgap and higher critical field strength compared to most wide-bandgap semiconductors, resulting in better radiation resistance. Theoretically, it supports higher speeds as the device dimensions could be reduced without suffering voltage breakdown. The simulation and experimental results illustrate the superior performance of the Gallium Nitride High-Electron-Mobility Transistors in an amplifying circuit. Using a spice model for commercially available Gallium Nitride High-Electron-Mobility Transistors, non-distorted output to an input signal of 200 ps was displayed. Real-world measurements underscore the fast response of the Gallium Nitride High-Electron-Mobility Transistors with its measured slew rate at approximately 3000 V/μs, a result only 17% lower than the result obtained from the simulation. This fast response, coupled with the amplifier radiation resistance, shows promise for designing improved detection and imaging circuits with long Mean Time Between Failure required, for example, by next-generation industrial-process gamma transmission-computed tomography. Full article

In CERN’s beam transfer lines, high-voltage generators have traditionally relied on thyratron switches; however, thyratrons present operational challenges and are also becoming increasingly hard to source. To address this issue, there is a growing interest in adopting compact pulse generators made from commercially available off-the-shelf (COTS) components. Recent research has demonstrated that thyristors designed for rectifier applications, which are not specifically designed for fast rise times, can be activated in overvoltage mode—also referred to as impact-ionization mode. These devices achieve substantial improvements in their dU/dt and dI/dt characteristics. This activation method involves applying a substantial overvoltage between the thyristor’s anode and cathode, along with a fast slew rate exceeding 1 kV/ns. The adoption of compact pulse generators built from COTS components opens up new opportunities for deploying this technology across multiple domains, including high-speed kicker generators in particle accelerators. In our methodology, we incorporated commercially available high-voltage components—SiC MOSFETs—that were triggered using a fast gate driver, which was custom-designed. The generated output pulse was then amplified and sharpened in a four-stage Marx generator composed of small, $1.2$ kV rated D2PAK thyristors. This configuration yielded an output pulse with an amplitude of 11 kV and a 10–90% dU/dt of $13.3$ kV/ns. The present study details the design of the Marx generator and the resulting pulses, along with the challenges faced in high-voltage measurements. Full article

The novel concept of reliable voltage balancing on N fast high-voltage (HV) transistors, connected in series, is verified by computer modeling/experimental testing. The essence of the concept is to transfer the balancing function from conventional snubbers, resistive dividers, varistors, etc., or sophisticated gate-side control techniques, to “individual” resistive loads (of transistors) connected to “individual” HV sources of power. The concept has been implemented in the recently patented architecture of HV rectangular pulse generators. The operation of any series-connected stack requires (1) synchronization of control actions on gates of all N transistors; (2) static HV balancing on all transistors in OFF states; and (3) dynamic HV balancing during ON↔OFF transients. The goals of the new design are to achieve an exceptionally high level of HV balancing in modes (2) and (3), as well as to simplify the process of configuring/customizing the circuit. Testing confirms that new generators exhibit minimal ripple during ON→OFF transients. Reliable operation with high-quality rectangular pulses is ensured even at a voltage slew rate of more than 100 kV/µs, while each transistor blocks a voltage close to the maximum value specified in its datasheet. The presented novelties are likely suitable for high-speed instrumentation. Full article

Integrated circuits are the core building components of virtually all communication systems. Wireless communication systems are becoming increasingly common. They require specialized transmission components to reduce electromagnetic interference. This paper presents the design of a trapezoidal waveform generator intended for generation of waveforms with limited level and spectrum of radiated interference This limitation is important because the discussed circuit is a high-voltage function block that can drive the output antenna with relatively high-power pulses. The introduced design is based on a mix of low- and high-voltage devices; however, most of them operate in low-voltage steady and near steady conditions. The implemented design flow includes safe operating area controls, which result in the implementation of a set of overvoltage devices. The designed generator provides means of frequency and slew rate control and can produce high-quality output waveforms. The results show that this type of design can be further optimized for generating waveforms with a limited range of slew rate values. Moreover, this paper presents some operational aspects and phenomena that must be addressed to provide a design that can be practically implemented in modern high-voltage integrated circuits. Full article

Oscillating grease-lubricated slewing bearings are used in several applications. One of the most demanding and challenging is the rotor blade bearings of wind turbines. They allow the rotor blades to be turned to control the rotational speed and loads of the complete turbine. The operating conditions of blade bearings can lead to lubricant starvation of the contacts between rolling elements and raceways, which can result in wear damages like false brinelling. Variable oscillating amplitudes, load distributions, and the grease properties influence the likelihood of wear occurrence. Currently, there are no methods for rating this risk based on existing standards. This work develops an empirical methodology for assessing and quantifying the risk of wear damage. Experimental results of small-scale blade bearings show that the proposed methodology performs well in predicting wear damage and its progression on the raceways. Ultimately, the methods proposed here can be used to incorporate on-demand lubrication runs of pitch bearings, which would make turbine operation more reliable and cost-efficient. Full article

The reliability of components of industrial electrical assets fed by power electronics might be at risk due to the type and extent of electrothermal stresses. The move of power electronics toward higher levels of voltage, switching frequency, slew rate, and specific power increases the risk of partial discharge inception and thus of accelerated extrinsic aging and premature failure. The reaction to this challenge is to embrace the concept of partial discharge-free (PD-free) design and operation. This paper presents a PD-free approach to the design of laminated busbars, considering both AC and DC insulation subsystems, and focusing on surface insulation. The availability of a recently proposed model to estimate the inception field is a key tool. The model is validated through PD measurements performed on a laminated busbar, using new automatic software that can identify the type of source generating PD. Combined with electric field calculations, the model provides estimates of the PD inception voltage which are almost coincident with the measurement results. Inception voltages in the order of 10 kV and 20 kV have been observed for AC and DC excitation, respectively. In the case of DC supply, tests at different ambient temperatures, 25 °C and 60 °C, indicate that the inception voltage does not change significantly with temperature. Disposability, scalability to any voltage/power, and capability to work, potentially, for any other type of insulation system, are interesting features of the proposed approach, which are discussed in the paper. Full article

This paper critically compares the turn-off performance of two package solutions, 3-lead (3L) vs. 4-lead (4L), in SuperJunction MOSFETs. It is commonly assumed that the better performance (lower switching losses) of the 4L MOSFET is obtained thanks to the decoupling of the power and driving loops. On the contrary, in this work, the experimental results, circuit models and Kirchhoff laws show that the turn-off improvement (lower turn-off losses) obtained by adopting the Kelvin source is due to the lower inductance of the driver loop of the 4L MOSFET, instead of the decoupling between the driver and power loops. In detail, an inductor is added to the gate path of the 4L MOSFET to obtain a total inductance in the driver loop equal to the 3L counterpart. The experimental results show that the 4L MOSFET presents the same drain current slew rate under this condition, although the driver and power loops are still decoupled. Full article

DC–DC buck converters have been designed by incorporating different control stages to drive the switches. Among the most commonly used controllers, the sliding mode control (SMC) and proportional-integral-derivative (PID) controller have shown advantages in accomplishing fast slew rate, reducing settling time and mitigating overshoot. The proposed work introduces the implementation of both SMC and PID controllers by using the field-programmable gate array (FPGA) device. The FPGA is chosen to exploit its main advantage for fast verification and prototyping of the controllers. In this manner, a DC–DC buck converter is emulated on an FPGA by applying an explicit multi-step numerical method. The SMC controller is synthesized into the FPGA by using a signum function, and the PID is synthesized by applying the difference quotient method to approximate the derivative action, and the second-order Adams–Bashforth method to approximate the integral action. The FPGA synthesis of the converter and controllers is performed by designing digital blocks using computer arithmetic of 32 and 64 bits, in fixed-point format. The experimental results are shown on an oscilloscope by using a digital-to-analog converter to observe the voltage regulation generated by the SMC and PID controllers on the DC–DC buck converter. Full article

Accurately predicting the payload movement and ensuring efficient control during dynamic tower crane operations are crucial for crane safety, including the ability to predict payload mass within a safe or normal range. This research utilizes deep learning to accurately predict the normal and abnormal payload movement of tower cranes. A scaled-down tower crane prototype with a systematic data acquisition system is built to perform experiments and data collection. The data related to 12 test case scenarios are gathered, and each test case represents a specific combination of hoisting and slewing motion and payload mass to counterweight ratio, defining tower crane operational variations. This comprehensive data is investigated using a novel attention-based deep neural network with Tree-Structured Parzen Estimator optimization (TPE-AttDNN). The proposed TPE-AttDNN achieved a prediction accuracy of 0.95 with a false positive rate of 0.08. These results clearly demonstrate the effectiveness of the proposed model in accurately predicting the tower crane payload moving condition. To ensure a more reliable performance assessment of the proposed AttDNN, we carried out ablation experiments that highlighted the significance of the model’s individual components. Full article

A system-level implementation of a parallel-path hybrid switched-capacitor amplifier is presented in this paper. The proposed parallel-path amplifier incorporates a gain and slew rate-boosting switching path in parallel with an embedded assisted SAR path, aiming for IoT applications. As an alternative concept to the conventional analog topologies, the proposed amplifier combines nonlinear and linear paths to provide coarse and fine amplifications. In the coarse amplification, a high current is provided through a switching path for a fraction of time, which improves the slew rate and open-loop DC gain without adding significant static current. Moreover, high accuracy is achieved through the embedded assisted SAR path, which provides a resolution of 1/2^N. In addition, each extra bit of the embedded SAR path improves the total open-loop DC gain by 6 dB. The theory of operation is performed to study how the switching and assisted SAR paths can enhance the amplifier’s settling error. In addition, an existence trade-off between the coarse amplification error and the capacitive digital-to-analog converter’s number of bits is investigated. The theory and system-level simulation show that the gain and slewing restrictions of the conventional topologies, especially in advanced CMOS technology, can be handled much easier by this parallel combination, where the switching path and assisted SAR path combination provides a high slewing capability and high DC open-loop gain. Full article