Search Results (26)

Compact, broadband, multi-channel RF chips with low loss and high integration are required for high-performance phased-array systems. Presented in this paper is a four-channel, multifunction RF chip operating in the 5–18 GHz frequency range that integrates broadband phase shifting, amplitude control, power amplification, and switching functions. The chip is designed to have flip-chip bonding and stacked gold bumps to enable the compact 3D integration of the GaAs pHEMT and Si-CMOS. To ensure high-density interconnects with minimal parasitic effects, a fan-in redistribution process is implemented. The RF front-end part of this chip, fabricated through a 0.15 µm GaAs pHEMT process, integrates 6-bit digital phase shifters, 6-bit digital attenuators, low-noise amplifiers (LNAs), power amplifiers (PAs), and single-pole double-throw (SPDT) switches. To enhance multi-channel isolation and reduce crosstalk between RF chips and digital circuits, high isolation techniques, including a ground-coupled shield layer in the fan-in process and on-chip shield cavities, are utilized, which achieve isolation levels greater than 41 dB between adjacent RF channels. The measurement results demonstrate a reception gain of 0 dB with ±0.6 dB flatness, an NF below 11 dB, and transmit gain of more than 10 dB, with a VSWR of below 1.6 over the entire 5–18 GHz frequency band. The 6-bit phase shifter achieves a root mean square (RMS) phase error below 2.5° with an amplitude variation of less than 0.8 dB, while the 6-bit attenuator exhibits an RMS attenuation error of below 0.5 dB and a phase variation of less than 7°. The RF and digital chips are heterogeneously integrated using flip-chip and fan-in technology, resulting in a compact chip size of 6.2 × 6.2 × 0.33 mm³. These results validate that this is a compact, high-performance solution for advanced phased-array radar applications. Full article

This paper presents a novel adaptive cell recombination strategy for balancing lithium-ion battery packs, targeting electric vehicle (EV) applications. The proposed method dynamically adjusts the series–parallel configuration of individual cells based on instantaneous state of charge (SoC) and load demand, without relying on conventional DC-DC converters or passive components. A hardware-efficient switching topology using SPDT (Single Pole Double Throw) switches enables flexible recombination and fault isolation with minimal complexity. The control algorithm, implemented in MATLAB/Simulink, evaluates multiple cell-grouping configurations to optimize balancing speed, energy retention, and operational safety. Simulation results under charging, discharging, and resting conditions demonstrate up to 80% faster balancing compared to sequential methods, with significantly lower component count and minimal energy loss. Validation using Panasonic NCR18650PF cells confirms the model’s real-world applicability. The method offers a scalable, high-speed, and energy-efficient solution for integration into next-generation battery management systems (BMS), achieving performance gains typically reserved for more complex converter-based architectures. Full article

In this study, a single-pole double-throw (SPDT) switch for Sub-6 GHz application is designed. In particular, a shunt inductor is connected to the antenna port of the switch for ESD (electrostatic discharge) protection in RF (radio frequency) front end module. The shunt inductor not only serves as an ESD protection device, but also serves as a component of a parallel resonance circuit to suppress insertion loss of the switch. In addition, in order to secure the power handling capability, transistors turned off in the transmit (Tx) mode are implemented as quadruple-gate transistors. An SPDT switch is fabricated using GaAs pHEMT provided in the 500 nm GaAs BiFET process to verify the feasibility of the proposed switch structure. The operating frequency is set from 3 GHz to 5 GHz. The insertion loss and isolation measured in the Tx mode are lower than 0.35 dB and higher than 31.6 dB, respectively. The insertion loss and isolation measured in the Rx mode are lower than 0.32 dB and higher than 33.9 dB, respectively. The chip size including test pads is 0.890 × 0.875 mm². Full article

Spectrum conversion is one of the important applications in the non-linear electromagnetic (EM) field, which is widely used in antennas, wireless communication, radar imaging, etc. However, controlling spectrum conversion with excellent retrospective characteristics at oblique incidence directions remains a major issue in microwave systems. In this paper, a time-modulated Van Atta array is proposed to manipulate the spectral distribution of the echo signal. The array prototype experiments are conducted to demonstrate the variation properties of the monostatic radar cross section (RCS) at oblique incidence directions. On this basis, the periodic modulation model of the retrospective signal is established for the time-modulated Van Atta array. Several discrete harmonic components are symmetrically distributed on both sides of the original spectra. The influence of modulation parameters on the generated harmonics is analyzed in detail. The array prototype experiment is carried out, and the variation characteristics of the monostatic RCS in the oblique incidence direction are verified. Full article

The deployment of fifth-generation (5G) and beyond-5G wireless communication systems necessitates advanced transceiver architectures to support high data rates, spectrum efficiency, and energy-efficient designs. This paper presents a highly adaptive reconfigurable receiver front-end (HARRF) designed for 5G and satellite applications, integrating a switchable low noise amplifier (LNA) and a single pole double throw (SPDT) switch. The HARRF architecture supports both X-band (8–12 GHz) and K/Ka-band (23–28 GHz) operations, enabling seamless adaptation between radar, satellite communication, and millimeter-wave (mmWave) 5G applications. The proposed receiver front-end employs a 0.15 μ$\mathrm{m}$ pseudomorphic high electron mobility transistor (pHEMT) process, optimised through a three-stage cascaded LNA topology. A switched-tuned matching network is utilised to achieve reconfigurability between X-band and K/Ka-band. Performance evaluations indicate that the X-band LNA achieves a gain of 23–27 dB with a noise figure below 7 dB, whereas the K/Ka-band LNA provides 23–27 dB gain with a noise figure ranging from 2.3–2.6 dB. The SPDT switch exhibits low insertion loss and high isolation, ensuring minimal signal degradation across operational bands. Network analysis and scattering parameter extractions were conducted using advanced design system (ADS) simulations, demonstrating superior return loss, power efficiency, and impedance matching. Comparative analysis with state-of-the-art designs shows that the proposed HARRF outperforms existing solutions in terms of reconfigurability, stability, and wideband operation. The results validate the feasibility of the proposed reconfigurable RF front-end in enabling efficient spectrum utilisation and energy-efficient transceiver systems for next-generation communication networks. Full article

Two K-band switch circuits, each consisting of a single-pole double-throw (SPDT) switch, have been built using a 0.15 μm GaAs process. One circuit utilizes diode techniques while the other utilizes field effect transistor (FET) techniques. The diode single-pole double-throw switches that have been devised exhibit exceptional linearity and are capable of withstanding high power levels. The switches exhibit a return loss of 10 dB or higher, an insertion loss of 3 dB or lower, and operate within a frequency range of 19 GHz to 25 GHz. They have a compact design with a core size of only 1.05 mm² and consume a total power of 136.8 mW. The FET SPDT switch circuits are created utilizing a parallel–parallel quarter-wavelength transmission line architecture. This design allows for a higher power output compared to using a diode. The transistorized single-pole double-throw switch circuit is designed using a parallel–parallel quarter-wavelength transmission line architecture. This design ensures a low insertion loss. By adjusting the length of the transmission line, the circuit can operate in both frequency bands; the K-band and Ka-band. Full article

This paper analyzes, designs and implements a reconfigurable phase-shifted full-bridge (PSFB) converter. It adopts the topology of the traditional PSFB converter and incorporates clamping circuits to solve some fundamental problems of conventional topology. In addition, auxiliary switches are employed for output reconfiguration, which allows expanding the output voltage range without compromising the system efficiency. Single pole double throw (SPDT) mechanical switches are used to realize series and parallel connections. In this paper, the characterization of the PSFB converter with clamping circuit and its design considerations are discussed. A 10 kW prototype with a power density of 0.485 W/cm³, 900 V input voltage and 400/800 V nominal output voltage was manufactured. The experimental results validated the analysis and confirmed the high conversion efficiency for a wide load range; an efficiency of 96.69% was obtained for the full load condition. Full article

A 28 GHz digitally controlled 6-bit phase shifter with a precision calibration technique in GaN high-electron mobility transistor (HEMT) technology is presented for Ka-band phased-array systems and applications. It comprises six stages, in which stages 1 and 2 for 5.625° and 11.25° are designed in the form of a switched-line circuit, and stages 3, 4, and 5 for 22.5°, 45°, and 90° are designed in the form of a switched-filter circuit. The final stage 6 for 180° is designed in a single-to-differential balun followed by a single-pole double-throw (SPDT) switch for achieving an efficient phase inversion. A novel continuous tuning calibration technique is proposed to improve the phase accuracy. It controls the gate bias voltage of off-state HEMTs at the stage 6 SPDT switch for fine calibration of the output phase. Fabricated in a 0.15 μm GaN HEMT process using a die size of 1.75 mm², the circuit produces 64 phase states at 28 GHz with a 5.625° step. The experimental results show that the Root-Mean-Square (RMS) phase error is significantly improved from 8.56° before calibration to 1.08° after calibration. It is also found that the calibration does not induce significant changes for other performances such as the insertion loss, RMS amplitude error, and input-referred P_1dB. This work successfully demonstrates that the GaN technology can be applied to millimeter-wave high-power phased-array transceiver systems. Full article

This paper presents a highly integrated C-band RF transceiver front-end design consisting of two Single Pole Double Throw (SPDT) transmit/receive (T/R) switches, a Low Noise Amplifier (LNA), and a Power Amplifier (PA) for Ultra-Wideband (UWB) positioning system applications. When fabricated using a 0.25 μm GaAs pseudomorphic high electron mobility transistor (pHEMT) process, the switch is optimized for system isolation and stability using inductive resonance techniques. The transceiver front-end achieves overall bandwidth expansion as well as the flat noise in receive mode using the bandwidth expansion technique. The results show that the front-end modules (FEM) have a typical gain of 22 dB in transmit mode, 18 dB in receive mode, and 2 dB noise in the 4.5–8 GHz band, with a chip area of 1.56 × 1.46 mm². Based on the available literature, it is known that the proposed circuit is the most highly integrated C-band RF transceiver front-end design for UWB applications in the same process. Full article

We propose a single-pole double-throw (SPDT) switch with low insertion loss (IL), high isolation, and high linearity for a 28 GHz 5G new radio. The transmit (TX) path is a π-network consisting of a parallel dynamic-threshold metal–oxide–semiconductor (DTMOS) transistor, M₁, with large body-floating resistance, R_B (DTMOS-R M₁), a series one-eighth-wavelength (λ/8) transmission line (TL), and a parallel capacitance, C_ant. The series λ/8-TL in conjunction with the parallel C_ant and transistors’ capacitance constitute an equivalent λ/4-TL with a characteristic impedance of 50 Ω. This leads to low IL in the TX mode and decent isolation in the receive (RX) mode. The RX path is an L-network constituting a series impedance (of parallel inductance L₁ and DTMOS-R M₂) and a parallel DTMOS-R M₃. This leads to a decent IL in the RX mode and isolation in the TX mode. The first SPDT switch (SPDT SW1) is designed and implemented in a 90 nm complementary metal–oxide–semiconductor (CMOS) with a top metal thickness (TMT) of 3.4 μm. A comparative SPDT switch (SPDT SW2) in a 0.18 μm CMOS with a thinner TMT of 2.34 μm is also designed and implemented. In the TX mode, SPDT SW1 achieves a measured IL of 0.67 dB at 28 GHz and 0.58–1 dB for 17–34.9 GHz and a measured isolation of 44.3 dB at 28 GHz and 25.6–62.3 dB for 17–34.9 GHz, one of the best IL and isolation results ever reported for millimeter-wave CMOS SPDT switches. The measured input 1 dB compression point (P_1dB) is 28.5 dBm at 28 GHz. Moreover, in the RX mode, SPDT SW1 attains a measured IL of 1.9 dB at 28 GHz and 1.83–2.1 dB for 25–38.3 GHz and an isolation of 25 dB at 28 GHz and 24.5–27 dB for 25–38.3 GHz. The measured P_1dB is 24 dBm at 28 GHz. Full article

This paper presents a wideband 4-bit true time delay IC using a 0.25 μm GaN HEMT (High-Electron-Mobility Transistor) process for the beam-squint-free phased array antennas. The true time delay IC is implemented with a switched path circuit topology using DPDT (Double Pole Double Throw) with no shunt transistor in the inter-stages to improve the bandwidth and SPDT (Single Pole Single Throw) switches at the input and the output ports. The delay lines are implemented with CLC π-networks with the lumped element to ensure a compact chip size. A negative voltage generator and an SPI controller are implemented in the PCB (Printed Circuit Board) due to the lack of digital control logic in GaN technology. A maximum time delay of ~182 ps with a time delay resolution of 10.5 ps is achieved at DC–6 GHz. The RMS (Root Mean Square) time delay and amplitude error are <5 ps and <0.6 dB, respectively. The measured insertion loss is <6.8 dB and the input and output return losses are >10 dB at DC–6 GHz. The current consumption is nearly zero with a 3.3 V supply. The chip size including pads is 2.45 × 1.75 mm². To the authors’ knowledge, this is the first demonstration of a true time delay IC using GaN HEMT technology. Full article

This paper presents a novel frequency reconfigurable antenna design for sub-6 GHz applications, featuring a unique combination of antenna elements and control mechanisms. The antenna is composed of an outer split-ring resonator loaded with an inner spiral resonator, which can be adjusted through the remote control of PIN diode or Single Pole Double Throw (SPDT) switches. The compact antenna, measuring 22 × 16 × 1.6 mm³, operates in broadband, or tri-band mode depending on the ON/OFF states of switches. The frequency reconfigurability is achieved using two BAR64−02V PIN diodes or two CG2415M6 SPDT switches acting as RF switches. SPDT switches are controlled remotely via Arduino unit. Additionally, the antenna demonstrates an omni-directional radiation pattern, making it suitable for wireless communication systems. Experimental results on an FR-4 substrate validate the numerical calculations, confirming the antenna’s performance and superiority over existing alternatives in terms of compactness, wide operating frequency range, and cost-effectiveness. The proposed design holds significant potential for applications in Wi-Fi (IEEE 802.11 a/n/ac), Bluetooth (5 GHz), ISM (5 GHz), 3G (UMTS), 4G (LTE), wireless backhaul (4G and 5G networks), WLAN (IEEE 802.11 a/n/ac/ax), 5G NR n1 band, and Wi-Fi access points due to its small size and easy control mechanism. The antenna can be integrated into various devices, including access points, gateways, smartphones, and IoT kits. This novel frequency reconfigurable antenna design presents a valuable contribution to the field, paving the way for further advancements in wireless communication systems. Full article

This paper describes Monolithic Microwave Integrated Circuits (MMICs) for an X-band radar transceiver front-end implemented in 0.25 μm GaN High Electron Mobility Transistor (HEMT) technology. Two versions of single pole double throw (SPDT) T/R switches are introduced to realize a fully GaN-based transmit/receive module (TRM), each of which achieves an insertion loss of 1.21 dB and 0.66 dB at 9 GHz, IP_1dB higher than 46.3 dBm and 44.7 dBm, respectively. Therefore, it can substitute a lossy circulator and limiter used for a conventional GaAs receiver. A driving amplifier (DA), a high-power amplifier (HPA), and a robust low-noise amplifier (LNA) are also designed and verified for a low-cost X-band transmit-receive module (TRM). For the transmitting path, the implemented DA achieves a saturated output power (P_sat) of 38.0 dBm and output 1-dB compression (OP_1dB) of 25.84 dBm. The HPA reaches a P_sat of 43.0 dBm and power-added efficiency (PAE) of 35.6%. For the receiving path, the fabricated LNA measures a small-signal gain of 34.9 dB and a noise figure of 2.56 dB, and it can endure higher than 38 dBm input power in the measurement. The presented GaN MMICs can be useful in implementing a cost-effective TRM for Active Electronically Scanned Array (AESA) radar systems at X-band. Full article

This paper addresses the design of a hybrid beamforming system considering the circuit parameter of six-bit millimeter-wave phase shifters based on the process design kit. The phase shifter design adopts 45 nm CMOS silicon on insulator (SOI) technology at 28-GHz. Various circuit topologies are utilized, and in particular, a design is presented based on switched LC components, connected in a cascode manner. The phase shifter configuration is connected in a cascading manner to get the 6-bit phase controls. Six different phase shifters are obtained, which are 180°, 90°, 45°, 22.5°, 11.25°, and 5.6°, with a minimum number of LC components. The circuit parameters of the designed phase shifters are then incorporated in a simulation model of hybrid beamforming for a multiuser MIMO system. The number of OFDM data symbols used in the simulation is ten for eight users, 16 QAM modulation schemes, −25 dB SNR, 120 simulation runs, and around 170 h runtime. Simulation results are obtained considering four and eight users, assuming accurate technology-based models of RFIC components of the phase shifter as well as ideal phase shifter parameters. The results indicate that the performance of the multiuser MIMO system is affected by the accuracy level of the phase shifter RF component models. The outcomes also reveal the performance tradeoff based on user data streams and the number of BS antennas. By optimizing the amount of parallel data streams per user, higher data transmission rates are achieved, while maintaining acceptable error vector magnitude (EVM) values. In addition, stochastic analysis is conducted to investigate the distribution of the RMS EVM. The outcomes show that the best fitting of RMS EVM distribution of the actual and ideal phase shifters agreed with the log-logistic and logistic distributions, respectively. The obtained (mean, variance) values of the actual phase shifters based on accurate library models are (46.997, 481.36), and for ideal components the values are (36.47, 10.44). Full article

Beamwidth-reconfigurable antennas are useful for the intersatellite link of low earth orbit formation flying and constellation, as they prevent unauthorized satellites from eavesdropping. In this article, a circularly polarized slot array antenna based on a half-mode substrate-integrated waveguide (HMSIW) for the K-band beamwidth reconfiguration is proposed using a new radio frequency (RF) switch structure and a pair of modified −45° and +45° linearly polarized HMSIW slot arrays for the dual operation of a single-pole double-throw (SPDT)/a power divider (PD) and easy integration with other components, respectively. The RF switch structure consists of a T-junction PD, λ/4 lines, and beam lead PIN diodes with current control resistors and without a DC block circuit for low DC power consumption and size reduction. The −45°/+45° linearly polarized HMSIW slot arrays providing linear and circular polarizations (LP and CP, respectively) are operated for CP. The use of a short-circuited termination instead of dissipative termination results in easier integration with other components because the 16 radiating slots consume most of the input power. The dimension of the beamwidth-reconfigurable antenna including the bottom metal layer is 157.2 × 23.3 × 0.254 mm³ (12.5λ₀ × 1.86λ₀ × 0.0202λ₀). The RF switch for the SPDT shows the insertion losses of 1.8–2.3 and 16.7–24.2 dB and an isolation of 20.9–33.4 dB for both outputs within the 10-dB bandwidth. The RF switch for the PD has an insertion loss of 3.9–4.8 dB. The one- and two-antenna operation modes of the CP antenna provide the gains of 9.44 and 6.99 dBic, the axial ratios of 2.24 and 3.47 dB, and the horizontal beamwidths of 35.8° and 78.2°, respectively. Full article