Search Results (31)

This review aims to help researchers, designers, and engineering staff extend operational times and elevate robots’ efficiency. The study represents an up-to-date summary of power electronic converters, their classification, and solutions found by leading robot manufacturers. While some advances have not yet become commonplace in mainstream robotics, their crucial role and promise are evident for expanding automation capabilities in various stationary and mobile applications. The work demonstrates two interconnected directions that are currently applied or are planned to be employed in the future as key factors contributing to reducing losses and accelerating energy transformation. The former direction relates to the implementation of wide bandgap devices that are superior to silicon-based electronics. The second trend concerns the advancements of converter topologies. In this way, the article presents how rectifiers, inverters, and their combinations provide voltage control, current management, and waveform shaping, thereby revealing their potential in improving energy utilisation in industry, transport, agriculture, households, and other sectors of vital activity. Full article

This paper proposes a monolithic electrostatic discharge/electrical overstress (ESD/EOS) co-protection device featuring gradual triggering by silicon-controlled rectifier (SCR) and metal–oxide semiconductor (MOS) structures, demonstrating enhanced voltage clamping and current-conducting capabilities. Compared with conventional PMOS-triggered SCR (PMOS-SCR) for ESD protection, the proposed dual-PMOS-triggered SCR (DPMOS-SCR) architecture within a compact area achieves monolithic ESD/EOS protection performance due to the strategic semiconductor structures integration. ESD measurement results show that the snapback voltage of the designed DPMOS-SCR with the width of 170 μm is approximately 2.5 V, the failure current (I_t2) is up to 4.5 A, and both the simulation and measurement results demonstrate that the designed DPMOS-SCR is helpful for reducing the leakage current and accelerating the response time. By embedding an additional p-type well in the DPMOS-SCR, the optimized DPMOS-SCR (ODPMOS-SCR) presents a higher breakdown voltage, trigger voltage, and holding voltage while keeping a similar I_t2. The EOS current-conducting ability measured by a surge test system indicates the peak surge current is up to 3.7 A, demonstrating superior monolithic ESD/EOS protection performance. As a result, the designed DPMOS-SCR and ODPMOS-SCR structures achieve high-voltage ESD/EOS co-protection with high efficiency in a small chip area, providing a chip-scale solution for improving the reliability of high-voltage ICs. Full article

This work develops a novel compact Silicon-Controlled Rectifier (SCR) model incorporating self-heating effects, extending the conventional Ebers–Moll (E–M) framework for Bipolar Junction Transistors (BJTs) by comprehensively integrating parasitic effects. The temperature dependence of critical device parameters, including junction capacitances, emitter resistances, and saturation currents, is systematically characterized to accurately predict the device’s electrical behavior under Electrostatic Discharge (ESD) stress. Furthermore, a self-heating modeling approach is introduced based on the SCR layout characteristics. The impact of self-heating on SCR transient response was verified by comparing simulation results with measurements from SCR devices fabricated in a 0.18 µm Bipolar-CMOS-DMOS (BCD) process. Comparative analysis demonstrates superior accuracy over existing models. The proposed SCR model includes a complete definition of parameters and electrical relationships, ensuring compatibility with various Electronic Design Automation (EDA) platforms. Full article

This paper examines the current state of Home Energy Management Systems (HEMSs), highlighting the key role of the single-phase bidirectional rectifier (SPBR). It provides a detailed design process for the converter used in HEMSs, with a particular focus on the bidirectional charge and discharge of high-voltage batteries. The converter’s operating conditions were determined through a comprehensive evaluation of its components, which were designed and assessed to enable accurate power loss calculations. This approach ensures proper component sizing and a clear understanding of the converter’s efficiency. A specialized electronic control circuit manages two operating modes of the converter: a boost rectifier with power factor correction (PFC) and a sinusoidal pulse width modulation (SPWM) inverter. To validate the design, a 7.4 kW prototype was developed using silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs). The prototype achieved a peak efficiency of nearly 98% in both modes, with a unity power factor (PF) and total harmonic distortion (THD) below 7% at full power. Full article

A direct bidirectional current discharge path between the input/output (I/O) and ground (GND) is essential for the robust protection of charging device models (CDM) in the tightly constrained design parameters of advanced low-voltage (LV) processes. Dual-direction silicon controlled rectifiers (DDSCRs) serve as ESD protection devices with high efficiency unit area discharge, enabling bidirectional electrostatic protection. However, the high trigger voltage of conventional DDSCR makes it unsuitable for ASICs used for the preamplification of biomedical signals, which only operate at low supply voltage. To address this issue, a self-biased triggered DDSCR (STDDSCR) structure is proposed to further reduce the trigger voltage. When the ESD pulse comes, the external RC trigger circuit controls the PMOS turn-on by self-bias, and the current release path is opened in advance to reduce the trigger voltage. As the ESD pulse voltage increases, the SCR loop opens to establish positive feedback and drain the amplified current. Additionally, the junction capacitance is decreased through high-resistance epitaxy and low-concentration P-well injection to further lower the trigger voltage. The simulation results of LTspice and TCAD respectively demonstrate that ESD devices can clamp transient high voltages earlier, with low parasitic capacitance and leakage current suitable for ESD protection of high-speed ports up to 1.5 V under normal operating conditions. Full article

Overshoot and undershoot caused by the current load impact the accuracy of the required output voltage and circuit performance. The transient response issue in existing low-dropout (LDO) regulators is a dynamic specification that must be addressed at the design stage. This transient response is influenced by system parameters such as stability and gain. The LDO regulator suggested in this study is designed to minimize the change in output voltage by considerably enhancing the gain using a dynamic dual buffer structure. A dynamic dual buffer is utilized to effectively control undershoot and overshoot. Under the conditions that the input voltage range is from 3.3 to 4.5 V, the maximum load current is 300 mA, the output voltage is 3 V, and the output of the proposed LDO regulator with the dynamic dual buffer structure has undershoot and overshoot voltages of 41 mV and 31 mV, respectively. That is, the output voltage of the proposed LDO regulator effectively provided and discharged an additional current suited for the undershoot/overshoot conditions to enhance the transient response characteristics. Furthermore, the electrostatic discharge (ESD) robustness characteristics of the proposed LDO regulator improved because of the silicon-controlled rectifier underlying the ESD protection device embedded in the output node and power line. Full article

Aiming at the problem that silicon-controlled rectifiers (SCR) and pulse width modulation (PWM) rectifiers cannot balance high power levels, high hydrogen production efficiency, and high grid connected quality in the current research on rectifier power supplies for electrolytic hydrogen production, a new hybrid rectifier topology based on a modular multilevel converter (MMC) is proposed. The hybrid topology integrates a silicon-controlled rectifier (SCR) with an auxiliary power converter, wherein the SCR is designated as the primary power source for electrolytic hydrogen production. The auxiliary converter employs a cascaded modular multilevel converter (MMC) and an input-series-output-parallel (ISOP) phase-shifted full-bridge (PSFB) arrangement. This configuration allows the auxiliary converter to effectively mitigate AC-side harmonics and minimize DC-side ripple, concurrently transmitting a small amount of power. The effectiveness of the hybrid rectifier in achieving low ripple and harmonic distortion outputs was substantiated through hardware-in-the-loop experiments. Notably, the hybrid topology is characterized by its enhanced electric-to-hydrogen conversion efficiency, elevated power density, cost efficiency, and improved grid compatibility. Full article

To cope with the much narrower ESD design window in 28 nm CMOS technology, a novel diode-triggered silicon-controlled rectifier with an extra discharge path (EDP-DTSCR) for ESD protection is proposed in this paper. Compared with the traditional DTSCR, the proposed DTSCR has an enhanced current discharge capability that is achieved by creating a slave SCR path in parallel with the master SCR path. Moreover, the improved triggering and holding characteristic can be obtained by the proposed EDP-DTSCR. By sharing the anode emitter junction, a slave SCR path is constructed that is symmetrical to the position of the master SCR path to add an additional ESD discharge path to the EDP-DTSCR. In this way, the current discharge capability of the entire device is obviously improved. The TCAD simulation result shows that the proposed device has a remarkably lower on-resistance compared with the traditional DTSCR and the DTSCR with p-type guard ring (PGR-DTSCR). In addition, it is structurally optimized to further increase the holding voltage and reduce the trigger voltage to improve the anti-latching capability of the device, which is more conducive to the ESD protection window application of 28 nm CMOS technology. Full article

Continuously scaling down and decreasing operation voltages of ICs, from the 5 V TTL-compatible voltage to 3.3 V, then 1.2 V, and now 0.8 V for low-power ICs, results in more stringent electrostatic discharge protection design requirements, such as a narrow ESD design window, low operation voltage, and high ESD robustness. Based on traditional diode string and diode-triggered silicon-controlled rectifiers, an enhanced diode-triggered silicon-controlled rectifier is proposed to meet the requirements of low-voltage integrated circuits as bidirectional electrostatic discharge protection. The new device employs an additional PMOS and NMOS in the N-well and P-well, respectively, to offer additional current paths along the surface to significantly enhance its robustness. TCAD simulation shows that the device is triggered by both the diode strings and embedded MOS, making the device turn on faster and the current distribution more uniform during the ON state owing to the additional surface current paths. The proposed new device has excellent dual-directional ESD protection performance with a figure of merit of 4.01 mA/um2, which is about a 71% improvement compared with the conventional diode-triggered silicon-controlled rectifier. It also has higher area efficiency, lower trigger voltage, lower current leakage, and a faster turn-on speed. The proposed enhanced diode-triggered silicon-controlled rectifier is an attractive ESD protection solution for ultra-low-voltage ICs. Full article

In prior technology, system-level electrostatic discharge (ESD) tests under environment change conditions mainly focused on testing the effect of a high-temperature environment. i.e., the effect on internal circuits of heat generated outside. However, few studies have explored the effect of ambient relative humidity changes on integrated circuits (ICs). Therefore, this study will analyze the performance of various ESD protection components under high ambient temperature and high ambient relative humidity. The ESD protection devices are tested for the ESD robustness of the silicon-controlled rectifiers (SCR) under a harsh environment and the measurement results are discussed and verified in the CMOS process. Full article

This study aims to develop a 30 kHz/12 kW silicon carbide (SiC)/Si integrated hybrid power module (iHPM) for variable frequency drive applications, particularly industrial servo motor control, and, additionally, to theoretically and experimentally assess its dynamic characteristics and efficiency during operation. This iHPM integrates a brake circuit, a three-phase Si rectifier, and a three-phase SiC inverter within a single package to achieve a minimal current path. A space-vector pulse width modulation (SVPWM) scheme is used to control the inverter power switches. In order to reduce parasitic inductance and power loss, an inductance cancellation design is implemented in the Si rectifier and SiC inverter. The switching transients and their parasitic effects during a three-phase operation are assessed through an electromagnetic-circuit co-simulation model, by which the power loss and efficiency of the iHPM are estimated. The modeled parasitic inductance of the inverter is validated through inductance measurement, and the effectiveness of the simulated results in terms of switching transients and efficiency is verified using the experimental results of the double pulse test and open-loop inverter operation, respectively. In addition, the power loss and efficiency of the SiC MOSFET inverter are experimentally compared against those of a commercial Si IGBT inverter. Full article

In terms of sustainable power semiconductors, the embedding of an electrostatic discharge (ESD) protection circuit in an integrated circuit (IC) is an important aspect. In order for the semiconductor circuit to operate continuously or stably, a sufficient protection circuit against external surges must be configured. The purpose of this thesis is not only to effectively operate the low-dropout (LDO) regulator according to the load current, but to also secure high reliability against ESD situations by embedding an ESD protection circuit at the IC level. Moreover, the existence and nonexistence of an ESD protection circuit at the IC level is directly related to reliability. The proposed LDO regulator has high reliability against ESD situations using an embedded silicon controlled rectifier (SCR)-based ESD protection circuit in the I/O clamp and power clamp. The results revealed that the LDO regulator can not only effectively control the output voltage according to the load current, but it can also stably maintain the output voltage against the ESD surge. Moreover, the proposed LDO regulator with an embedded ESD protection circuit implemented in a 0.13 μm BCD process maintained an undershoot voltage of 21 mV and overshoot voltage of 19 mV for a load current of 300 mA. Full article

The holistic objective of producing 100% renewable generated electricity motivates the development of low-power and efficient domestic wind turbines. The wind turbine’s efficiency can be maximized by operating it in a variable speed configuration, thus harvesting all the wind power. However, the harvesting process requires a two-stage conversion from AC to DC and from DC–DC or DC–AC. The paper aims to analyze the performance of the first stage of AC–DC rectification in terms of output voltage ripple and voltage regulation when the loading conditions vary abruptly. In addition, this work investigates the basic uncontrolled and controlled rectification methods for low-power wind turbines. The role of the output capacitance and its effect on output voltage ripples is illustrated. Finally, the paper highlights the design of a three-phase controlled rectifier using a simple yet effective firing angle control of a silicon-controlled rectifier (SCR) device. The delay caused due to the firing angle variations is reported in the simulations and experimental results to support the conclusion drawn from this study. Full article

CMOS integrated circuits are vulnerable to electrostatic discharge (ESD); therefore, ESD protection circuits are needed. On-chip ESD protection is important for both component-level and system-level ESD protection. In this work, on-chip ESD protection circuits for multi-Gbps high-speed applications are studied. π-shaped ESD protection circuit structures realized by staked diodes with an embedded silicon-controlled rectifier (SCR) and resistor-triggered SCR are proposed. These test circuits are fabricated in CMOS technology, and the proposed designs have been proven to have better ESD robustness and performance in high-speed applications. Full article

In this work, a new low voltage-triggered silicon-controlled rectifier named MTSCR is realized in a 65 nm CMOS process for low voltage-integrated circuits electrostatic discharge (ESD) protections. The MTSCR incorporates an external NMOSs-string, which drives the internal NMOS (INMOS) of MTSCR to turn on, and then the INMOS drive SCR structure to turn on. Compared with the existing low trigger voltage (V_t1) ESD component named diodes-string-triggered SCR (DTSCR), the MTSCR can realize the same low V_t1 characteristic but less area penalty of ~44.3% reduction. The results of the transmission line pulsing (TLP) measurement shows that the MTSCR possesses above 2.42 V holding voltage (V_h) and a low V_t1 of ~5.03 V, making it very suitable for the ESD protections for 1.8 V input/output (I/O) ports in CMOS technologies. Full article