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Keywords = delay locked loop

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18 pages, 5091 KB  
Article
A Fast-Locking PLL Using Low-Power Cycle Slippage Compensation and Accumulated Phase Error Correction
by Phuoc B. T. Huynh, Gyeong-Seok Lee and Tae-Yeoul Yun
Electronics 2026, 15(10), 1999; https://doi.org/10.3390/electronics15101999 - 8 May 2026
Viewed by 228
Abstract
This article presents a fast-locking phase-locked loop (PLL) that incorporates a low-power extended phase frequency detector (LPEPFD) and a discriminator-aided phase detector (DAPD) to simultaneously address cycle slippage and frequency overshoot issues during frequency and phase acquisition, respectively. Specifically, the proposed LPEPFD introduces [...] Read more.
This article presents a fast-locking phase-locked loop (PLL) that incorporates a low-power extended phase frequency detector (LPEPFD) and a discriminator-aided phase detector (DAPD) to simultaneously address cycle slippage and frequency overshoot issues during frequency and phase acquisition, respectively. Specifically, the proposed LPEPFD introduces a novel finite state machine architecture that extends the linear range of a conventional PFD without requiring a power-hungry counter, thereby eliminating cycle slippage and reducing the time required for frequency acquisition while maintaining switching activity and power consumption comparable to those of the conventional design. Moreover, after frequency convergence, the DAPD quantizes the accumulated phase error, which is corrected by adaptively tuning the programmable delay lines without causing significant frequency overshoot seen in conventional PLLs, resulting in improved settling time. Fabricated using a 28 nm complementary metal oxide semiconductor (CMOS) process, the proposed fast-locking PLL occupies an area of 0.36 mm2 and operates over a frequency range of 2.6 to 3.2 GHz. Experimental results demonstrate a 0.84-μs settling time for a frequency hop from 2.6 to 3.1 GHz. The designed PLL consumes 5.6 mW of power from a supply of 1 V with an integral root-mean-square jitter of 1.27 ps from 1 kHz to 100 MHz. Full article
(This article belongs to the Special Issue Design of Low-Voltage and Low-Power Integrated Circuits, Volume 2)
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28 pages, 35540 KB  
Article
Sensorless Control of PMSM Based on Fuzzy Sliding Mode Observer and Non-Singular Terminal Sliding Mode Control
by Benjian Ruan, Gang Li, Longbao Liu and Yongqiang Fan
Appl. Sci. 2026, 16(5), 2544; https://doi.org/10.3390/app16052544 - 6 Mar 2026
Viewed by 552
Abstract
To address the chattering phenomenon and sensitivity to load disturbances in conventional sliding mode observers (SMO) for sensorless permanent magnet synchronous motor (PMSM) control, this paper proposes a robust sensorless control strategy integrating a fuzzy adaptive SMO with an improved sliding mode speed [...] Read more.
To address the chattering phenomenon and sensitivity to load disturbances in conventional sliding mode observers (SMO) for sensorless permanent magnet synchronous motor (PMSM) control, this paper proposes a robust sensorless control strategy integrating a fuzzy adaptive SMO with an improved sliding mode speed controller. In the observer design, a continuous hyperbolic tangent function, tanh (ax), replaces the traditional sign function, while a fuzzy logic controller adaptively tunes the convergence factor a to enhance estimation accuracy and suppress high-frequency chattering. Simultaneously, an adaptive quadrature phase-locked loop (AQPLL) is incorporated to achieve adaptive matching across various operating conditions by updating parameters online, which effectively reduces phase delay and improves the dynamic performance of rotor position and speed estimation. Furthermore, a non-singular terminal sliding mode control (NTSMC) strategy is employed in the outer speed loop with a proposed segmented terminal reaching law. This law ensures rapid response in large-error regions and mitigates steady-state oscillations in small-error regions, thereby strengthening system robustness against load disturbances. The stability of the proposed system is rigorously verified via Lyapunov stability analysis. Simulation and experimental results demonstrate that the proposed approach significantly reduces speed and position estimation errors under varying speeds and sudden load changes compared to the conventional SMO-PI method, while effectively suppressing system chattering to confirm its engineering feasibility. Full article
(This article belongs to the Section Electrical, Electronics and Communications Engineering)
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20 pages, 5457 KB  
Article
High-Precision Time-of-Arrival Estimation in HF Sensor Networks via Multipath Separation and Independent Tracking
by Qiwei Ji and Huabing Wu
Sensors 2026, 26(5), 1640; https://doi.org/10.3390/s26051640 - 5 Mar 2026
Viewed by 443
Abstract
High-frequency (HF) sensor networks play an irreplaceable role in remote sensing and emergency communications but suffer severely from ionospheric multipath interference, which degrades Time-of-Arrival (TOA) estimation accuracy. Conventional methods, such as the Generalized Cross-Correlation (GCC) and standard Delay-Locked Loops (DLL), often treat multipath [...] Read more.
High-frequency (HF) sensor networks play an irreplaceable role in remote sensing and emergency communications but suffer severely from ionospheric multipath interference, which degrades Time-of-Arrival (TOA) estimation accuracy. Conventional methods, such as the Generalized Cross-Correlation (GCC) and standard Delay-Locked Loops (DLL), often treat multipath components as noise, leading to significant measurement bias in dynamic environments. To address this, we propose a Multipath Separation and Independent Tracking (MSIT) architecture. This framework transforms multipath interference into valuable observables by establishing a closed-loop synergy: a Maximum Likelihood Estimation (MLE)-based module iteratively separates signal components, while parallel tracking loops update phase and delay parameters. Additionally, a super-resolution MUSIC algorithm is employed for initialization to resolve sub-chip multipath components. Simulations demonstrate that under disturbed channel conditions, the MSIT method achieves a mean delay estimation error reduction of about two orders of magnitude relative to the GCC method. Furthermore, field experiments on the Xi’an–Ürümqi link demonstrate its capability to stably resolve and track multiple propagation paths in real-world environments. This approach significantly enhances the measurement precision and reliability of HF sensing systems. Full article
(This article belongs to the Section Communications)
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16 pages, 2385 KB  
Article
Research on Robust Low-Delay PMSM Sensorless Control Method Based on Improved QPLL and Inductance Observation
by Sirui Xiao and Zhijia Yang
Energies 2026, 19(1), 213; https://doi.org/10.3390/en19010213 - 31 Dec 2025
Viewed by 394
Abstract
Model predictive control (MPC) ensures stable motor operation provided that accurate motor parameters and state information are available. However, in certain environments, direct sensor measurement of rotor position and speed is infeasible, and sensorless methods are required to estimate the rotor position and [...] Read more.
Model predictive control (MPC) ensures stable motor operation provided that accurate motor parameters and state information are available. However, in certain environments, direct sensor measurement of rotor position and speed is infeasible, and sensorless methods are required to estimate the rotor position and speed. Sensorless methods utilizing a sliding mode observer (SMO) and a quadrature phase-locked loop (QPLL) are widely adopted, but it may encounter issues such as inaccurate motor parameters and delayed measurement results. To address these challenges, this paper proposes an integrated method that employs a nonlinear extended state observer (NLESO) to reduce observation delays in rotor position estimation. Additionally, a model reference adaptive system (MRAS)-based inductance observer is utilized to correct parameter inaccuracies. This combined approach achieves robust motor control with low delay. Simulation results validate the effectiveness and robustness of the proposed method. Full article
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25 pages, 12910 KB  
Article
Experimental Evaluation of Pulsating and Rotating HFI Methods with Adaptive-Gain SMO for Sensorless IPM Compressor Drives
by Tunahan Sapmaz and Ahmet Faruk Bakan
World Electr. Veh. J. 2025, 16(12), 669; https://doi.org/10.3390/wevj16120669 - 11 Dec 2025
Cited by 1 | Viewed by 710
Abstract
This paper presents a comprehensive sensorless control approach for interior permanent magnet (IPM) motors, integrating high-frequency injection (HFI) and model-based observer techniques to ensure accurate rotor position estimation across a wide speed range. Two HFI strategies—pulsating and rotating—are investigated experimentally and compared in [...] Read more.
This paper presents a comprehensive sensorless control approach for interior permanent magnet (IPM) motors, integrating high-frequency injection (HFI) and model-based observer techniques to ensure accurate rotor position estimation across a wide speed range. Two HFI strategies—pulsating and rotating—are investigated experimentally and compared in combination with two observer structures: the conventional Sliding Mode Observer (SMO) and Adaptive-Gain SMO (AG-SMO). The AG-SMO dynamically adjusts its observer gain according to the estimated back-electromotive force (back-EMF) amplitude, significantly reducing chattering and improving estimation performance under varying load and noise conditions. A Frequency-Adaptive Complex Coefficient Filter (FACCF) and an Orthogonal Phase-Locked Loop (PLL) are incorporated to eliminate phase delay and enhance demodulation accuracy. Simulation and experimental results obtained using a 30 W, 20 V IPM motor demonstrate that the pulsating HFI + AG-SMO configuration achieves superior stability and noise immunity, while the rotating HFI + AG-SMO provides smoother and more accurate estimation. Overall, the proposed hybrid control framework achieves robust, high-precision, and sensorless operation for IPM motors over the wide speed range, offering a practical solution for applications such as inverter-driven compressor systems operating in noisy environments. Full article
(This article belongs to the Section Propulsion Systems and Components)
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13 pages, 4234 KB  
Article
Delay Locked Loop Based on Sawtooth Waveforms
by Andres Ayes and Eby G. Friedman
Analog 2026, 1(1), 1; https://doi.org/10.3390/analog1010001 - 24 Nov 2025
Viewed by 1155
Abstract
Reliable timing is a crucial issue in all synchronous systems. Delay locked loops are capable of dynamically synchronizing clock signals; the increasing speed of deeply scaled technologies however leads to long and complex delay lines. In this paper, a sawtooth-based delay locked loop [...] Read more.
Reliable timing is a crucial issue in all synchronous systems. Delay locked loops are capable of dynamically synchronizing clock signals; the increasing speed of deeply scaled technologies however leads to long and complex delay lines. In this paper, a sawtooth-based delay locked loop is proposed to address the increasing difficulty of delay generation in high speed systems. The proposed architecture replaces a conventional delay line with a sawtooth waveform-based mechanism for delay generation, reducing the need for numerous delay elements. The timing offset is mapped to a voltage level on the sawtooth waveform, where the required delay is the time to cross this voltage level. The architecture, evaluated using a 7 nm device model, achieves a locking speed as low as four cycles for a 1 GHz clock signal. The DLL achieves a full period locking range, lowers the clock skew to 16 ps at room temperature, and exhibits 65 ps clock skew variations over extreme temperature corners. Full article
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11 pages, 1602 KB  
Article
DLL Design with Wide Input Duty Cycle Range and Low Output Clock Duty Cycle Error
by Binyu Qin, Haoyu Qin, Chenyu Fang, Leilei Zhao and Peter Poechmueller
Micromachines 2025, 16(11), 1223; https://doi.org/10.3390/mi16111223 - 27 Oct 2025
Viewed by 987
Abstract
This paper presents the design of a Delay-Locked Loop (DLL) with a simple architecture and a wide input clock duty cycle range. The design is tailored to meet the increasing data rate and stringent clock requirements of modern semiconductor chips, with particular applicability [...] Read more.
This paper presents the design of a Delay-Locked Loop (DLL) with a simple architecture and a wide input clock duty cycle range. The design is tailored to meet the increasing data rate and stringent clock requirements of modern semiconductor chips, with particular applicability to dynamic random-access memory (DRAM) systems. The structure features two Bang-Bang Phase Detectors (BBPDs) to adjust the rising and falling edges of the divided clock. Implemented using a 65 nm CMOS process, the design was verified through simulation. At a working frequency of 3.2 GHz, the input clock duty cycle range spans from 18% to 72%, with a maximum output clock duty cycle error of just 0.6%, a peak-to-peak jitter of 15.73 ps, and a power consumption of 12.7 mW. Full article
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19 pages, 4859 KB  
Article
A Dual-Mode Adaptive Bandwidth PLL for Improved Lock Performance
by Thi Viet Ha Nguyen and Cong-Kha Pham
Electronics 2025, 14(20), 4008; https://doi.org/10.3390/electronics14204008 - 13 Oct 2025
Cited by 1 | Viewed by 3854
Abstract
This paper proposed an adaptive bandwidth Phase-Locked Loop (PLL) that integrates integer-N and fractional-N switching for energy-efficient RF synthesis in IoT and mobile applications. The architecture exploits wide-bandwidth integer-N mode for rapid lock acquisition, then seamlessly transitions to narrow-bandwidth fractional-N mode for high-resolution [...] Read more.
This paper proposed an adaptive bandwidth Phase-Locked Loop (PLL) that integrates integer-N and fractional-N switching for energy-efficient RF synthesis in IoT and mobile applications. The architecture exploits wide-bandwidth integer-N mode for rapid lock acquisition, then seamlessly transitions to narrow-bandwidth fractional-N mode for high-resolution synthesis and noise optimization. The architecture features a bandwidth-reconfigurable loop filter with intelligent switching control that monitors phase error dynamics. A novel adaptive digital noise filter mitigates ΔΣ quantization noise, replacing conventional synchronous delay lines. The multi-loop structure incorporates a high-resolution digital phase detector to enhance frequency accuracy and minimize jitter across both operating modes. With 180 nm CMOS technology, the PLL consumes 13.2 mW, while achieving 119 dBc/Hz in-band phase noise and 1 psrms integrated jitter. With an operating frequency range at 2.9–3.2 GHz from a 1.8 V supply, the circuit achieves a worst case fractional spur of −62.7 dBc, which corresponds to a figure of merit (FOM) of −228.8 dB. Lock time improvements of 70% are demonstrated compared to single-mode implementations, making it suitable for high-precision, low-power wireless communication systems requiring agile frequency synthesis. Full article
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26 pages, 14657 KB  
Article
A Simple Burst-Mode Multiple-Entropy TRNG Based on Standard Logic Primitives
by Bartosz Mikołaj Szkoda and Piotr Zbigniew Wieczorek
Electronics 2025, 14(19), 3803; https://doi.org/10.3390/electronics14193803 - 25 Sep 2025
Viewed by 946
Abstract
The paper introduces the concept of a True Random Number Generator (TRNG) based on an unstable circuit that uses only two types of logic devices: XOR gates and logic inverters forming delay lines. The core circuit ensures randomness in both the voltage (logical [...] Read more.
The paper introduces the concept of a True Random Number Generator (TRNG) based on an unstable circuit that uses only two types of logic devices: XOR gates and logic inverters forming delay lines. The core circuit ensures randomness in both the voltage (logical state) and time domains (duration of autonomous operation), while utilizing very few resources. Due to its low complexity, the proposed TRNG can be easily implemented in reconfigurable devices without sophisticated components such as Digital Clock Managers (DCM), Phase Locked Loops (PLL), or dedicated IP cores. The authors present a theoretical analysis of the TRNG using a Simulink macromodel, demonstrating chaotic behavior, and describe its implementation on a Complex Programmable Logic Device (CPLD) and additional verification on an FPGA. The randomness quality of the TRNG was validated using the standard National Institute of Standards and Technology (NIST) SP 800-22 battery of tests. Full article
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16 pages, 1935 KB  
Article
Adaptive Modulation Tracking for High-Precision Time-Delay Estimation in Multipath HF Channels
by Qiwei Ji and Huabing Wu
Sensors 2025, 25(14), 4246; https://doi.org/10.3390/s25144246 - 8 Jul 2025
Cited by 4 | Viewed by 1240
Abstract
High-frequency (HF) communication is critical for applications such as over-the-horizon positioning and ionospheric detection. However, precise time-delay estimation in complex HF channels faces significant challenges from multipath fading, Doppler shifts, and noise. This paper proposes a Modulation Signal-based Adaptive Time-Delay Estimation (MATE) algorithm, [...] Read more.
High-frequency (HF) communication is critical for applications such as over-the-horizon positioning and ionospheric detection. However, precise time-delay estimation in complex HF channels faces significant challenges from multipath fading, Doppler shifts, and noise. This paper proposes a Modulation Signal-based Adaptive Time-Delay Estimation (MATE) algorithm, which effectively decouples carrier and modulation signals and integrates phase-locked loop (PLL) and delay-locked loop (DLL) techniques. By leveraging the autocorrelation properties of 8PSK (Eight-Phase Shift Keying) signals, MATE compensates for carrier frequency deviations and mitigates multipath interference. Simulation results based on the Watterson channel model demonstrate that MATE achieves an average time-delay estimation error of approximately 0.01 ms with a standard deviation of approximately 0.01 ms, representing a 94.12% reduction in mean error and a 96.43% reduction in standard deviation compared to the traditional Generalized Cross-Correlation (GCC) method. Validation with actual measurement data further confirms the robustness of MATE against channel variations. MATE offers a high-precision, low-complexity solution for HF time-delay estimation, significantly benefiting applications in HF communication systems. This advancement is particularly valuable for enhancing the accuracy and reliability of time-of-arrival (TOA) detection in HF-based sensor networks and remote sensing systems. Full article
(This article belongs to the Section Communications)
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21 pages, 6081 KB  
Article
A Cooperative GNSS Vector-DLL (CoVDLL) Method for Multiple UAVs Positioning
by Chuntao Li, Xinru Wang, Changhui Jiang, Zikang Su, Shoubin Chen and Yuwei Chen
Remote Sens. 2025, 17(13), 2156; https://doi.org/10.3390/rs17132156 - 23 Jun 2025
Cited by 1 | Viewed by 1241
Abstract
Currently, the Global Navigation Satellite System (GNSS) plays a critical role in providing position information for UAVs. Traditional GNSS receivers typically employ the scalar-tracking (ST) method to track signals and extract observations. An advanced alternative to ST is the Vector Delay Lock Loop [...] Read more.
Currently, the Global Navigation Satellite System (GNSS) plays a critical role in providing position information for UAVs. Traditional GNSS receivers typically employ the scalar-tracking (ST) method to track signals and extract observations. An advanced alternative to ST is the Vector Delay Lock Loop (VDLL), which enables more reliable navigation solution estimation for GNSS receivers. To enhance GNSS positioning performance for UAVs, this paper proposes a cooperative VDLL (CoVDLL) that incorporates ranging information. While single VDLL (S-VDLL) explores the inherent relationship between signal tracking parameters and navigation solutions, the CoVDLL leverages signal tracking parameters from multiple UAVs along with their ranging data. To optimize navigation solution estimation in the CoVDLL, a Factor Graph Optimization (FGO) algorithm is employed to realize the navigation solution’s optimal estimation. Experiments conducted under various settings demonstrate that the CoVDLL method reduces positioning errors by an average of approximately 30% compared to the single-VDLL approach. Full article
(This article belongs to the Topic GNSS Measurement Technique in Aerial Navigation)
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19 pages, 1847 KB  
Article
Real-Time Wave Energy Converter Control Using Instantaneous Frequency
by Inyong Kim, Ted K. A. Brekken, Solomon Yim, Brian Johnson, Yue Cao and Pranav Chandran
Appl. Sci. 2025, 15(9), 4889; https://doi.org/10.3390/app15094889 - 28 Apr 2025
Viewed by 1728
Abstract
Wave Energy Converters (WECs) rely on effective Power Take-Off (PTO) control strategies to maximize energy absorption under dynamic sea conditions. Traditional hydrodynamic modeling techniques may require computationally intensive convolution calculations, making real-time control implementation challenging. This paper presents an alternative approach by leveraging [...] Read more.
Wave Energy Converters (WECs) rely on effective Power Take-Off (PTO) control strategies to maximize energy absorption under dynamic sea conditions. Traditional hydrodynamic modeling techniques may require computationally intensive convolution calculations, making real-time control implementation challenging. This paper presents an alternative approach by leveraging instantaneous frequency estimation to dynamically adjust PTO damping in response to varying wave frequencies. Two real-time frequency estimation methods are explored: the Hilbert Transform (HT) and Phase-Locked Loop (PLL). The Hilbert Transform method provides accurate frequency tracking but introduces a delayed response due to its dependence on causal data. Conversely, the PLL approach demonstrates strong potential in frequency tracking but requires careful gain tuning, particularly in complex sea states. Comparative evaluations across multiple test cases—including sinusoidal variations, amplitude steps, frequency step changes, and real-world JONSWAP spectrum waves—highlight the strengths and limitations of each method. The two different PTO control techniques across the various frequency estimation methods were tested under real-sea states using a state-space model of a point-absorbing Wave Energy Converter. The Capture Width Ratio (CWR) is used as a performance metric, with results showing that the HT achieves a 10.6% improvement, while the PLL estimation yields a 0.9% improvement relative to the fixed parameter control baseline. These results highlight the effectiveness of real-time frequency estimation in improving energy absorption compared to static control parameters. Full article
(This article belongs to the Special Issue Dynamics and Control with Applications to Ocean Renewables)
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18 pages, 7376 KB  
Article
PMSM Position Sensorless Control Based on Improved Second-Order SOIFO
by Ge Song, Hongyu Ni, Wenyuan Wang and Wenxu Yan
World Electr. Veh. J. 2025, 16(3), 182; https://doi.org/10.3390/wevj16030182 - 17 Mar 2025
Cited by 2 | Viewed by 1119
Abstract
Due to detection errors, motor parameter deviations, and other uncertainties, traditional motor flux estimation models suffer from the complications of DC bias and high-order harmonics. To address these issues, two flux observers, the second-order generalized integrator flux observer (SOIFO) and the second-order SOIFO, [...] Read more.
Due to detection errors, motor parameter deviations, and other uncertainties, traditional motor flux estimation models suffer from the complications of DC bias and high-order harmonics. To address these issues, two flux observers, the second-order generalized integrator flux observer (SOIFO) and the second-order SOIFO, are designed for position sensorless control of permanent magnet synchronous motors (PMSMs). The position sensorless control of PMSMs based on an improved second-order SOIFO is proposed in this paper. The proposed method enhances the frequency-locked loop (FLL) in the observer by introducing a double-axis frequency-locked loop (DFLL), which improves the dynamic performance and disturbance rejection capability of the flux observer. By replacing FLL with DFLL for angular frequency estimation, the method effectively eliminates second-harmonic interference while reducing estimation delays, leading to faster and more accurate rotor position estimation in the second-order SOIFO. Additionally, the improved observer demonstrates enhanced robustness against disturbances, ensuring more stable position sensorless control. The effectiveness of the proposed approach is validated through both simulations and experimental comparisons. Full article
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19 pages, 3452 KB  
Article
Sensorless Control of Ultra-High-Speed PMSM via Improved PR and Adaptive Position Observer
by Xiyue Bai, Weiguang Huang, Chuang Gao and Yingna Wu
Sensors 2025, 25(5), 1290; https://doi.org/10.3390/s25051290 - 20 Feb 2025
Cited by 7 | Viewed by 4778
Abstract
To improve the precision of the position and speed estimation in ultra-high-speed (UHS) permanent magnet synchronous motors (PMSM) without position sensors, multiple refinements to the traditional extended electromotive force (EEMF) estimation algorithm are proposed in this paper. The key improvements include discretization compensation, [...] Read more.
To improve the precision of the position and speed estimation in ultra-high-speed (UHS) permanent magnet synchronous motors (PMSM) without position sensors, multiple refinements to the traditional extended electromotive force (EEMF) estimation algorithm are proposed in this paper. The key improvements include discretization compensation, high-frequency harmonic filtering, and the real-time adjustment of the phase-locked loop (PLL) bandwidth. Firstly, a discrete model is introduced to address EMF cross-coupling issues. Secondly, an improved proportional resonant (IPR) controller eliminating static errors is utilized in place of the conventional proportional-integral (PI) controller and low-pass filter (LPF) to enable precise electromotive force extraction, effectively filtering high-frequency harmonics that arise in low carrier ratio conditions. Based on a standard PR design, the IPR controller offers a streamlined calculation for target leading angles in delay compensation schemes to effectively mitigate discretization and delay errors. Additionally, an adaptive phase-locked loop (AQPLL) dynamically adjusts its bandwidth during acceleration to balance noise rejection and phase delay, reducing position estimation errors and optimizing torque. Simulations and experimental analyses on a motor (90,000 rpm, 30 kW) validate the effectiveness of the proposed sensorless driving techniques and demonstrate enhanced performance in position and velocity estimation, compared to the conventional EEMF approach. Full article
(This article belongs to the Section Physical Sensors)
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25 pages, 11967 KB  
Article
Quadrature-Phase-Locked-Loop-Based Back-Electromotive Force Observer for Sensorless Brushless DC Motor Drive Control in Solar-Powered Electric Vehicles
by Biswajit Saha, Aryadip Sen, Bhim Singh, Kumar Mahtani and José A. Sánchez-Fernández
Appl. Sci. 2025, 15(2), 574; https://doi.org/10.3390/app15020574 - 9 Jan 2025
Cited by 5 | Viewed by 3210
Abstract
This work presents a sensorless brushless DC motor (BLDCM) drive control, optimized for solar photovoltaic (PV)- and battery-fed light electric vehicles (LEVs). A back-electromotive force (EMF) observer integrated with an enhanced quadrature-phase-locked-loop (QPLL) structure is proposed for accurate rotor position estimation, addressing limitations [...] Read more.
This work presents a sensorless brushless DC motor (BLDCM) drive control, optimized for solar photovoltaic (PV)- and battery-fed light electric vehicles (LEVs). A back-electromotive force (EMF) observer integrated with an enhanced quadrature-phase-locked-loop (QPLL) structure is proposed for accurate rotor position estimation, addressing limitations of existing control methods at low speeds and under dynamic conditions. The study replaces the conventional arc-tangent technique with a QPLL-based approach, eliminating low-pass filters to enhance system adaptability and reduce delays. The experimental results demonstrate a significant reduction in commutation error, with a nearly flat value at 0 degrees during steady-state and less than 8 degrees under dynamic conditions. Furthermore, the performance of a modified single-ended primary-inductor converter (SEPIC) for maximum power point tracking (MPPT) in solar-powered LEVs is verified, minimizing current ripple and ensuring smooth motor operation. The system also incorporates a regenerative braking mechanism, extending the vehicle’s range by efficiently recovering kinetic energy through the battery with 30.60% efficiency. The improved performance of the proposed method and system over conventional approaches contributes to the advancement of efficient and sustainable solar-powered BLDC motor-based EV technologies. Full article
(This article belongs to the Special Issue Design and Synthesis of Electric Energy Conversion Systems)
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