Search Results (185)

Highly integrable silicon carbide (SiC) has emerged as a promising platform for photonic integrated circuits (PICs), offering a comprehensive set of material and optical properties that are ideal for the integration of nonlinear devices and solid-state quantum defects. However, despite significant progress in nanofabrication technology, the development of SiC on an insulator (SiCOI)-based photonics faces challenges due to fabrication-induced material optical losses and complex processing steps. An alternative approach to mitigate these fabrication challenges is the direct deposition of amorphous SiC on an insulator (a-SiCOI). However, there is a lack of systematic studies aimed at producing high optical quality a-SiC thin films, and correspondingly, on evaluating and determining their optical properties in the telecom range. To this end, we have studied a single-source precursor, 1,3,5-trisilacyclohexane (TSCH, C₃H₁₂Si₃), and chemical vapor deposition (CVD) processes for the deposition of SiC thin films in a low-temperature range (650–800 °C) on a multitude of different substrates. We have successfully demonstrated the fabrication of smooth, uniform, and stoichiometric a-SiCOI thin films of 20 nm to 600 nm with a highly controlled growth rate of ~0.5 Å/s and minimal surface roughness of ~5 Å. Spectroscopic ellipsometry and resonant micro-photoluminescence excitation spectroscopy and mapping reveal a high index of refraction (~2.7) and a minimal absorption coefficient (<200 cm⁻¹) in the telecom C-band, demonstrating the high optical quality of the films. These findings establish a strong foundation for scalable production of high-quality a-SiCOI thin films, enabling their application in advanced chip-scale telecom PIC technologies. Full article

Silicon carbide (SiC) half-bridge power modules are widely utilized in new energy power generation, electric vehicles, and industrial power supplies. To address the research gap in collaborative validation between electro-thermal coupling models and process reliability, this paper proposes a closed-loop methodology of “design-simulation-process-validation”. This approach integrates in-depth electro-thermal simulation (LTspice XVII/COMSOL Multiphysics 6.3) with micro/nano-packaging processes (sintering/bonding). Firstly, a multifunctional double-pulse test board was designed for the dynamic characterization of SiC devices. LTspice simulations revealed the switching characteristics under an 800 V operating condition. Subsequently, a thermal simulation model was constructed in COMSOL to quantify the module junction temperature gradient (25 °C → 80 °C). Key process parameters affecting reliability were then quantified, including conductive adhesive sintering (S820-F680, 39.3 W/m·K), high-temperature baking at 175 °C, and aluminum wire bonding (15 mil wire diameter and 500 mW ultrasonic power/500 g bonding force). Finally, a double-pulse dynamic test platform was established to capture switching transient characteristics. Experimental results demonstrated the following: (1) The packaged module successfully passed the 800 V high-voltage validation. Measured drain current (4.62 A) exhibited an error of <0.65% compared to the simulated value (4.65 A). (2) The simulated junction temperature (80 °C) was significantly below the safety threshold (175 °C). (3) Microscopic examination using a Leica IVesta 3 microscope (55× magnification) confirmed the absence of voids at the sintering and bonding interfaces. (4) Frequency-dependent dynamic characterization revealed a 6 nH parasitic inductance via Ansys Q3D 2025 R1 simulation, with experimental validation at 8.3 nH through double-pulse testing. Thermal evaluations up to 200 kHz indicated 109 °C peak temperature (below 175 °C datasheet limit) and low switching losses. This work provides a critical process benchmark for the micro/nano-manufacturing of high-density SiC modules. Full article

This article presents a method for detecting the temperature distribution of two parallelized Silicon Carbide (SiC) MOSFETs. Two thermally sensitive electrical parameters (TSEPs), namely the on-state resistance ($R_{dson}$) and the threshold voltage ($V_{th}$), are introduced. A comparison of the temperatures interpolated by $V_{th}$ and $R_{dson}$ shows disparity, enabling the detection of individual junction temperatures. $V_{th}$ instability and its measurement are discussed for SiC devices. Experimental results show that, depending on the instability of the $V_{th}$ and the sensitivity of the two TSEPs at certain temperatures, a combination of different TSEPs could be a solution for extracting the maximum junction temperature of parallelized devices. Full article

We present the results of silicon carbide (SiC) thin film synthesis on Si(111) substrates using chemical vapor deposition by decomposing CH₄ in H₂ at 1135 °C. The experiments were conducted in an Oxford Nanofab Plasmalab System 100 for carbon phase deposition times of 3, 5, 20, 60, and 90 min on Si(111) with or without native oxide, following established protocols. Our studies show that either predominantly crystalline SiC or a mixture of SiC and Si–O/Si–O–C glass forms on Si substrates significantly doped with carbon and oxygen, depending on the presence or absence of native oxide. The thickness of the SiC film ranges from approximately 5–6 nm for films synthesized in 3 min to over 15 nm for those synthesized in 90 min, while the size of the crystal grains varies from a few to 110 nm depending on the synthesis duration. The findings suggest that the complex composition of the thin films and the region beneath them can more effectively compensate for the differences in lattice parameters and thermal expansion coefficients between the SiC film and the Si substrate; thus, this method is promising for depositing intermediate thin films of SiC on Si substrates. Full article

The integration of thick homoepitaxial layers on silicon carbide (SiC) substrates is critical for enabling high-voltage power devices, yet it remains challenged by substrate surface quality and wafer geometry evolution. This study investigates the relationship between substrate preparation—particularly chemical mechanical planarization (CMP)—and the impact on wafer bow, total thickness variation (TTV), local thickness variation (LTV), and defect propagation during epitaxial growth. Seven 150 mm, 4° off-axis, prime-grade 4H-SiC substrates from a single ingot were processed under high-volume manufacturing (HVM) conditions and grown with epitaxial layers ranging from 12 μm to 100 μm. Metrology revealed a strong correlation between increasing epitaxial thickness and geometric deformation, especially beyond 31 μm. Despite initial surface scratches from CMP, hydrogen etching and buffer layer deposition significantly mitigated scratch propagation, as confirmed through defect mapping and SEM/FIB analysis. These findings provide a deeper understanding of the substrate-to-epitaxy integration process and offer pathways to improve manufacturability and yield in thick-epilayer SiC device fabrication. Full article

4H-silicon carbide (4H-SiC) is a cornerstone for next-generation optoelectronic and power devices owing to its unparalleled thermal, electrical, and optical properties. However, its chemical inertness and low dopant diffusivity for most dopants have historically impeded effective doping. This study unveils a transformative laser-assisted boron doping technique for n-type 4H-SiC, employing a pulsed Nd:YAG laser (λ = 1064 nm) with a liquid-phase boron precursor. By leveraging a heat-transfer model to optimize laser process parameters, we achieved dopant incorporation while preserving the crystalline integrity of the substrate. A novel optical characterization framework was developed to probe laser-induced alterations in the optical constants—refraction index ($\mathrm{n}$) and attenuation index ($\mathrm{k}$)—across the MIDIR spectrum (λ = 3–5 µm). The optical properties pre- and post-laser doping were measured using Fourier-transform infrared spectrometry, and the corresponding complex refraction indices were extracted by solving a coupled system of nonlinear equations derived from single- and multi-layer absorption models. These models accounted for the angular dependence in the incident beam, enabling a more accurate determination of $\mathrm{n}$ and $\mathrm{k}$ values than conventional normal-incidence methods. Our findings indicate the formation of a boron-acceptor energy level at 0.29 eV above the 4H-SiC valence band, which corresponds to λ = 4.3 µm. This impurity level modulated the optical response of 4H-SiC, revealing a reduction in the refraction index from 2.857 (as-received) to 2.485 (doped) at λ = 4.3 µm. Structural characterization using Raman spectroscopy confirmed the retention of crystalline integrity post-doping, while secondary ion mass spectrometry exhibited a peak boron concentration of 1.29 × 10¹⁹ cm⁻³ and a junction depth of 450 nm. The laser-fabricated p–n junction diode demonstrated a reverse-breakdown voltage of 1668 V. These results validate the efficacy of laser doping in enabling MIDIR tunability through optical modulation and functional device fabrication in 4H-SiC. The absorption models and doping methodology together offer a comprehensive platform for paving the way for transformative advances in optoelectronics and infrared materials engineering. Full article

This study proposes a sustainable method to convert high-silicon lead-zinc tailings (HS-LZT) into lightweight and high-strength ceramsite, aiming to address the issues of solid waste management and resource efficiency by using HS-LZT and kaolin as the main raw materials and silicon carbide (SiC) as the pore-forming agent. A sintering process was employed to prepare lightweight, high-strength ceramsite. X-ray diffraction (XRD), X-ray fluorescence (XRF), Thermogravimetric-differential scanning calorimetry (TG-DSC), and inductively coupled plasma optical emission spectrometer (ICP-OES) were used to analyze the physical composition and physical and chemical properties of the raw materials. The influence of raw material ratios, SiC content, sintering temperature, and sintering time on ceramsite properties was investigated, and the microstructure of the optimal finished ceramsite was analyzed. The results show that under optimal preparation conditions (70% [by mass percentage] of HS-LZT, 30% [by mass percentage] of kaolin, with an addition of 0.5% [by mass percentage] of SiC, a sintering temperature of 1200 °C, and a sintering time of 20 min), the LZT ceramsite achieved a compressive strength of 11.39 MPa, a bulk density of 724 kg/m³, and a 1 h water absorption rate of 4.82%. The leaching content of Pb and Zn of the sintered ceramsite samples is far less than the limit values of hazardous components in the leachate specified in the relevant standard. This study provides a potential pathway for the reduction, recycling, and environmentally sound utilization of HS-LZT, which is in line with the sustainable development concept of “treating waste with waste.” Full article

Nonvolatile switching is emerging and shows potential in integrated optics. A compact nonvolatile reconfigurable mode converter implemented on a 4H-silicon-carbide-on-insulator (4H-SiCOI) platform with a footprint of 0.5 × 1 × 1.8 μm³ is proposed in this study. The functional region features an Sb₂S₃ film embedded in a 4H-SiC strip waveguide. The functionality is achieved through manipulating the phase state of the Sb₂S₃. The high refractive index contrast between the crystalline Sb₂S₃ and 4H-SiC enables high-efficiency mode conversion within a compact footprint. The incident TM0 mode is converted to the TM1 mode with a high transmittance (T) beyond 0.91 and a mode purity (MP) over 91.72% across the 1500–1600 nm waveband. Additionally, when the Sb₂S₃ transitions to its amorphous state, the diminished refractive index contrast efficiently mitigates the mode conversion effect. In this state, the TM0 mode propagates through the functional region with minimal perturbation, exhibiting T ≥ 0.99 and MP_TM0 ≥ 97.65% within a 1500–1600 nm waveband. Furthermore, the device performances were investigated under partially crystallized states of Sb₂S₃. The proposed structure offers a broad range of transmittance differences (−16.42 dB ≤ ΔT ≤ 17.1 dB) and mode purity differences (−90.91% ≤ ΔMP ≤ 96.11%) between the TM0 mode and TM1 mode. The proposed device exhibits a high robustness within ±20 nm Δl and ±10 nm Δw. We believe that the proposed multi-level manipulation can facilitate a large communication capacity and that it can be deployed in neuromorphic optical computing. Full article

A comprehensive roadmap for advancing Electric Micromobility (EMM) systems addressing the fragmented and scarce information available in the field is defined as a transformative solution for urban transportation, targeting short-distance trips with compact, lightweight vehicles under 350 kg and maximum speeds of 45 km/h, such as bicycles, e-scooters, and skateboards, which offer flexible, eco-friendly alternatives to traditional transportation, easing congestion and promoting sustainable urban mobility ecosystems. This review aims to guide researchers by consolidating key technical insights and offering a foundation for future exploration in this domain. It examines critical components of EMM systems, including electric motors, batteries, power converters, and control strategies. Likewise, a comparative analysis of electric motors, such as PMSM, BLDC, SRM, and IM, highlights their unique advantages for micromobility applications. Battery technologies, including Lithium Iron Phosphate, Nickel Manganese Cobalt, Nickel-Cadmium, Sodium-Sulfur, Lithium-Ion and Sodium-Ion, are evaluated with a focus on energy density, efficiency, and environmental impact. The study delves deeply into power converters, emphasizing their critical role in optimizing energy flow and improving system performance. Furthermore, control techniques like PID, fuzzy logic, sliding mode, and model predictive control (MPC) are analyzed to enhance safety, efficiency, and adaptability in diverse EMM scenarios by using cutting-edge semiconductor devices like Silicon Carbide (SiC) and Gallium Nitride (GaN) in well-known configurations, such as buck, boost, buck–boost, and bidirectional converters to ensure great efficiency, reduce energy losses, and ensure compact and reliable designs. Ultimately, this review not only addresses existing gaps in the literature but also provides a guide for researchers, outlining future research directions to foster innovation and contribute to the development of sustainable, efficient, and environmentally friendly urban transportation systems. Full article

4H-SiC (silicon carbide), known as the third-generation semiconductor, has been widely used in high-power electronic devices. However, surface defects on wafers can seriously affect the key parameters and stability of silicon carbide devices. In this work, we pioneered a dual-laser comparative framework to systematically investigate the effects of continuous wave (CW) and femtosecond (FS) pulse laser micromachining on 4H-SiC epitaxial layers. CW laser restructuring optimized lattice integrity at sub-melting thresholds, while ultrafast FS pulse laser achieved submicron roughness control (from 8 μm to <0.5 μm) without obvious thermal collateral damage. To reveal the dynamic mechanism during the laser modification, multi-physics finite element models were adopted that decouple thermal and non-thermal mechanisms. This work expands the feasibility of laser micromachining for next-generation SiC device manufacturing. Full article

This study optimized the proportions of synergistic catalysts to efficiently activate potassium peroxymonosulfate (Oxone), generate more reactive oxygen species, and accelerate the chemical oxidation of silicon carbide (4H-SiC) wafers during chemical–mechanical polishing (CMP) for an improved material removal rate (MRR) and surface quality. The Oxone was activated using ultraviolet (UV) catalysis with a photocatalyst (TiO₂) and transition metal (Fe₃O₄) to enhance the oxidation capacity of the polishing slurry through the production of strong oxidizing sulfate radicals (${\mathrm{S}\mathrm{O}}_4^{·-}$). First, the effects of the TiO₂, Fe₃O₄, and Oxone concentrations on the MRR were studied by conducting multiple single-factor experiments. Next, 4H-SiC wafers were polished using different catalyst combinations to verify the synergistic activation of Oxone by multiple catalysts. Finally, the roughnesses, physical features, and elemental compositions of the wafer surfaces were observed before and after polishing. The results showed that CMP with a TiO₂ concentration of 0.15 wt%, Fe₃O₄ concentration of 0.75 wt%, and Oxone concentration of 48 mM decreased the wafer surface roughness from Sa 134 to 8.251 nm and achieved a maximum MRR of 2360 nm/h, which is significantly higher than that associated with traditional CMP methods. The surface of a 4H-SiC wafer polished using CMP with the optimal catalytic system was extremely smooth with no scratches and exhibited many oxides that reduced its hardness. In summary, the proposed UV-TiO₂-Fe₃O₄-Oxone composite catalytic system for 4H-SiC CMP exhibited significant synergistic enhancements and demonstrated excellent surface quality, indicating considerable potential for the polishing of hard materials. Full article

This paper aims to critically review electrically active defects studied by junction spectroscopy techniques (deep-level transient spectroscopy and minority carrier transient spectroscopy) in the three most commonly used silicon carbide (SiC) polytypes: 3C-SiC, 4H-SiC, and 6H-SiC. Given the dominant role of SiC in power electronic devices, the focus is strictly on electrically active defects that influence material performance and device reliability. The most prevalent defects in each polytype and their effects on electrical properties will be examined. Additionally, recent advancements in defect characterization and defect engineering will be highlighted, emphasizing their impact on improving SiC-based device performance. The paper will also address the main challenges that continue to hinder the broader adoption of SiC, such as defect-related limitations in carrier lifetime and doping efficiency. Furthermore, beyond the well-established applications of SiC in power electronics and high-temperature environments, lesser-known niche applications will be explored, showcasing the material’s versatility in emerging fields. Full article

Thermal conductivity is the key property of SiC-TRISO composite fuel. This study investigated the relationship between SiC phase transition, thermal conductivity, and microstructure across different temperatures. The physical phase, morphology, and microstructure of SiC and SiC-TRISO composite fuels were characterized by XRD and SEM. Meanwhile, EDS was employed to determine the chemical composition within SiC grains. The results showed the transformation of the β-SiC phase to α-SiC in the matrix with increasing sintering temperature, while Al, Y, and Ca concentrations within the SiC grains decreased. The highest λ value of SiC was achieved at a sintering temperature of 1750 °C, measuring 75.51 ${\displaystyle \frac{W}{m·K}}$ at room temperature and 43.36 ${\displaystyle \frac{W}{m·K}}$ at 500 °C. The incorporation of TRISO fuel lowered the $\lambda$ value of SiC-TRISO composite fuel, yielding 57.96 and 34.51 ${\displaystyle \frac{W}{m·K}}$ at room temperature and 500 °C, respectively. The outermost carbon layer of TRISO fuel interacts with the silicon carbide matrix and liquid phase, facilitating the phase transition from 3C-SiC to 6H-SiC and, subsequently, to 4H-SiC. This process accelerates the depletion of Al, Y, and Ca within the silicon carbide grains, encourages grain growth, and raises the free-carbon content, thereby decreasing the λ of the composite fuel. Full article

This study investigates the impact of polycarbonate diol (PCDL)-modified toluene diisocyanate (TDI)-based polyester polyurethane polishing pads on the chemical mechanical polishing of 4H silicon carbide (4H-SiC) substrates. Employing a unique metho, PCDL alters the ratio of polyurethane soft and hard segments, facilitating the one-step synthesis of a polishing pad via chemical foaming. The extent of the reaction of isocyanate groups was characterized by Fourier transform infrared spectroscopy, while the changes in the glass transition temperature of the material before and after modification were evaluated using differential scanning calorimetry. The mechanical properties and surface morphology of the modified pad have been systematically characterized. The results showed that compared with the polyurethane polishing pad without PCDL, tensile strength was augmented by a factor of 2.1, the elastic modulus surged by a factor of 4.2, the elongation at break improved by a factor 1.6, and the wear index decreased by a factor of 0.5 by 40 wt.% PCDL loading. Furthermore, the modified pad demonstrated a 14.5% increase in material removal rate and a reduction in surface roughness of 4H-SiC from 0.124 nm to 0.067 nm. Additionally, the compact surface pore structure and enhanced chemical stability in the strong oxidizing slurry of the modified pad enabled superior polishing performance, achieving an ultrasmooth 4H-SiC surface. The study highlights the potential of tailored polyurethane formulations in enhancing polishing efficiency and surface finish in semiconductor manufacturing processes. Full article

A 4H-silicon carbide (SiC) trench gate metal–oxide–semiconductor field-effect transistor (MOSFET) with dual integrated Schottky barrier diodes (SBDs) was characterized using numerical simulations. The advantage of three-dimensional stacked integration is that it allows the proposed structure to obtain an electric field of below 0.6 MV/cm in the gate oxide and SBD contacts and achieve ~10% lower forward voltage of SBDs than the planar gate SBD-integrated MOSFET (PSI-MOS) and the trench gate structure with three p-type-protecting layers (TPL-MOS). The dual-SBD-integrated MOSFET (DSI-MOS) also highlights the better influences of the more than 70% reduction in the miller charge, as well as the over 50% reduction in switching loss compared to the others. Furthermore, the short-circuit (SC) robustness of the three devices was identified. The DSI-MOS attains the critical energy and the aluminum melting point in a longer SC time interval than the TPL-MOS. The p-shield layers in the DSI-MOS are demonstrated to yield the huge benefit of improving the reliability of the contacts when SC reliability is considered. Full article