Reliability and Degradation in Power Transistors

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: 31 December 2026 | Viewed by 416

Editors


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Guest Editor
Faculty of Civil Engineering and Architecture, University of Niš, Niš, Serbia
Interests: physics of semiconductor devices; failure physics; failure analysis; power VDMOS transistors; bias-temperature instabilities; irradiation; degradation mechanisms

E-Mail Website
Guest Editor
Faculty of Electronic Engineering, University of Niš, Niš, Serbia
Interests: reliability of electronic devices; failure mechanisms; lifetime prediction; power transistors; bias-temperature instabilities; irradiation; degradation mechanisms

Special Issue Information

Dear Colleagues,

Power transistors are core components in modern power electronic systems, widely used in critical fields such as electric vehicles, renewable energy conversion, industrial automation, and consumer electronics. In addition, they can be used in electronic systems operating in harsh environments. With the advancement of technologies toward higher power densities, faster switching speeds, and the widespread adoption of wide-bandgap semiconductors like silicon carbide (SiC) and gallium nitride (GaN), ensuring long-term reliability under increasingly demanding multi-stress operating conditions has become a major challenge.

This Special Issue focuses on degradation and failure mechanisms in power transistors, exploring the complex interplay of electrical, thermal, mechanical, and environmental stresses and their impact on device lifespan. We invite original research and review articles covering topics such as an in-depth understanding of failure physics, accurate lifetime prediction models (particularly those accounting for competing or sequential degradation mechanisms), and novel experimental, simulation, or data-driven approaches for reliability assessment. Contributions addressing condition monitoring, prognostic health management, design-for-reliability strategies, and the influence of emerging materials and device architectures are also highly encouraged.

By bridging fundamental degradation science with practical reliability engineering, this Special Issue aims to advance the development of more robust, predictable, and durable next-generation power electronic systems for future energy and mobility applications.

Prof. Dr. Snezana Djoric-Veljkovic
Prof. Dr. Danijel Dankovic
Guest Editors

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Keywords

  • high-k dielectrics
  • degradation mechanisms in solid oxide cells (SOC)
  • radiation hardness
  • reliability of electronic devices
  • power VDMOS transistors
  • lifetime estimation
  • failure mechanisms of electronic power devices
  • bias-temperature instabilities
  • power transistors
  • failure analysis

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Published Papers (1 paper)

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Research

17 pages, 4563 KB  
Article
Reliability Analysis and Optimization of Power Terminal Solder Joints in PPS-Packaged IPMs
by Jun Xu and Bin Zhang
Micromachines 2026, 17(6), 749; https://doi.org/10.3390/mi17060749 (registering DOI) - 21 Jun 2026
Viewed by 142
Abstract
This study investigates the reliability of power-terminal solder joints in intelligent power modules (IPMs) subjected to thermal cycling, random vibration, and packaging/assembly-induced deformation. Fifty IPMs were tested under temperature cycling from −55 °C to 125 °C and random vibration from 20 to 2000 [...] Read more.
This study investigates the reliability of power-terminal solder joints in intelligent power modules (IPMs) subjected to thermal cycling, random vibration, and packaging/assembly-induced deformation. Fifty IPMs were tested under temperature cycling from −55 °C to 125 °C and random vibration from 20 to 2000 Hz, and the experimental observations were combined with finite element simulations of thermal, vibration, and deformation loads. The modules survived 200 temperature cycles in the free state, whereas functional abnormalities occurred after board-level assembly and subsequent environmental loading. Simulation results showed that random vibration produced limited solder-layer stress because the first structural mode was above the excitation range, while packaging and PCB deformation markedly increased the initial stress of the power-terminal solder joints. When local deformation reached approximately 0.5 mm, the calculated solder-pad stress reached or exceeded the shear-strength risk range, consistent with the failure tendency observed in highly deformed modules. Weibull analysis further indicated a fatigue-dominated failure process with an increasing failure rate. These findings suggest that deformation control, package stiffness improvement, and assembly flatness management are critical for improving the reliability of IPM power-terminal solder joints. Full article
(This article belongs to the Special Issue Reliability and Degradation in Power Transistors)
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