Memristors—Building Blocks of Future Electronics: 6G, AI, and Beyond

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microelectronics".

Deadline for manuscript submissions: 15 April 2026 | Viewed by 488

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Special Issue Information

Dear Collegeaues,

The end of Moore's Law signals a pivotal shift in semiconductor technology, as traditional scaling confronts fundamental physical and economic barriers. To sustain the pace of this progress, researchers are exploring diverse innovations, including advanced materials, 2.5D/3D chip architectures, and alternative computing paradigms such as analog in-memory, neuromorphic, quantum, and photonic systems. Among these innovations, memristor technology emerges as a versatile bridge across approaches, enabling breakthroughs in in-memory computing, AI acceleration, and next-generation 6G communications, with the potential to redefine the electronics industry's future.

The first practical demonstration of a memristor in 2008, based on a TiO₂ thin film, was the culmination of a long-theorized concept. The drive to refine this early device quickly pushed research into new material platforms, ranging from oxides such as HfO₂ and Ta₂O₅ to two-dimensional semiconductors like MoS₂, WS₂, and hBN, as well as ferroelectrics and phase-change compounds. Each of these brought its own advances—lower switching energy, higher endurance, faster operation, or high-frequency reconfigurability—broadening the scope of what memristors can achieve.

Neuromorphic computing seeks to replicate the brain’s efficiency by moving beyond von Neumann architectures and embedding computation directly into memory. Memristors, with their ability to emulate synaptic plasticity through gradual and non-volatile resistance changes, have emerged as one of the most promising devices for this paradigm and for artificial intelligence more broadly. Organized in dense crossbar arrays, they naturally perform parallel analog computations, enabling massive acceleration of AI workloads while maintaining accuracies above 90%. Their analog resistance states encode synaptic weights directly, making them particularly well suited for deep neural networks, spiking neural networks, and other models that demand efficient training and inference at scale. By unifying storage and computation, memristors address the energy and latency bottlenecks of data movement, offering a path toward low-power, brain-inspired AI systems capable of operating efficiently from the cloud to the edge.

6G communications will require hardware that is not only faster and more energy-efficient, but also inherently reconfigurable to support diverse use cases such as terahertz communications, massive MIMO, and integrated sensing. Memristors are uniquely positioned to meet these demands: their non-volatile switching and nanoscale form factor enable tunable and adaptive RF/microwave components, including filters, phase shifters, and impedance-matching networks, that can dynamically adjust to wideband spectrum conditions. Beyond circuit reconfigurability, memristor-based analog in-memory computing can accelerate baseband and signal processing tasks such as channel equalization, beamforming, and error correction, while reducing energy and latency compared to conventional digital signal processors. By bridging device-level adaptability with system-level efficiency, memristors hold strong potential to become a key enabler of 6G architectures where communication, sensing, and AI converge.

The aim of this Special Issue is to showcase the latest advances in the fabrication, characterization, and application of memristive devices. We welcome contributions that address device design and integration, as well as modeling, simulation, and testing methodologies. Original research articles, comprehensive reviews, and short communications covering both theoretical and experimental aspects are encouraged.

Contributions could include, but are not limited to, the following topics:

  • Advanced materials;
  • Integration technologies;
  • Scalability and memristor reliability;
  • Non-volatile memories;
  • Reconfigurable logic circuits;
  • Neuromorphic systems;
  • Memristive networks for artificial intelligence;
  • RF/microwave applications;
  • Sensing.

Prof. Dr. Milka Potrebić Ivaniš
Guest Editor

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Keywords

  • memristor
  • neuromorphic computing
  • artificial synapse
  • nanoelectronic device
  • flexible memristor

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Published Papers (1 paper)

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31 pages, 4625 KB  
Article
A Multiplier-Free, Electronically Tunable Floating Memtranstor Emulator for Neuromorphic and Artificial Synaptic Applications
by Predrag Petrović, Vladica Mijailović and Aleksandar Ranković
Electronics 2026, 15(5), 909; https://doi.org/10.3390/electronics15050909 - 24 Feb 2026
Viewed by 227
Abstract
This paper presents a compact floating memtranstor (MT) emulator, a memory element characterized by a direct φq relationship, realized without analog multipliers or complex circuitry. The proposed design employs only two active blocks—a voltage differential transconductance amplifier (VDTA) and a voltage [...] Read more.
This paper presents a compact floating memtranstor (MT) emulator, a memory element characterized by a direct φq relationship, realized without analog multipliers or complex circuitry. The proposed design employs only two active blocks—a voltage differential transconductance amplifier (VDTA) and a voltage differential current conveyor (VDCC)—along with three grounded capacitors and a single grounded electronically tunable resistor. The emulator accurately reproduces the fundamental φq dynamics, exhibiting origin-crossing pinched hysteresis loops under sinusoidal excitation, and operates at a low supply voltage of ±0.9 V. Electronic tunability is achieved via bias-controlled transconductance modulation, enabling flexible adaptation across excitation frequencies and operating conditions. Validation is performed through analytical modeling, Monte Carlo simulations, temperature sensitivity analysis, and full LTspice post-layout simulations using a 180 nm CMOS process. The full-custom layout occupies 2529.49 μm2, with robust performance confirmed under parasitic and process variations. Adaptive learning simulations demonstrate the emulator’s artificial synaptic plasticity, highlighting its suitability for neuromorphic computing, chaos-based circuits, and nonlinear dynamical systems. The compact, low-power, and multiplier-free architecture establishes the proposed MT emulator as a practical platform for emerging analog memory-centric applications. To validate the feasibility of the proposed solution, experimental tests are performed using commercially available components. Full article
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