Recent Advances in High-Speed Electronics

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 31 March 2026 | Viewed by 13

Special Issue Editor


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Guest Editor
Semiconductor Convergence Engineering, Dankook University, Yongin-si 16890, Gyeonggi-do, Republic of Korea
Interests: signal integrity; eye diagram; high-speed systems

Special Issue Information

Dear Colleagues,

This Special Issue addresses advances in high-speed electronics aimed at resolving potential technical issues in high-speed systems. As the data rate increases, data transmission experiences numerous changes, including parasitic effects in high-speed interconnects. Nodes in schematics are theoretically ideal, which has no effect on the electrical performance in circuit theory. The nodes are expressed as a combination of parasitic resistance (R), inductance (L), and capacitance (C). Thus, nodes must be investigated for accurate analysis of data transmission. Another change concerns the buffer or complementary metal oxide semiconductor (CMOS) in high-speed systems. The buffer was previously assumed to be an ideal driver; however, it is no longer considered to be a simple driver due to its electrical performance. To handle this issue, the input/output buffer information specification (IBIS) was introduced. The change that must be highlighted is equalization to compensate for electrical loss during high-speed data transmission. The above changes are critical in high-speed system design. Thus, they are the focus of this Special Issue regarding high-speed systems.

The Special Issue invites researchers, practitioners, and experts to contribute their original research articles and reviews on the following topics of interest, among others.

  • High-speed interconnect design and modeling;
  • Input/output buffer information specification (IBIS);
  • Input/output buffer information specification with an Algorithmic Modeling Interface (IBIS-AMI)
  • Equalization for high-speed interconnects;
  • Machine Learning-based high-speed interconnect design.

We look forward to hearing from you.

Dr. Junyong Park
Guest Editor

Manuscript Submission Information

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Keywords

  • high-speed interconnect
  • high-speed data transmission
  • interconnect modeling
  • IBIS
  • IBIS-AMI
  • equalization
  • equalizer
  • high-speed system

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Published Papers

This special issue is now open for submission.
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