Software/Hardware Codesign for Embedded Multicore Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Computer Science & Engineering".

Deadline for manuscript submissions: closed (31 December 2020) | Viewed by 3351

Special Issue Editor

Department of Computer Science, Faculty of Information Technology and Electrical Engineering, Norwegian University of Science and Technology, Høgskoleringen 1, 7491 Trondheim, Norway
Interests: compiler design; automatic parallelization; hardware–software codesign; operating systems; embedded systems; dependability and fault tolerance

Special Issue Information

Dear Colleagues,

Multicore systems are used as the central platform for the majority of systems ranging from tiny embedded applications to high-performance computing. The introduction of multiple processor cores has brought along numerous optimization opportunities for non-functional systems, but also poses new challenges for software developers, on system and application levels, when trying to exploit a platform’s potential. Some of these challenges include analyzing and enabling the predictability, synchronization, security, and the dependability of multicore systems.

An important challenge is the increased complexity and relevance of software for these systems, for example in autonomous cars and applications in the Internet of things (IoT). Accordingly, novel approaches are required to create codesigned software/hardware systems that are optimized for conflicting criteria, such as high computing performance and low energy consumption. These approaches are complicated by the fact that the hardware platforms become increasingly complex and heterogeneous due to the integration of DSPs, custom accelerators, GPGPUs, and FPGAs.

Accordingly, this Special Issue calls for innovative work to design, analyze, optimize the use, and solve the challenges of using multicore systems using software/hardware codesign approaches.

Topics of interest include, but are not restricted to the following:

  • HW/SW partitioning, interfaces and synthesis
  • Handling heterogeneity in codesigned multicores
  • Memory hierarchies, scratchpad, and caches in multicore systems
  • Communication and synchronization for multicore systems
  • Modeling, analysis, and multi-criteria optimizations of non-functional properties
  • Security, dependability, and fault tolerance of SW/HW-codesigned multicores
  • Automatic parallelization and compilation approaches for multicores
  • SW/HW codesign for in- and near-memory computing
  • Hypervisor and operating systems for multicores
  • Architecture–compiler–operating system codesign
  • Runtime adaptive and reconfigurable systems
  • WCET/WCEC analysis for multicore systems
  • Networks-on-Chip (NoCs) for codesigned multicore systems
  • Design space exploration, virtual platforms, and cosimulation
  • Multicore systems using approximate computing and/or analog components  

Dr. Michael Engel
Guest Editor

Manuscript Submission Information

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Keywords

  • Multicore systems
  • Codesign approaches
  • Heterogeneous systems
  • Automatic parallelization
  • Operating systems and runtime
  • Accelerator architectures

Published Papers (1 paper)

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Research

24 pages, 456 KiB  
Article
Exact Design Space Exploration Based on Consistent Approximations
by Kai Neubauer, Benjamin Beichler and Christian Haubelt
Electronics 2020, 9(7), 1057; https://doi.org/10.3390/electronics9071057 - 27 Jun 2020
Cited by 2 | Viewed by 2617
Abstract
The aim of design space exploration (DSE) is to identify implementations with optimal quality characteristics which simultaneously satisfy all imposed design constraints. Hence, besides searching for new solutions, a quality evaluation has to be performed for each design point. This process is typically [...] Read more.
The aim of design space exploration (DSE) is to identify implementations with optimal quality characteristics which simultaneously satisfy all imposed design constraints. Hence, besides searching for new solutions, a quality evaluation has to be performed for each design point. This process is typically very expensive and takes a majority of the exploration time. As nearly all the explored design points are sub-optimal, most of them get discarded after evaluation. However, evaluating a solution takes virtually the same amount of time for both good and bad ones. That way, a huge amount of computing power is literally wasted. In this paper, we propose a solution to the aforementioned problem by integrating efficient approximations in the background of a DSE engine in order to allow an initial evaluation of each solution. Only if the approximated quality indicates a promising candidate, the time-consuming exact evaluation is executed. The novelty of our approach is that (1) although the evaluation process is accelerated by using approximations, we do not forfeit the quality of the acquired solutions and (2) the integration in a background theory allows sophisticated reasoning techniques to prune the search space with the help of the approximation results. We have conducted an experimental evaluation of our approach by investigating the dependency of the accuracy of used approximations on the performance gain. Based on 120 electronic system level problem instances, we show that our approach is able to increase the overall exploration coverage by up to six times compared to a conservative DSE whenever accurate approximation functions are available. Full article
(This article belongs to the Special Issue Software/Hardware Codesign for Embedded Multicore Systems)
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