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Electronics
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Advanced Memory Devices and Their Latest Applications
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Advanced Memory Devices and Their Latest Applications

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (15 July 2024) | Viewed by 15187

Special Issue Editors

Prof. Dr. Pierre Canet

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Guest Editor
CNRS, Institut Matériaux Microélectronique Nanosciences de Provence, Aix-Marseille University, F-13453 Marseille, France
Interests: non-volatile memories; EEPROM; flash; MRAM; electrical characterization; modelization; reliability; security
Special Issues, Collections and Topics in MDPI journals
Dr. Jorge Daniel Aguirre-Morales

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Guest Editor
CNRS, Institut Matériaux Microélectronique Nanosciences de Provence, Aix-Marseille University, F-13453 Marseille, France
Interests: electrical characterization; compact modeling of graphene-based transistors; reliability analysis of digital circuits
Special Issues, Collections and Topics in MDPI journals
Dr. Philippe Chiquet

E-Mail Website
Guest Editor
CNRS, Institut Matériaux Microélectronique Nanosciences de Provence, Aix-Marseille University, F-13453 Marseille, France
Interests: semiconductors; microelectronics
Dr. Balakumar Muniandi

E-Mail Website
Guest Editor
Electrical and Computer Engineering Department, Lawrence Technological University, Southfield, MI 48075, USA
Interests: power management ICs; battery chargers; mixed signal IC design; GaN & SiC devices; smart battery management systems; neuromorphic computing
Dr. Alok Ranjan

E-Mail Website
Guest Editor
Department of Physics, Chalmers University of Technology, 41296 Göteborg, Sweden
Interests: semiconductor; microelectronics; memory devices

Special Issue Information

Dear Colleagues,

Advanced memory devices and their latest applications are having an increasingly significant impact on almost every object in our daily lives, driving innovation and revolutionizing numerous industries.

These advancements have been instrumental in the continuous improvement of electronic devices and computing technology, resulting in more powerful, energy-efficient, and compact devices.

Notable advances with semiconductor devices have appeared in the fields of computing and artificial intelligence, the telecommunications sector and Internet of Things.

The energy sector has also benefited from recent semiconductor advancements.

Additionally, advances in semiconductor materials have opened up new possibilities in the field of sensors and actuators.

In conclusion, this Special Issue is dedicated to recent advances in the field of semiconductor devices, materials, and applications.

Prof. Dr. Pierre Canet
Dr. Jorge Daniel Aguirre-Morales
Dr. Philippe Chiquet
Dr. Balakumar Muniandi
Dr. Alok Ranjan
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • MOS transistor
  • non-volatile memories
  • power devices
  • reliability
  • characterization
  • failure mechanisms
  • microwave devices
  • photonics
  • MEMS
  • energy efficiency

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Published Papers (2 papers)

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24 pages, 972 KiB  
Article
Enhancing Security and Power Efficiency of Ascon Hardware Implementation with STT-MRAM
by Nathan Roussel, Olivier Potin, Grégory Di Pendina, Jean-Max Dutertre and Jean-Baptiste Rigaud
Electronics 2024, 13(17), 3519; https://doi.org/10.3390/electronics13173519 - 4 Sep 2024
Viewed by 1140
Abstract
With the outstanding growth of Internet of Things (IoT) devices, security and power efficiency of integrated circuits can no longer be overlooked. Current approved standards for cryptographic algorithms are not suitable for constrained environments. In this context, the National Institute of Standards and [...] Read more.
With the outstanding growth of Internet of Things (IoT) devices, security and power efficiency of integrated circuits can no longer be overlooked. Current approved standards for cryptographic algorithms are not suitable for constrained environments. In this context, the National Institute of Standards and Technology (NIST) started a lightweight cryptography (LWC) competition to develop new algorithm standards that can be fit into small devices. In 2023, NIST has decided to standardize the Ascon family for LWC. This algorithm has been designed to be more resilient to side-channel and fault-based analysis. Nonetheless, hardware implementations of Ascon have been broken by multiple statistical fault analysis and power analysis. These attacks have underlined the necessity to develop adapted countermeasures to side-channel and perturbation-based attacks. However, existing countermeasures are power and area consuming. In this article, we propose a new countermeasure for the Ascon cipher that does not significantly increase the area and power consumption. Our architecture relies on the nonvolatile feature of the Magnetic Tunnel Junction (MTJ) that is the single element of the emerging Magnetic Random Access Memories (MRAM). The proposed circuit removes the bias exploited by statistical attacks. In addition, we have duplicated and complemented the permutation of Ascon to enhance the power analysis robustness of the circuit. Besides the security aspect, our circuit can save current manipulated data, ensuring energy saving from 11% to 32.5% in case of power failure. The area overhead, compared to an unprotected circuit, is ×2.43. Full article
(This article belongs to the Special Issue Advanced Memory Devices and Their Latest Applications)
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16 pages, 1251 KiB  
Article
MeMPA: A Memory Mapped M-SIMD Co-Processor to Cope with the Memory Wall Issue
by Angela Guastamacchia, Andrea Coluccio, Fabrizio Riente, Giovanna Turvani, Mariagrazia Graziano, Maurizio Zamboni and Marco Vacca
Electronics 2024, 13(5), 854; https://doi.org/10.3390/electronics13050854 - 23 Feb 2024
Cited by 1 | Viewed by 13504
Abstract
The amazing development of transistor technology has been the main driving force behind modern electronics. Over time, this process has slowed down introducing performance bottlenecks in data-intensive applications. A main cause is the classical von Neumann architecture, which entails constant data exchanges between [...] Read more.
The amazing development of transistor technology has been the main driving force behind modern electronics. Over time, this process has slowed down introducing performance bottlenecks in data-intensive applications. A main cause is the classical von Neumann architecture, which entails constant data exchanges between processing units and data memory, wasting time and power. As a possible alternative, the Beyond von Neumann approach is now rapidly spreading. Although architectures following this paradigm vary a lot in layout and functioning, they all share the same principle: bringing computing elements as near as possible to memory while inserting customized processing elements, able to elaborate more data. Thus, power and time are saved through parallel execution and usage of processing components with local memory elements, optimized for running data-intensive algorithms. Here, a new memory-mapped co-processor (MeMPA) is presented to boost systems performance. MeMPA relies on a programmable matrix of fully interconnected processing blocks, each provided with memory elements, following the Multiple-Single Instruction Multiple Data model. Specifically, MeMPA can perform up to three different instructions, each on different data blocks, concurrently. Hence, MeMPA efficiently processes data-crunching algorithms, achieving energy and time savings up to 81.2% and 68.9%, respectively, compared with a RISC-V-based system. Full article
(This article belongs to the Special Issue Advanced Memory Devices and Their Latest Applications)
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