Advancements in Hardware-Efficient Machine Learning

Dear Colleagues,

Machine learning has rapidly evolved in recent years, driving innovation across industries and research fields. As machine learning models grow more complex, there is a pressing need for hardware systems that can support these models efficiently, without compromising speed or power consumption. This growing demand has given rise to new advancements in hardware-efficient machine learning, which focuses on optimizing the interaction between machine learning algorithms and the hardware they run on, from edge devices to high-performance computing systems.

The challenge of hardware-efficient machine learning is to deliver high-performance models while minimizing power, area, and energy consumption. This includes novel hardware architectures, algorithmic optimizations, and the use of hardware accelerators such as GPUs, TPUs, and FPGAs to enhance the performance and efficiency of machine learning systems.

The aim of this Special Issue is to present state-of-the-art research that addresses these challenges, highlighting innovative approaches to making machine learning more efficient from a hardware perspective. We invite researchers to submit original articles that explore new techniques, as well as comprehensive review articles that summarize recent advancements in the field.

Topics of interest include, but are not limited to:

• Hardware accelerators for machine learning;
• Domain-specific custom computer architectures tailored for machine learning applications;
• Hardware amenability: optimizing machine learning models for efficient execution on hardware accelerators;
• Optimizing commodity hardware (e.g., CPUs, GPUs, and TPUs) for machine learning workloads;
• Configurable machine learning accelerators;
• Low-power hardware architectures for machine learning;
• Novel computer paradigms for machine learning acceleration;
• Utilizing emerging technologies (e.g. configurable architectures, processing-in-memory (PIM), hyperdimensional computing (HDC), approximate computing, neuromorphic computing, quantum computing, photonic computing, resistive RAM (ReRAM), and memristors) for hardware-efficient machine learning;
• Algorithm–hardware co-design for machine learning;
• Model compression techniques for hardware efficiency, including data movement optimizations, quantization schemes, binary or quantized networks, non-conventional data formats, sparce pruning, dynamic pruning, structured weights, and group convolutions;
• Neuromorphic computing for machine learning applications;
• Edge computing for machine learning;
• Energy-efficient inference and training;
• Accelerating computer-heavy deep neural network (e.g., transformers, attention mechanisms, and recommender systems);
• Machine learning optimizations for resource-constrained environments;
• Cross-layer optimization for hardware and machine learning algorithms.

We look forward to receiving your contributions, which will push the boundaries of hardware-efficient machine learning and contribute to shaping the future of the field.

Dr. Ameer M.S. Abdelhadi
Guest Editor

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