Advancements in Hardware-Efficient Machine Learning

Dear Colleagues,

Machine learning has rapidly evolved in recent years, driving innovation across industries and research fields. As machine learning models grow more complex, there is a pressing need for hardware systems that can support these models efficiently, without compromising speed or power consumption. This growing demand has given rise to new advancements in hardware-efficient machine learning, which focuses on optimizing the interaction between machine learning algorithms and the hardware they run on, from edge devices to high-performance computing systems.

The challenge of hardware-efficient machine learning is to deliver high-performance models while minimizing power, area, and energy consumption. This includes novel hardware architectures, algorithmic optimizations, and the use of hardware accelerators such as GPUs, TPUs, and FPGAs to enhance the performance and efficiency of machine learning systems.

The aim of this Special Issue is to present state-of-the-art research that addresses these challenges, highlighting innovative approaches to making machine learning more efficient from a hardware perspective. We invite researchers to submit original articles that explore new techniques, as well as comprehensive review articles that summarize recent advancements in the field.

Topics of interest include, but are not limited to:

• Hardware accelerators for machine learning;
• Domain-specific custom computer architectures tailored for machine learning applications;
• Hardware amenability: optimizing machine learning models for efficient execution on hardware accelerators;
• Optimizing commodity hardware (e.g., CPUs, GPUs, and TPUs) for machine learning workloads;
• Configurable machine learning accelerators;
• Low-power hardware architectures for machine learning;
• Novel computer paradigms for machine learning acceleration;
• Utilizing emerging technologies (e.g. configurable architectures, processing-in-memory (PIM), hyperdimensional computing (HDC), approximate computing, neuromorphic computing, quantum computing, photonic computing, resistive RAM (ReRAM), and memristors) for hardware-efficient machine learning;
• Algorithm–hardware co-design for machine learning;
• Model compression techniques for hardware efficiency, including data movement optimizations, quantization schemes, binary or quantized networks, non-conventional data formats, sparce pruning, dynamic pruning, structured weights, and group convolutions;
• Neuromorphic computing for machine learning applications;
• Edge computing for machine learning;
• Energy-efficient inference and training;
• Accelerating computer-heavy deep neural network (e.g., transformers, attention mechanisms, and recommender systems);
• Machine learning optimizations for resource-constrained environments;
• Cross-layer optimization for hardware and machine learning algorithms.

We look forward to receiving your contributions, which will push the boundaries of hardware-efficient machine learning and contribute to shaping the future of the field.

Dr. Ameer M.S. Abdelhadi
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

• hardware-efficient machine learning
• machine learning hardware optimization
• custom computer architectures for machine learning
• configurable machine learning accelerators
• hardware-optimized machine learning models
• low-latency machine learning inference
• energy-efficient machine learning inference and training
• hardware-accelerated training for large-scale machine learning models
• deep learning model compression
• low-power hardware architectures
• novel compute paradigms for ML
• emerging technologies for hardware-efficient ML
• machine learning algorithm–hardware co-design
• cross-layer optimization for hardware and ML algorithms
• machine learning model compression techniques for hardware efficiency
• commodity hardware optimization for machine learning
• efficient machine learning model deployment on edge devices
• resource-constrained machine learning optimization