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Energy-Efficient Ternary Multipliers Using CNT Transistors

1
Faculty of Computer Science and Engineering, Shahid Beheshti University G. C., Tehran 1983963113, Iran
2
Department of Electrical and Computer Engineering, Graduate University of Advanced Technology, Kerman 7631133131, Iran
3
Department of Electrical and Computer Engineering, San Francisco State University, San Francisco, CA 94132, USA
4
Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM 88003, USA
*
Author to whom correspondence should be addressed.
Electronics 2020, 9(4), 643; https://doi.org/10.3390/electronics9040643
Received: 5 March 2020 / Revised: 26 March 2020 / Accepted: 31 March 2020 / Published: 14 April 2020
(This article belongs to the Section Microelectronics and Optoelectronics)
In recent decades, power consumption has become an essential factor in attracting the attention of integrated circuit (IC) designers. Multiple-valued logic (MVL) and approximate computing are some techniques that could be applied to integrated circuits to make power-efficient systems. By utilizing MVL-based circuits instead of binary logic, the information conveyed by digital signals increases, and this reduces the required interconnections and power consumption. On the other hand, approximate computing is a class of arithmetic computing used in systems where the accuracy of the computation can be traded-off for lower energy consumption. In this paper, we propose novel designs for exact and inexact ternary multipliers based on carbon-nanotube field-effect transistors (CNFETs). The unique characteristics of CNFETs make them a desirable alternative to MOSFETs. The simulations are conducted using Synopsys HSPICE. The proposed design is compared against existing ternary multipliers. The results show that the proposed exact multiplier reduces the energy consumption by up to 6 times, while the best inexact design improves energy efficiency by up to 35 time compared to the latest state-of-the-art methods. Using the imprecise multipliers for image processing provides evidence that these proposed designs are a low-power system with an acceptable error. View Full-Text
Keywords: CNFETs; approximate computing; multiple-valued logic CNFETs; approximate computing; multiple-valued logic
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MDPI and ACS Style

Tabrizchi, S.; Panahi, A.; Sharifi, F.; Mahmoodi, H.; A. Badawy, A.-H. Energy-Efficient Ternary Multipliers Using CNT Transistors. Electronics 2020, 9, 643.

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