Next Article in Journal
Modified Modulation Strategy of 1: 1: 2 Asymmetric Nine-Level Inverter and Its Power Balance Method
Previous Article in Journal
On Car-Sharing Usage Prediction with Open Socio-Demographic Data
Open AccessArticle

An Improved All-Digital Background Calibration Technique for Channel Mismatches in High Speed Time-Interleaved Analog-to-Digital Converters

1
Faculty of Radio-Electronic Engineering, Le Quy Don Technical University, 236 Hoang Quoc Viet Str., Hanoi 100000, Vietnam
2
Graduate School of Informatics and Engineering, The University of Electro-Communications, Chofu-shi, Tokyo 182-8585, Japan
*
Author to whom correspondence should be addressed.
Electronics 2020, 9(1), 73; https://doi.org/10.3390/electronics9010073
Received: 27 November 2019 / Revised: 24 December 2019 / Accepted: 28 December 2019 / Published: 1 January 2020
(This article belongs to the Section Circuit and Signal Processing)
The time-interleaved analog-to-digital converters (TIADCs), performance is seriously affected by channel mismatches, especially for the applications in the next-generation communication systems. This work presents an improved all-digital background calibration technique for TIADCs by combining the Hadamard transform for calibrating gain and timing mismatches and averaging for offset mismatch cancellation. The numerical simulation results show that the proposed calibration technique completely suppresses the spurious images due to the channel mismatches at the output spectrum, which increases the spurious-free dynamic range (SFDR) and signal-to-noise and distortion ratio (SNDR) by 74 dB and 43.7 dB, respectively. Furthermore, the hardware co-simulation on the field programmable gate array (FPGA) platform is performed to confirm the effectiveness of the proposed calibration technique. The simulation and experimental results clarify the improvement of the proposed calibration technique in the TIADC’s performance. View Full-Text
Keywords: TIADC; channel mismatch; Hadamard transform; all-digital background calibration; FPGA TIADC; channel mismatch; Hadamard transform; all-digital background calibration; FPGA
Show Figures

Figure 1

MDPI and ACS Style

Ta, V.-T.; Hoang, V.-P.; Pham, V.-P.; Pham, C.-K. An Improved All-Digital Background Calibration Technique for Channel Mismatches in High Speed Time-Interleaved Analog-to-Digital Converters. Electronics 2020, 9, 73.

Show more citation formats Show less citations formats
Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.

Article Access Map by Country/Region

1
Back to TopTop