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Open AccessArticle

Approximate CPU Design for IoT End-Devices with Learning Capabilities

1
TÜBİTAK, Informatics and Information Security Research Center, Kocaeli 41470, Turkey
2
Department of Electrical & Electronics Engineering, Boğaziçi University, İstanbul 34342, Turkey
3
Department of Computer Engineering, Boğaziçi University, İstanbul 34342, Turkey
*
Author to whom correspondence should be addressed.
Electronics 2020, 9(1), 125; https://doi.org/10.3390/electronics9010125
Received: 5 December 2019 / Revised: 1 January 2020 / Accepted: 2 January 2020 / Published: 9 January 2020
With the rise of Internet of Things (IoT), low-cost resource-constrained devices have to be more capable than traditional embedded systems, which operate on stringent power budgets. In order to add new capabilities such as learning, the power consumption planning has to be revised. Approximate computing is a promising paradigm for reducing power consumption at the expense of inaccuracy introduced to the computations. In this paper, we set forth approximate computing features of a processor that will exist in the next generation low-cost resource-constrained learning IoT devices. Based on these features, we design an approximate IoT processor which benefits from RISC-V ISA. Targeting machine learning applications such as classification and clustering, we have demonstrated that our processor reinforced with approximate operations can save power up to 23% for ASIC implementation while at least 90% top-1 accuracy is achieved on the trained models and test data set. View Full-Text
Keywords: approximate computing; RISC-V; machine learning; dynamic sizing; on-chip training approximate computing; RISC-V; machine learning; dynamic sizing; on-chip training
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Taştan, İ.; Karaca, M.; Yurdakul, A. Approximate CPU Design for IoT End-Devices with Learning Capabilities. Electronics 2020, 9, 125.

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