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High-Throughput and Low-Latency Digital Baseband Architecture for Energy-Efficient Wireless VR Systems

1
Memory Business, Samsung Electronics, Hwasung 18448, Korea
2
Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH),77 Cheongam-ro, Pohang 37673, Korea
3
Research and Development Center, Wise-jet Inc., 35 Techno 9-ro, Daejeon 34027, Korea
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(7), 815; https://doi.org/10.3390/electronics8070815
Received: 24 May 2019 / Revised: 19 July 2019 / Accepted: 19 July 2019 / Published: 22 July 2019
(This article belongs to the Special Issue VLSI Architecture Design for Digital Signal Processing)
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Abstract

This paper presents a novel baseband architecture that supports high-speed wireless VR solutions using 60 GHz RF circuits. Based on the experimental observations by our previous 60 GHz transceiver circuits, the efficient baseband architecture is proposed to enhance the quality of transmission. To achieve a zero-latency transmission, we define an (106,920, 95,040) interleaved-BCH error-correction code (ECC), which removes iterative processing steps in the previous LDPC ECC standardized for the near-field wireless communication. Introducing the block-level interleaving, the proposed baseband processing successfully scatters the existing burst errors to the small-sized component codes, and recovers up to 1080 consecutive bit errors in a data frame of 106,920 bits. To support the high-speed wireless VR system, we also design the massive-parallel BCH encoder and decoder, which is tightly connected to the block-level interleaver and de-interleaver. Including the high-speed analog interfaces for the external devices, the proposed baseband architecture is designed in 65 nm CMOS, supporting a data rate of up to 12.8 Gbps. Experimental results show that the proposed wireless VR solution can transfer up to 4 K high-resolution video streams without using time-consuming compression and decompression, successfully achieving a transfer latency of 1 ms. View Full-Text
Keywords: 60 GHz transceiver; baseband processing; error-correction code; wireless VR 60 GHz transceiver; baseband processing; error-correction code; wireless VR
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).
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Hwang, S.; Moon, S.; Kam, D.; Oh, I.-Y.; Lee, Y. High-Throughput and Low-Latency Digital Baseband Architecture for Energy-Efficient Wireless VR Systems. Electronics 2019, 8, 815.

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