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Open AccessFeature PaperArticle

Efficient QC-LDPC Encoder for 5G New Radio

Department of Information and Communication Engineering, Inha University, Incheon 22212, Korea
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Electronics 2019, 8(6), 668; https://doi.org/10.3390/electronics8060668
Received: 22 May 2019 / Revised: 7 June 2019 / Accepted: 11 June 2019 / Published: 13 June 2019
(This article belongs to the Special Issue VLSI Architecture Design for Digital Signal Processing)
This paper presents a novel efficient encoding method and a high-throughput low-complexity encoder architecture for quasi-cyclic low-density parity-check (QC-LDPC) codes for the 5th-generation (5G) New Radio (NR) standard. By storing the quantized value of the permutation information for each submatrix instead of the whole parity check matrix, the required memory storage size is considerably reduced. In addition, sharing techniques are employed to reduce the hardware complexity. The encoding complexity of the proposed method was analyzed, and indicated a substantial reduction in the required area as well as memory storage when compared with existing state-of-the-art encoding approaches. The proposed method requires only 61% gate area, and 11% ROM storage when compared with a similar LDPC encoder using the Richardson–Urbanke method. Synthesis results on TSMC 65-nm complementary metal-oxide semiconductor (CMOS) technology with different submatrix sizes were carried out, which confirmed that the design methodology is flexible and can be adapted for multiple submatrix sizes. For all the considered submatrix sizes, the throughput ranged from 22.1–202.4 Gbps, which sufficiently meets the throughput requirement for the 5G NR standard. View Full-Text
Keywords: quasi-cyclic LDPC code; channel codes; 5G New Radio; encoding quasi-cyclic LDPC code; channel codes; 5G New Radio; encoding
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Nguyen, T.T.B.; Nguyen Tan, T.; Lee, H. Efficient QC-LDPC Encoder for 5G New Radio. Electronics 2019, 8, 668.

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