# Efficient QC-LDPC Encoder for 5G New Radio

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## Abstract

**:**

## 1. Introduction

## 2. 5G NR QC-LDPC Codes

#### 2.1. Preliminary

#### 2.2. Introduction to QC-LDPC Codes

#### 2.3. 5G NR QC-LDPC Characteristics

**Step****1:**- Obtain the base graph BG1 or BG2 and determine the value of ${k}_{b}$ for the given K and R.
- –
- For BG1: ${k}_{b}=22$.
- –
- For BG2: ${k}_{b}=10$ if $K>640$; ${k}_{b}=9$ if $560<K\le 640$; ${k}_{b}=8$ if $192<K\le 560$; and ${k}_{b}=6\phantom{\rule{3.33333pt}{0ex}}\mathrm{elsewhere}.$

**Step****2:****Step****3:**- After the lifting size Z is determined, the corresponding shift coefficient matrix is then selected from Table 1 {Set 1, Set 2,⋯, Set 8} according to set Z.
**Step****4:**- Calculate the shifting coefficient value ${P}_{i,j}$ by the modular Z operation, as discussed in Equation (4).
**Step****5:**- Replace each entry in the final exponent matrix with the corresponding circulant permutation matrix or zero matrix of size $Z\times Z$. The QC-LDPC code construction is completed and a parity check matrix H of size ${m}_{b}Z\times {n}_{b}Z$ is obtained. In 5G QC-LDPC codes, shortening and puncturing is carried out to obtain the desired information lengths and rate adaption. Figure 2 presents an illustration of the encoding process of these codes

## 3. LDPC Encoding Algorithms

#### 3.1. LDPC Encoding with Gaussian Elinination

#### 3.2. LDPC Encoding with the RU Method

## 4. Proposed 5G NR QC-LDPC Encoder Design

#### 4.1. Proposed QC-LDPC Encoding Algorithm

#### 4.2. Proposed QC-LDPC Encoder Architecture

## 5. Performance Analysis and Comparison

## 6. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## References

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Exponent Matrix | Lifting Size Set |
---|---|

Set 1 | $Z=2\times {2}^{j},j=0,1,2,3,4,5,6,7$ |

Set 2 | $Z=3\times {2}^{j},j=0,1,2,3,4,5,6,7$ |

Set 3 | $Z=5\times {2}^{j},j=0,1,2,3,4,5,6$ |

Set 4 | $Z=7\times {2}^{j},j=0,1,2,3,4,5$ |

Set 5 | $Z=9\times {2}^{j},j=0,1,2,3,4,5$ |

Set 6 | $Z=11\times {2}^{j},j=0,1,2,3,4,5$ |

Set 7 | $Z=13\times {2}^{j},j=0,1,2,3,4$ |

Set 8 | $Z=15\times {2}^{j},j=0,1,2,3,4$ |

Z | a | ||||||||
---|---|---|---|---|---|---|---|---|---|

2 | 3 | 5 | 7 | 9 | 11 | 13 | 15 | ||

j | 0 | 2 | 3 | 5 | 7 | 9 | 11 | 13 | 15 |

1 | 4 | 6 | 10 | 14 | 18 | 22 | 26 | 30 | |

2 | 8 | 12 | 20 | 28 | 36 | 44 | 52 | 60 | |

3 | 16 | 24 | 40 | 56 | 72 | 88 | 104 | 120 | |

4 | 32 | 48 | 80 | 112 | 144 | 176 | 208 | 240 | |

5 | 64 | 96 | 160 | 224 | 288 | 352 | |||

6 | 128 | 192 | 320 | ||||||

7 | 256 | 384 |

Operation | Comment | Complexity |
---|---|---|

$A{s}^{T}$ | Multiplication by sparse matrix | $O\left(N\right)$ |

${T}^{-1}A{s}^{T}$ | Back substitution, T is lower triangular matrix | $O\left(N\right)$ |

$-E{T}^{-1}\left[A{s}^{T}\right]$ | Multiplication by sparse matrix | $O\left(N\right)$ |

$C{s}^{T}$ | Multiplication by sparse matrix | $O\left(N\right)$ |

$\tilde{C}=-E{T}^{-1}\left[A{s}^{T}\right]+C{s}^{T}$ | Addition | $O\left(N\right)$ |

$-{\tilde{D}}^{-1}\tilde{C}{s}^{T}$ | Multiplication by $G\times G$ matrix | $O\left({G}^{2}\right)$ |

Operation | Comment | Complexity |
---|---|---|

$A{s}^{T}$ | Multiplication by sparse matrix | $O\left(N\right)$ |

$B{p}_{1}^{T}$ | Multiplication by sparse matrix | $O\left(N\right)$ |

$\left[A{s}^{T}\right]+\left[B{p}_{1}^{T}\right]$ | Addition | $O\left(N\right)$ |

$-{T}^{-1}(A{s}^{T}+B{p}_{1}^{T})$ | Back substitution, T is lower triangular | $O\left(N\right)$ |

Gaussian | RU | Proposed | ||
---|---|---|---|---|

Area | Flip-flops | ${k}_{b}Z$ | $({k}_{b}+g)Z$ | $({k}_{b}+g)Z$ |

XOR gates | $({k}_{b}Z-1){m}_{b}Z$ | $2{m}_{b}+({m}_{b}-g)Z$ | $({k}_{b}+2g-1)Z$ | |

AND gates | ${k}_{b}{m}_{b}{Z}^{2}$ | – | – | |

Barrel shifter (Z bits) | – | – | ${k}_{b}+g+1$ | |

Memory (bits) | ROM = ${k}_{b}{m}_{b}{Z}^{2}$ | ROM = $(245x+29y+274)Z$ | ROM = $\tilde{q}[{m}_{b}({k}_{b}+g)-{g}^{2}]$ $\lambda \_\mathrm{mem}=gZ$ | |

Speed (clock cycles) | ${k}_{b}+1$ | $28Z+{k}_{b}+1$ | ${n}_{b}+2$ |

**Table 6.**Comparison between Gaussian method, RU method, and proposed method for submatrix size $Z=16$.

Gaussian | RU | Proposed | ||
---|---|---|---|---|

Area | Flip-flops | 352 | 416 | 416 |

XOR gates | 258,336 | 764 | 464 | |

AND gates | 259,072 | – | – | |

Barrel shifter (Z bits) | – | – | 27 | |

Memory (bits) | ROM = 259,072 | ROM = 42,488 | ROM = 4720 $\lambda \_\mathrm{mem}=64$ | |

Speed (clock cycles) | 23 | 471 | 70 |

**Table 7.**ASIC implementation results of LDPC encoders for different lifting sizes $Z=$ 30, 64, 96, 144, and 352.

Encoder | BG1-Z30 | BG1-Z64 | BG1-Z96 | BG1-Z144 | BG1-Z352 |
---|---|---|---|---|---|

CMOS technology | 65-nm | 65-nm | 65-nm | 65-nm | 65-nm |

Base graph | BG1 | BG1 | BG1 | BG1 | BG1 |

Subset | 8 | 1 | 2 | 5 | 6 |

Submatrix size Z | 30 | 64 | 96 | 144 | 352 |

$\tilde{q}$ size (bits) | 5 | 6 | 7 | 8 | 9 |

$CPC$ (clock cycles) | 48 | 48 | 48 | 48 | 48 |

Max. frequency (MHz) | 769 | 714 | 667 | 645 | 600 |

Throughput (Gbps) | 22.1 | 43.8 | 61.4 | 89 | 202.4 |

Area (mm${}^{2}$) | 0.037 | 0.077 | 0.117 | 0.171 | 0.389 |

Gate counts | 45.9 K | 96 K | 146.3 K | 214 K | 486.4 K |

$TAR$${}^{\u2020}$ (Gbps/mm${}^{2}$) | 597 | 569 | 525 | 520 | 520 |

© 2019 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

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**MDPI and ACS Style**

Nguyen, T.T.B.; Nguyen Tan, T.; Lee, H.
Efficient QC-LDPC Encoder for 5G New Radio. *Electronics* **2019**, *8*, 668.
https://doi.org/10.3390/electronics8060668

**AMA Style**

Nguyen TTB, Nguyen Tan T, Lee H.
Efficient QC-LDPC Encoder for 5G New Radio. *Electronics*. 2019; 8(6):668.
https://doi.org/10.3390/electronics8060668

**Chicago/Turabian Style**

Nguyen, Tram Thi Bao, Tuy Nguyen Tan, and Hanho Lee.
2019. "Efficient QC-LDPC Encoder for 5G New Radio" *Electronics* 8, no. 6: 668.
https://doi.org/10.3390/electronics8060668