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Open AccessArticle

Automatic Tool for Fast Generation of Custom Convolutional Neural Networks Accelerators for FPGA

1
Advanced Studies and Research Center (CINVESTAV), National Polytechnic Institute (IPN), Zapopan 45019, Mexico
2
CONACYT—Advanced Studies and Research Center (CINVESTAV), National Polytechnic Institute (IPN), Guadalajara Campus, Zapopan 45019, Mexico
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(6), 641; https://doi.org/10.3390/electronics8060641
Received: 7 May 2019 / Revised: 23 May 2019 / Accepted: 29 May 2019 / Published: 6 June 2019
(This article belongs to the Special Issue Deep Neural Networks and Their Applications)
This paper presents a platform that automatically generates custom hardware accelerators for convolutional neural networks (CNNs) implemented in field-programmable gate array (FPGA) devices. It includes a user interface for configuring and managing these accelerators. The herein-presented platform can perform all the processes necessary to design and test CNN accelerators from the CNN architecture description at both layer and internal parameter levels, training the desired architecture with any dataset and generating the configuration files required by the platform. With these files, it can synthesize the register-transfer level (RTL) and program the customized CNN accelerator into the FPGA device for testing, making it possible to generate custom CNN accelerators quickly and easily. All processes save the CNN architecture description are fully automatized and carried out by the platform, which manages third-party software to train the CNN and synthesize and program the generated RTL. The platform has been tested with the implementation of some of the CNN architectures found in the state-of-the-art for freely available datasets such as MNIST, CIFAR-10, and STL-10. View Full-Text
Keywords: convolutional neural networks (CNN); deep learning; field-programmable gate array (FPGA); hardware acceleration convolutional neural networks (CNN); deep learning; field-programmable gate array (FPGA); hardware acceleration
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MDPI and ACS Style

Rivera-Acosta, M.; Ortega-Cisneros, S.; Rivera, J. Automatic Tool for Fast Generation of Custom Convolutional Neural Networks Accelerators for FPGA. Electronics 2019, 8, 641.

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