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Article

Quantitative Analysis of Multistage Switching Networks for Embedded Programmable Devices

1
ARCES-DEI, University of Bologna, Viale Carlo Pepoli 3/2, 40123 Bologna, Italy
2
STMicroelectronics, 20864 Agrate Brianza, Italy
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(3), 272; https://doi.org/10.3390/electronics8030272
Received: 29 January 2019 / Revised: 21 February 2019 / Accepted: 25 February 2019 / Published: 1 March 2019
(This article belongs to the Special Issue Recent Advances in Field-Programmable Logic and Applications)
This paper analyzes the properties of a class of congestion-free multistage switching networks (MSSNs) are butterfly-based and suitable for embedded programmable devices, which require sustaining static multicast connectivity. These MSSNs are fully synthesizable and enable the design of programmable IPs with typical size in the order of 1 KLUT, coupling flexibility with fast turn-around time. The non-blocking property for static connection of this class of MSSN is discussed. Our analysis shows pros and cons of adopting radix-2 or radix-4 MSSN structures, as well as the impact of bypass-paths to make the network fully hierarchical and locality-aware thanks also to a dedicated programming strategy. Implementation experiments carried out on STM CMOS 65 nm technology show the availability of various area-speed trade-offs, resulting in a range of ≃2× in frequency and a range of ≃ 4 × in area. Depending on the specific application-field, an optimal interconnect definition is thus achieved without compromising the routability properties. In this respect, the paper proposes a simplified application-driven model for evaluation of the best MSSN, including bypass-adoption and radix selection. View Full-Text
Keywords: reconfigurable logic; embedded field programmable gate array (FPGA); multistage switching network (MSSN) reconfigurable logic; embedded field programmable gate array (FPGA); multistage switching network (MSSN)
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MDPI and ACS Style

Renzini, F.; Cuppini, M.; Mucci, C.; Franchi Scarselli, E.; Canegallo, R. Quantitative Analysis of Multistage Switching Networks for Embedded Programmable Devices. Electronics 2019, 8, 272. https://doi.org/10.3390/electronics8030272

AMA Style

Renzini F, Cuppini M, Mucci C, Franchi Scarselli E, Canegallo R. Quantitative Analysis of Multistage Switching Networks for Embedded Programmable Devices. Electronics. 2019; 8(3):272. https://doi.org/10.3390/electronics8030272

Chicago/Turabian Style

Renzini, Francesco, Matteo Cuppini, Claudio Mucci, Eleonora Franchi Scarselli, and Roberto Canegallo. 2019. "Quantitative Analysis of Multistage Switching Networks for Embedded Programmable Devices" Electronics 8, no. 3: 272. https://doi.org/10.3390/electronics8030272

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