Optimized Modeling and Control Strategy of the Single-Phase Photovoltaic Grid-Connected Cascaded H-bridge Multilevel Inverter

Abstract

This paper presents the modeling and control-loop design method with an inverted decoupling scheme of a single-phase photovoltaic grid-connected five-level cascaded H-bridge multilevel inverter. For the unity power factor, the proportional and integral current controller with a duty ratio feed-forward compensation is used. In addition, in order to achieve the maximum power point tracking of each photovoltaic array, when the stacked modules are in the partial shading condition, each direct current (DC) voltage is stably controlled to their maximum power points (MPP) by dedicated voltage controllers of each H-bridge module. This paper also presents a control method that minimizes the effect of the loop-interaction in the design of an individual DC-link voltage control loop in a two-input two-output system. The proposed control methods of the cascaded H-bridge multilevel inverter are validated through the simulation and experimental results of the 2-kW prototype hardware.

1. Introduction

The multilevel converter can improve efficiency by enabling the use of components with better characteristics due to the reduced voltage stress, and has the advantage of lowering electromagnetic emissions by providing a staircase output voltage [1,2,3,4,5,6,7,8,9,10]. Thus, the use of a multilevel converter has increased in industrial and renewable energy applications, which require high-voltage and high output quality [11,12,13,14]. In recent times, studies of photovoltaic applications with multilevel topologies have made progress in increasing the efficiency and lowering the electromagnetic interference (EMI) and core losses [10,11,12,13,14,15,16,17]. The multi-level converter has been used mainly in renewable energy systems using high-voltage above kV, but researches are expanding to low-voltage applications to take advantage of the aforementioned merits [16,17]. Among several studies, because isolated direct current (DC) sources are naturally obtained from the photovoltaic (PV) arrays, and can be easily modularized compared to other multilevel converters, a PV generation system with the cascaded H-bridge multilevel inverter topology has been studied [16,17,18,19,20,21,22,23,24,25]. Reference [16] presented a study on the reactive power compensation for the single phase grid-connected cascaded H-bridge multilevel inverter, but they did not fully suggest the method for designing the controller. The results of applying a cascaded H-bridge multilevel inverter to the rooftop photovoltaic micro-inverter as a low-voltage application were studied in [17]. In this paper, they present the results of a power balancing scheme using a multi-level inverter in a two-stage power conversion architecture. However, there is no analysis for control-loop design and only simulation results are presented.

In grid-tied PV generation systems, the single stage structure requires many series-connected PV modules for making PV arrays with a high voltage. However, each of the stacked PV modules has its optimal maximum power points (MPPs) owing to the partial shading when the PV operates under a non-uniform irradiation. When the illumination level is decreased because of non-uniform irradiation, the whole PV system has multiple maximum power points. In this situation, the maximum power point tracking (MPPT) algorithm is apt to fall into the local MPPs and the output power is considerably decreased [26,27,28,29,30,31,32,33].

However, this problem can be mitigated by using the cascaded H-bridge multilevel inverter. When using the cascaded H-bridge multilevel inverter, PV modules are separately divided and grouped by the number of H-bridge modules, and the output voltage of PV arrays can be controlled to achieve their MPPs. Thus, the control loop design should be taken into account, in order to achieve the individual voltage control of each PV array and the unity power factor control in multi-input multi-output systems. In [34], the individual DC-link voltage control and PWM method are proposed in order to achieve the aforementioned objectives. However, the loop-interaction and solutions among H-bridge modules are not presented. Compared with a previous conference paper [35], we further present the inverted decoupling control method and the simulation results to show the effectiveness of the proposed method to minimize the loop gain interactions that occur when controlling each PV array voltage. Furthermore, we describe the detailed modeling process and simulation results for verification of the designed controller that was not presented in the previous paper to make it easier for other researchers to understand. In addition, the MPPT algorithm for tracking the MPPs of the photovoltaic system is further described.

In this paper, the controller design method with an inverted decoupling scheme of the cascaded H-bridge multilevel inverter for achieving an individual MPPT of each PV array and the unity power factor of the grid current is presented. The proportional and integral (PI) current controller, with the duty ratio feed-forward compensation method for minimizing the steady-state error and the phase delay is applied. In addition, in order to avoid a local MPPT, the output voltage of each PV array is individually controlled through the decoupled loop gain design method of the two-input two-output (TITO) system. The proposed small signal modeling and control loop design methods are validated through the simulation and experimental results of the 2-kW five-level single-phase cascaded H-bridge multilevel inverter system.

The remainder of this approach is organized as follows. This approach is divided into four parts including this introduction section. To begin with, the small signal transfer function of the cascaded H-bridge multilevel inverter based on the small signal modeling approaches are derived in Section 2. Also, the current and voltage controller design methods using the inverted decoupling method of two-input two output system are described. Section 3 shows the simulation and experimental setup and the results of the proposed approach. The experimental results show the validity of the proposed individual voltage control for obtaining the maximum power of each PV module. In the final section, some conclusions and final remarks are given.

2. Modeling and Control Loop Design Method

2.1. Small Signal Modeling of Five-Level Cascaded H-bridge Multilevel Inverter

The single-phase five-level cascaded H-bridge multilevel PV system is shown in Figure 1. In order to design the control loops, a small signal model, based on the state space averaging method [36,37], is developed. More detailed small-signal modeling is given in [37]. The input currents and output voltages of each H-bridge power stage of Figure 1 are defined as (1)–(4), using the switching states shown in Figure 2.

$$v_{sw1}=s_{11}{v}_{dc,1}-s_{31}{v}_{dc,1}$$

(1)

$$v_{sw2}=s_{12}{v}_{dc,2}-s_{32}{v}_{dc,2}$$

(2)

$$i_{dc}{}_1=s_{11}{i}_L-s_{31}{i}_L$$

(3)

$$i_{dc}{}_2=s_{12}{i}_L-s_{32}{i}_L$$

(4)

S₁₁ and S₃₁ are switching states of the upper switches of each leg in the upper H-bridge module and can take the values 1 or 0, according to the compared result between the modulating (v_c*) and carrier signal, as shown in Figure 2. i_dc1 and v_sw1 are the input current and the output voltage of the upper H-bridge module, respectively. Similarly, S₁₂, S₃₂, i_dc2, and v_sw2 are switching states of upper switches of each leg, the input current, and output voltage in the lower H-bridge module, respectively. V_dc,1 and V_dc,2 are the DC link voltage of the upper and lower H-bridge modules, respectively, and i_L is the filter inductor current.

Assuming that the switching frequency f_s is higher than the frequency of the modulating signal v_c*, the averaged state equations are derived as (5)–(7).

$$L\frac{d{i}_L}{dt}=\left(2d_{11}-1\right)v_{dc,1}+\left(2d_{12}-1\right)v_{dc,2}-v_g$$

(5)

$$C_1\frac{d{v}_{dc,1}}{dt}=i_{in1}-i_{dc1}$$

(6)

$$C_2\frac{d{v}_{dc,2}}{dt}=i_{in2}-i_{dc2}$$

(7)

Here, the switching states are changed to duty ratios d₁₁ and d₁₂. L, C₁, and C₂ are the output inductor and DC link capacitors of power stages as shown in Figure 1. V_g, i_in1, and i_in2 are the grid voltage and the current of each PV module. By applying the perturbation and linearization technique, the small signal state equation can be derived as (8), from which transfer functions, such as duty ratio to inductor current and duty ratio to each DC voltage, can be obtained.

$$\begin{array}{ll}\frac{d}{dt}\left[\begin{array}{c}{\widehat{i}}_L\\ {\widehat{v}}_{dc,1}\\ {\widehat{v}}_{dc,2}\end{array}\right]& =\left[\begin{array}{ccc}0& \frac{\left(2D_{11}-1\right)}{L}& \frac{\left(2D_{12}-1\right)}{L}\\ -\frac{\left(2D_{11}-1\right)}{C_1}& 0& 0\\ -\frac{\left(2D_{12}-1\right)}{C_2}& 0& 0\end{array}\right]\left[\begin{array}{c}{\widehat{i}}_L\\ {\widehat{v}}_{dc,1}\\ {\widehat{v}}_{dc,2}\end{array}\right]\\ & +\left[\begin{array}{cc}\frac{2V_{dc,1}}{L}& \frac{2V_{dc,2}}{L}\\ -\frac{2I_L}{C_1}& 0\\ 0& -\frac{2I_L}{C_2}\end{array}\right]\left[\begin{array}{c}{\widehat{d}}_{11}\\ {\widehat{d}}_{12}\end{array}\right]+\left[\begin{array}{ccc}0& 0& -\frac{1}{L}\\ \frac{1}{C_1}& 0& 0\\ 0& \frac{1}{C_2}& 0\end{array}\right]\left[\begin{array}{c}{\widehat{i}}_{in1}\\ {\widehat{i}}_{in2}\\ {\widehat{v}}_g\end{array}\right]\end{array}$$

(8)

2.2. Current Controller Design Method

Because the proportional-integral (PI) current control in an AC system has a steady state error and phase delay for the reference current, the duty ratio feed-forward method is used to improve the grid current control performance. From the small signal state equation in (8), transfer functions with respect to duty ratios and grid voltage of upper and lower H-bridge power stage can be derived as (9)–(11).

$$G_{i_L{d}_{11}}=\frac{{\widehat{i}}_L}{{\widehat{d}}_{11}}=\frac{2V_{dc,1}}{L}\left(\frac{\left(s-\frac{(2D_{11}-1)I_L}{C_1{V}_{dc,1}}\right)}{s^2+\frac{1}{L}\left(\frac{{(2D_{11}-1)}^2}{C_1}+\frac{{(2D_{12}-1)}^2}{C_2}\right)}\right)$$

(9)

$$G_{i_L{d}_{12}}=\frac{{\widehat{i}}_L}{{\widehat{d}}_{12}}=\frac{2V_{dc,2}}{L}\left(\frac{\left(s-\frac{(2D_{12}-1)I_L}{C_2{V}_{dc,2}}\right)}{s^2+\frac{1}{L}\left(\frac{{(2D_{11}-1)}^2}{C_1}+\frac{{(2D_{12}-1)}^2}{C_2}\right)}\right)$$

(10)

$$G_{i_L{v}_g}=\frac{{\widehat{i}}_L}{{\widehat{v}}_g}=-\frac{s}{L\left(s^2+\frac{1}{L}\left(\frac{{(2D_{11}-1)}^2}{C_1}+\frac{{(2D_{12}-1)}^2}{C_2}\right)\right)}$$

(11)

Since the generated power of the PV array is generally measured for the MPPT algorithm, the duty ratio relationship for feed-forward can be derived as (12) with respect to PV array powers under steady-state conditions of the averaged model. Thus, duty ratios to grid voltage of each H-bridge module is derived as (13).

$$D_{1i}=\frac{1}{2}\left(1+\frac{I_{in,i}}{I_L}\right)=\frac{1}{2}\left(1+\frac{P_{in,i}\cdot v_g}{P_{in,tot}\cdot v_{dc,i}}\right), i=1, 2$$

(12)

$${\widehat{d}}_{1i}=\frac{1}{2}\frac{P_{in,i}}{V_{dc,i}\cdot P_o}{\widehat{v}}_g, i=1, 2$$

(13)

where, P_in,1 and P_in,2 are the output power of each PV array, P_in,tot is the sum of the powers of two PV arrays, and V_dc,i is the voltage of each PV array.

In order to design the control loops for the grid current and each DC-link (PV array) voltage, the current control loop in Figure 3 is designed first. As shown in Figure 3, the inductor current injected into the utility grid is the sum of the current control result of the upper H-bridge module and the current control result of the lower H-bridge module from the controller design point of view. In this case, ${\widehat{d}}_{11}$ to inductor current and ${\widehat{d}}_{11}$ to inductor current in the power stage of Figure 3 are expressed by (9) and (10) At this time, H_i is a proportional integral (PI) current controller, and the DC gain and zero of PI controller can be designed so that each current control loop has a high cut-off frequency and a sufficient phase margin. In general, the cutoff frequency should be designed to have a phase margin greater than 45 degrees. The duty ratio feed-forward scheme is employed to attenuate the disturbance of the grid voltage, and the effects of this scheme are shown in section 3.

2.3. Voltage Controller Design Method

It is necessary to design a voltage controller that can control input voltages of the PV arrays to determine the current reference in the state where the current controller is implemented. When the current-loops are closed, the transfer functions of the input voltages (V_dc,1, V_dc,2) to each H-bridge module current are firstly derived. Then, the voltage controller should be designed to stabilize the transfer function of the voltages to the current reference, and the detailed procedure is as follows.

The previously mentioned current loop closed system can be considered as the TITO system as shown in dotted box of Figure 4. g₁₁ is the transfer function of the upper PV array voltage of the upper H-bridge module, with respect to the reference current, denoted as ${\widehat{v}}_{c1}$, and g₁₂ is the transfer function of the upper PV array voltage of the lower H-bridge module, with respect to the reference current, denoted as ${\widehat{v}}_{c2}$. The derived transfer functions are represented as (14)–(17). In Figure 4, Hv represents the controller for the voltage control of the current loop closed system.

$$g_{11}=\frac{{\widehat{v}}_{dc,1}}{{\widehat{v}}_{c1}}=\frac{H_i{G}_{v_{dc,1}{d}_1}\left(1+T_{i2}\right)-T_{i1}{H}_i{G}_{v_{dc,1}{d}_2}}{1+T_{i1}+T_{i2}}$$

(14)

$$g_{12}=\frac{{\widehat{v}}_{dc,1}}{{\widehat{v}}_{c2}}=\frac{H_i{G}_{v_{dc,1}{d}_2}\left(1+T_{i1}\right)-T_{i2}{H}_i{G}_{v_{dc,1}{d}_1}}{1+T_{i1}+T_{i2}}$$

(15)

$$G_{vdc1d1}=\frac{{\widehat{v}}_{dc,1}}{{\widehat{d}}_{11}}=-\frac{2I_L}{C_1}\frac{\left(s^2+\frac{\left(2D_{11}-1\right)V_{dc,1}}{L{I}_L}s+\frac{{\left(2D_{12}-1\right)}^2}{L{C}_2}\right)}{s\left(s^2+\frac{1}{L}\left(\frac{{\left(2D_{11}-1\right)}^2}{C_1}+\frac{{\left(2D_{12}-1\right)}^2}{C_2}\right)\right)}$$

(16)

$$G_{vdc1d2}=\frac{{\widehat{v}}_{dc,1}}{{\widehat{d}}_{12}}=-\frac{2\left(2D_{11}-1\right)V_{dc,2}}{L{C}_1}\frac{\left(s-\frac{\left(2D_{12}-1\right)I_L}{C_2{V}_{dc,2}}\right)}{s\left(s^2+\frac{1}{L}\left(\frac{{\left(2D_{11}-1\right)}^2}{C_1}+\frac{{\left(2D_{12}-1\right)}^2}{C_2}\right)\right)}$$

(17)

where H_i is the PI current controller and T_i1 and T_i2 are the current loop gains that are denoted as H_iG_iLd1 and H_iG_iLd2, respectively.

Similarly, g₂₁ is the transfer function of the lower PV array voltage of the upper H-bridge module, with respect to the reference current, denoted as ${\widehat{v}}_{c1}$, and the g₂₂ is the transfer function of the lower PV array voltage of the lower H-bridge module, with respect to the reference current, denoted as ${\widehat{v}}_{c2}$. The transfer functions are derived as (18)–(21).

$$g_{21}=\frac{{\widehat{v}}_{dc,2}}{{\widehat{v}}_{c1}}=\frac{H_i{G}_{v_{dc,2}{d}_1}\left(1+T_{i2}\right)-T_{i1}{H}_i{G}_{v_{dc,2}{d}_2}}{1+T_{i1}+T_{i2}}$$

(18)

$$g_{22}=\frac{{\widehat{v}}_{dc,2}}{{\widehat{v}}_{c2}}=\frac{H_i{G}_{v_{dc,2}{d}_2}\left(1+T_{i1}\right)-T_{i2}{H}_i{G}_{v_{dc,2}{d}_1}}{1+T_{i1}+T_{i2}}$$

(19)

$$G_{vdc2d1}=\frac{{\widehat{v}}_{dc,2}}{{\widehat{d}}_{11}}=-\frac{2\left(2D_{12}-1\right)V_{dc,1}}{L{C}_2}\frac{\left(s-\frac{\left(2D_{11}-1\right)I_L}{C_1{V}_{dc,1}}\right)}{s\left(s^2+\frac{1}{L}\left(\frac{{\left(2D_{11}-1\right)}^2}{C_1}+\frac{{\left(2D_{12}-1\right)}^2}{C_2}\right)\right)}$$

(20)

$$G_{vdc2d2}=\frac{{\widehat{v}}_{dc,2}}{{\widehat{d}}_{12}}=-\frac{2I_L}{C_2}\frac{\left(s^2+\frac{\left(2D_{12}-1\right)V_{dc,2}}{L{I}_L}s+\frac{{\left(2D_{11}-1\right)}^2}{L{C}_1}\right)}{s\left(s^2+\frac{1}{L}\left(\frac{{\left(2D_{11}-1\right)}^2}{C_1}+\frac{{\left(2D_{12}-1\right)}^2}{C_2}\right)\right)}$$

(21)

Thus, the outer voltage control-loops are designed to stabilize the current-loop closed system using the following loop design approach. Voltage loop T₁ is first designed without the voltage loop T₂. In this condition, the transfer function of the control voltage V_c2 to DC voltage V_dc2 with the closed T₁ loop can be derived as (22). In this equation, several loop gains are defined as follows:$T_{i1}=H_i{G}_{i_L{d}_1}$, $T_{i2}=H_i{G}_{i_L{d}_2}$, $T_{v1}=H_i{H}_v{G}_{v_{dc,1}{d}_1}$, and $T_x=-H_i{}^2{H}_v{G}_{v_{dc,1}{d}_2}{G}_{i_L{d}_1}$.

$${\frac{{\widehat{v}}_{dc,2}}{{\widehat{v}}_{c2}}|}_{T_1,closed}=\frac{H_i{G}_{v_{dc,2}{d}_2}\left(1+T_{i1}+T_{v1}\right)-H_i{G}_{v_{dc,2}{d}_1}\left(T_{i2}+H_i{H}_v{G}_{v_{dc,1}{d}_2}\right)}{1+T_{i1}+T_{i2}+T_{v1}+T_x+T_{i2}{T}_{v1}}$$

(22)

In this case, Hv is a voltage controller defined by (23), and DC gain and zero of the PI controller are designed so that the control loop T₂ has the desired cutoff bandwidth and the phase margin. This sequential design approach can be used to achieve the control objectives and stability.

$$T_2=H_v\cdot {\frac{{\widehat{v}}_{dc,2}}{{\widehat{v}}_{c2}}|}_{T_1, closed}$$

(23)

Because the system is a TITO system, the individual DC voltage control scheme has loop interaction. Thus, in order to minimize loop interaction, the inverted decoupling control scheme in Figure 5 can be employed.

The objective is to obtain the diagonal matrix in the series combination, between the matrix of the decoupling network and the matrix of the current-loop closed system [38]. In the inverted decoupling method, the off-diagonal elements are derived as (24) and (25).

$$d_{12}=-\frac{g_{12}}{g_{11}}=\frac{\raisebox{1ex}{${\widehat{v}}_{dc,1}$}\!\left/ \!\raisebox{-1ex}{${\widehat{v}}_{c2}$}\right.}{\raisebox{1ex}{${\widehat{v}}_{dc,1}$}\!\left/ \!\raisebox{-1ex}{${\widehat{v}}_{c1}$}\right.}$$

(24)

$$d_{21}=-\frac{g_{21}}{g_{22}}=\frac{\raisebox{1ex}{${\widehat{v}}_{dc,2}$}\!\left/ \!\raisebox{-1ex}{${\widehat{v}}_{c1}$}\right.}{\raisebox{1ex}{${\widehat{v}}_{dc,2}$}\!\left/ \!\raisebox{-1ex}{${\widehat{v}}_{c2}$}\right.}$$

(25)

3. Results

From the design point of view of the power converter, the single-phase grid-connected inverter should be able to operate at universal voltages up to 240 V_rms. If the output voltage of each H-bridge module is V_sw1 and V_sw2 in Figure 1, the current flowing in the system can be controlled by using the vector sum of the two output voltages as shown in Figure 6. Therefore, since the sum of the two output voltages must be greater than the grid voltage, the sum of the voltages of the two PV arrays must be set to 380 V or more. If the upper H bridge module is manufactured with a 300 V class power devices, the PV array can be designed to have a voltage of 200 V class. (5 series-configured arrays if the open-circuit voltage of the individual PV modules is 40 V). Since this paper focuses on the controller design of cascaded H-bridge inverter, we verify the performance based on the experimental set presented in Figure 7 and

Table 1. System parameters of the prototype PV system.

	Parameters
DC power supply	Vin1 = Vin2 = 0~250 V
Output filter inductor	L = 1 mH
DC-link capacitor	C1 = 2200 μF, C2 = 2200 μF
Resistor	R1 = R2 = 14 Ω
Grid voltage	Vg = 110 Vrms
Switching frequency	fsw = 5 kHz
Digital signal processor	TMS320F2812

. In the experimental set, two isolated power supplies with series resistors for emulating PV arrays are used, as shown in Figure 7. Since the output characteristics of each PV array can be controlled, the performance of the controller can be verified using the unbalanced PV output case shown in Figure 8.

Two DC power supplies, having an operating voltage range of 0–250 V and two resistors (R₁ and R₂) of 14 Ω, are selected. In this condition, the voltage loop gain of the experimental system is shown in Figure 9. The cutoff frequency of the voltage loop gain is 30–40 Hz, and the phase margin is around 45° for both input conditions. The analysis results of the feedforward current controller designed in Section 2 are shown in Figure 10. When feedforward is applied, it can be seen that the effect of the grid voltage on the grid current is further attenuated by −30 dB at the grid voltage frequency of 60 Hz.

Figure 11 shows the simulation results of the control performance for the designed voltage controller in Figure 9. In order to demonstrate the validity of the voltage controller designed with a cutoff frequency of 30 Hz, we simulated whether the DC voltages of the upper and lower H-bridge modules were tracking the voltage reference of 120 + 5sin (2π × 3t) V and 120 + 5sin (2π × 30t) V. Figure 11a shows the voltage control result when 120 + 5sin (2π × 3t) V is input as the DC link voltage reference of the upper and lower H-bridge modules. It can be seen that the average DC voltage follows the voltage reference except 120 Hz DC voltage ripple due to the pulsating power of double frequency of the grid voltage frequency present in the instantaneous power of the single phase system [39]. Figure 11b shows DC voltage control results of the upper and lower H-bridge modules for 120 + 5 sin (2π × 30t) V voltage references. As in the previous case, it can be seen that the DC voltage can follow the DC input voltage command on average, although there is a 120 Hz voltage ripple. Figure 11c is the 1-period enlarged waveform from the result of (a). As shown in the bottom result, it can be confirmed that the current is controlled to be in phase with the grid voltage.

To verify the independent DC link voltage control of the cascaded H-bridge inverter, a simulation considering the voltage reference step change is conducted with the conditions shown in Figure 7 and Table 1. In Figure 12, the DC link voltages of two H-bridge modules are initially controlled at 120 V. After 0.5 s, the upper H-bridge module voltage reference is changed to 130 V, and the lower module reference is changed to 110 V. Without employing the decoupling scheme, we can see the oscillatory voltage waveforms in light blue and light green. This oscillatory response results in a reduction in the conversion efficiency, and increase the system instability. However, when applied to the decoupling method, the input voltages of the two PV arrays can be stably controlled to their reference value, as shown in the blue and green waveforms.

Figure 13 and Figure 14 show the experimental results of an individual DC-link voltage and grid current control performance. Even though the two input source characteristics are different, maximum powers from each input source are extracted by controlling the individual DC voltage using the proposed method. In Figure 13, since the voltage of two input DC power sources is 240 V, the DC-link voltages at which maximum power is generated are 120 V. In Figure 14, because the two input DC supplies are 240 V and 200 V, the voltages of the maximum power are 120 V and 100 V, respectively. In the voltage control results shown in Figure 13, Figure 14 and Figure 15, the single-phase power injected into the grid includes the pulsating power with twice the frequency of the grid voltage as mentioned in reference [39]. However, it can be confirmed by the designed controller that the average voltage follows the voltage reference. In addition, the inverter output voltage of the cascaded H-bridge modules exhibits a five-level stair-case waveform. The grid current of Figure 15, which is the enlarged waveform of Figure 13, is controlled in phase with the grid voltage, and the summed power is stably transferred to the utility grid.

In this work, the DC voltage references are independently obtained from an advanced incremental conductance MPPT algorithm [40]. The algorithm flow-chart of the MPPT is shown in Figure 16. The variable DC step size is defined as (26) and is determined using the relationship of the incremental and instantaneous resistance of the PV arrays. The update period of the MPPT algorithm is set to 2 s and the maximum step size for changing the voltage references is 5 V.

$$M_i=1+\frac{V_{dc,i}\cdot d{I}_i}{I_{in,i}\cdot d{V}_{dc,i}}=1+\frac{R_i}{r_{s,i}}, i=1,2$$

(26)

Figure 17 shows the MPPT performance. Initially, because the power conversion system (PCS) does not work, the output DC voltages of the PV arrays are 240 V. After starting the operation, both output DC voltages of the PV arrays are controlled to their maximum power points. Further, the generated power of the PV arrays is transferred to the utility grid as shown in the red waveform.

4. Conclusions

In this paper, the modeling and controller design methods for individual MPPT of the single-phase cascaded H-bridge multilevel PV inverter are proposed. The small signal transfer functions are derived through the small-signal modeling approach. For the unity power factor, a PI current controller with a duty ratio feed-forward compensation method is employed. In order to achieve the individual MPPT of the PV arrays, each of the DC link voltage loops is designed to stabilize the current loop closed system. Especially, in order to avoid loop interaction in the current loop closed system, the voltage controller design with the inverted decoupling method is proposed. The inverted decoupling method to minimize the loop interaction of the TITO system has been verified by the simulation result, but the experimental performance will be done through the future work. The proposed control methods of the cascaded H-bridge multilevel PV inverter are validated through the simulation and experimental results on the 2-kW prototype system.