Abstract
The performance of true random number generators (TRNGs) fundamentally depends on the quality of their entropy sources (ESs). However, many FPGA-friendly designs still rely on a single mechanism and struggle to achieve both high throughput and low resource cost. To address this challenge, we propose the exclusive OR (XOR) Self-Feedback Ring Oscillator (XORSFRO), an XORNOT-style TRNG that integrates two cross-connected XOR gates with a short inverter delay chain and clocked sampling. A unified timing model is developed to describe how arrival-time skew and gate inertial delay lead to cancellation, narrow-pulse generation, and inversion events, thereby enabling effective entropy extraction. Experimental results on Xilinx Spartan-6 and Artix-7 FPGAs demonstrate that XORSFRO maintains stable operation across standard process–voltage–temperature (PVT) variations, while achieving higher throughput and lower hardware overhead compared with recent FPGA-based TRNGs. The generated bitstreams pass both the NIST SP 800-22 and NIST SP 800-90B test suites without post-processing.