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Article

A Large-Scale Neuromodulation System-on-Chip Integrating 128-Channel Neural Recording and 32-Channel Programmable Stimulation for Neuroscientific Applications

Department of Electronic Engineering, Pusan National University, Busan 46241, Republic of Korea
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Author to whom correspondence should be addressed.
Electronics 2025, 14(20), 4057; https://doi.org/10.3390/electronics14204057
Submission received: 14 September 2025 / Revised: 12 October 2025 / Accepted: 13 October 2025 / Published: 15 October 2025
(This article belongs to the Section Bioelectronics)

Abstract

We present a large-scale neuromodulation system-on-chip (SoC) that integrates a 128-channel neural recording and 32-channel stimulation ASIC designed for a wide range of neuroscientific applications. Each recording channel achieves low-noise performance (~4 μVrms) with a configurable bandwidth of 0.05 Hz–7.5 kHz and supports 16-bit digitization with scalable sampling rates up to 30 kS/s. To enhance signal quality, the ASIC includes an adjustable digital high-pass filter and a fast-settling function for rapid recovery from stimulation artifacts. SoC also incorporates on-chip electrode-impedance measurements as a built-in safety feature by reusing the recording channels. The stimulation subsystem generates current-controlled monopolar biphasic pulses with a high compliance voltage of ±6 V using standard low-voltage (1.8 V/3.3 V) CMOS devices. Each of the 32 stimulation channels provides arbitrary 9-bit programmable waveforms and dual current modes (4 μA/bit and 8 μA/bit), supporting both fine-resolution microstimulation and high-current applications such as spinal-cord and deep-brain stimulation. On-chip charge-balancing switches in each channel further ensure safe and reliable stimulation delivery. The SoC supports digital communication via a standard SPI with both 3.3 V CMOS and low-voltage differential signaling options and integrates all required analog references and low-dropout regulators. The prototype was fabricated in a standard 180 nm CMOS process, occupying 31.92 mm2 (equivalently, 0.2 mm2 per recording-and-stimulation channel), and was fully validated through benchtop measurements and in vitro experiments.
Keywords: neural recording; neural stimulation; brain–computer interface (BCI); biphasic current stimulation; electrode impedance measurement; low-noise analog front-end neural recording; neural stimulation; brain–computer interface (BCI); biphasic current stimulation; electrode impedance measurement; low-noise analog front-end

Share and Cite

MDPI and ACS Style

Park, G.; Kim, J.; Kim, M.; Kim, M.; Yoo, B.; Choi, J.; Kim, D.; Park, S.-Y. A Large-Scale Neuromodulation System-on-Chip Integrating 128-Channel Neural Recording and 32-Channel Programmable Stimulation for Neuroscientific Applications. Electronics 2025, 14, 4057. https://doi.org/10.3390/electronics14204057

AMA Style

Park G, Kim J, Kim M, Kim M, Yoo B, Choi J, Kim D, Park S-Y. A Large-Scale Neuromodulation System-on-Chip Integrating 128-Channel Neural Recording and 32-Channel Programmable Stimulation for Neuroscientific Applications. Electronics. 2025; 14(20):4057. https://doi.org/10.3390/electronics14204057

Chicago/Turabian Style

Park, Gunwook, Joongyu Kim, Minjae Kim, Minsung Kim, Byeongwoo Yoo, Jeongho Choi, Daehong Kim, and Sung-Yun Park. 2025. "A Large-Scale Neuromodulation System-on-Chip Integrating 128-Channel Neural Recording and 32-Channel Programmable Stimulation for Neuroscientific Applications" Electronics 14, no. 20: 4057. https://doi.org/10.3390/electronics14204057

APA Style

Park, G., Kim, J., Kim, M., Kim, M., Yoo, B., Choi, J., Kim, D., & Park, S.-Y. (2025). A Large-Scale Neuromodulation System-on-Chip Integrating 128-Channel Neural Recording and 32-Channel Programmable Stimulation for Neuroscientific Applications. Electronics, 14(20), 4057. https://doi.org/10.3390/electronics14204057

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