Generalized Multiport, Multilevel NPC Dual-Active-Bridge Converter for EV Auxiliary Power Modules

Abstract

Among other uses, DC-DC converters are employed in the auxiliary power modules (APMs) of electric vehicles (EVs), connecting the high-voltage traction battery to the low-voltage auxiliary system (AS). Traditionally, the APM is an isolated two-port, two-level (2L) DC-DC converter, and the auxiliary loads are fed at a fixed voltage level, e.g., 12 V in passenger cars. Dual-active-bridge (DAB) converters are commonly used for this application, as they provide galvanic isolation, high power density and efficiency, and bidirectional power flow capability. However, the auxiliary loads do not present a uniform optimum supply voltage, hindering overall efficiency. Thus, a more flexible approach, providing multiple supply voltages, would be more suitable for this application. Multiport DC-DC converters capable of feeding auxiliary loads at different voltage levels are a promising alternative. Multilevel neutral-point-clamped (NPC) DAB converters offer several advantages compared to conventional two-level (2L) ones, such as greater efficiency, reduced voltage stress, and enhanced scalability. The series connection of the NPC DC-link capacitors enables a multiport configuration without additional conversion stages. Moreover, the modular nature of the ML NPC DAB converter enables scalability while using semiconductors with the same voltage rating and without requiring additional passive components, thereby enhancing the converter’s power density and efficiency. This paper proposes a modulation strategy and decoupled closed-loop control strategy for the generalized multiport 2L-NL NPC DAB converter interfacing the EV traction battery with the AS, and its performance is validated through hardware-in-the-loop testing and simulations. The proposed modulation strategy minimizes conduction losses in the converter, and the control strategy effectively regulates the LV battery modules’ states of charge (SoC) by varying the required SoC and the power sunk by the LV loads, with the system stabilizing in less than 0.5 s in both scenarios.

1. Introduction

One of the major challenges of the climate emergency is the electrification of mobility systems on a global scale. The transport sector is responsible for one-fifth of carbon emissions worldwide [1], with road transport representing over 70% of the sector’s total emissions [2]. In response, global organizations are promoting the use of electric vehicles (EVs) in order to meet the growth in road transport demand while reducing their environmental impact. Notably, as a result of the measures included in the European Green Deal [3], EVs are projected to account for 80% of the total vehicles in use in Europe by 2050.

Figure 1 illustrates the typical electrical scheme of an EV. The on-board charger connects the AC charging port to the EV’s traction battery through its common high-voltage (HV) DC bus. The EV’s electric motor is then connected to the HV traction battery modules through a DC-AC converter. The EV auxiliary system (AS), comprising the low-voltage (LV) auxiliary battery and loads, is powered by the traction battery through the auxiliary power module (APM), interfacing the LV and HV DC buses.

Traditionally, the APM is a two-port DC-DC converter, and the auxiliary battery and loads are connected to its LV side, operating at a single voltage value, typically 12 V for passenger cars [4], as depicted in Figure 1a. The use of a bidirectional dual-active-bridge (DAB) DC-DC converter for this application is common, as it provides galvanic isolation, high power density, high efficiency, and the ability to transfer power in both directions [5,6,7,8,9].

However, the EV auxiliary loads do not present homogeneous power consumption. Loads such as electronic control units and infotainment systems are classified as low-power loads, whereas the powertrain cooling system, lighting, hydraulic brake system, windshield and window motors, and autonomous driving systems are considered high-power loads. By feeding high-power loads at a higher voltage than low-power loads, the current consumption and the required cabling cross-section are reduced, resulting in lower losses, cost, and weight. On the other hand, some low-power loads are supplied through a secondary converter, stepping down the voltage from 12 V to 5 V or 3.3 V. Then, feeding the low-power loads from lower-voltage DC ports allows reducing the voltage reduction factor of the secondary converter, which improves efficiency and power density. Furthermore, the increasing demand for vehicle amenities drives manufacturers to incorporate more features to enhance the EV’s appeal to the public, which translates into more LV loads in the AS with an increasing variety of optimum operating voltages.

In this context, a multiple-voltage architecture is an effective solution for the AS. Figure 1b depicts the electrical scheme of an EV using a dual-voltage architecture. In this configuration, the low-power auxiliary loads are connected to the lower-voltage LV bus 1, operating at $V_{\mathrm{LV},1}$, whereas the high-power auxiliary loads are connected to the higher-voltage LV bus 2, operating at $V_{\mathrm{LV},2}$, with $V_{\mathrm{LV},2}>V_{\mathrm{LV},1}$. This multiple-voltage structure uses two auxiliary batteries operating at different voltage levels and requires the integration of multiple DC ports rated at different voltages within the APM.

Multiport DC-DC converters (MPCs) are a suitable option for the APM in EVs with a multiple-voltage architecture in their AS [10]. Several MPC topologies have been proposed in the literature for this purpose [11,12,13,14,15,16,17,18,19,20,21,22]. These topologies are different variations of two-port, two-level (2L) isolated DC-DC converters that form MPCs. Some proposed topologies, such as the triple active bridge (TAB) proposed in [11], the resonant three-port converters presented in [12,13], the cascaded DC-DC converter proposed in [14], or the interleaved dual floating current-fed DAB converter presented in [15], add an additional full-bridge cell to obtain a three-port connection. Alternatively, new three-port and four-port isolated DC-DC topologies can be obtained by integrating additional passive components into the two-port 2L DAB converter [16,19,20,22], by modifying the configuration of the converter’s active switches and diodes [17,18], or by combining multiple 2L DC-DC converter topologies [21]. These topologies enable the use of multiple LV batteries in the AS operating at different voltage levels and present different trade-offs among reduced overall losses, power density, and the control of power flow between the different ports.

The use of multilevel (ML) DAB converters is an alternative approach for the design of a multiport APM. The most studied topology for multilevel (ML) DAB converters is the neutral-point-clamped (NPC) [23], mainly due to its great compactness, power density, and efficiency, which are highly beneficial features in EVs. Furthermore, the series connection of the DC-link capacitors in an NPC DAB converter can be employed to obtain multiple DC ports with different voltage levels, resulting in a multiport DC-DC single-stage converter, i.e., without requiring additional conversion stages to obtain multiple DC ports. The 3L NPC DAB converter has been studied in recent years for multiport applications. For instance, the use of a multiport 2L-3L NPC DAB converter was proposed in [24,25,26] for controlling the voltage balance in bipolar LV and MV DC distribution systems. However, no studies have investigated 4L or higher-level NPC DAB converters in single-stage multiport configurations.

Figure 2a illustrates the proposed connection of the EV AS to the traction battery (${\mathrm{B}}_{\mathrm{HV}}$) using a multiport 2L-3L NPC DAB converter, with the converter legs depicted as single-pole double-throw (SP-2T) and single-pole triple-throw (SP-3T) switches at the HV and LV sides, respectively. At the LV side, the connection uses the two DC ports to supply two 12-V battery modules (${\mathrm{B}}_{\mathrm{LV},1}$ and ${\mathrm{B}}_{\mathrm{LV},2}$) and the LV loads. The battery modules are connected between consecutive nodes of the 3L DC link. The auxiliary loads are divided into two main groups: low-power loads, connected to the 12-V rail of the LV DC link (between nodes $2_{\mathrm{LV}}$ and $1_{\mathrm{LV}}$), and high-power loads, connected to the 24-V rail (between nodes $3_{\mathrm{LV}}$ and $1_{\mathrm{LV}}$).

Expanding on this concept, Figure 2b illustrates the proposed connection using a multiport 2L-4L NPC DAB converter. The converter uses three DC ports to supply three 12-V battery modules, each connected between consecutive nodes of the converter’s 4L DC link. Then, auxiliary loads are connected either to the 36-V rail (between nodes $4_{\mathrm{LV}}$ and $1_{\mathrm{LV}}$), the 24-V rail (between nodes $3_{\mathrm{LV}}$ and $1_{\mathrm{LV}}$), or the 12-V rail (between nodes $2_{\mathrm{LV}}$ and $1_{\mathrm{LV}}$), depending on their optimal voltage supply values.

Thus, by increasing the number of levels of the multiport NPC DAB converter, a higher number of 12-V battery modules can be connected between the nodes of the ML DC link. This results in a higher voltage across the end terminals of the DC link and provides more DC ports with partial voltage levels. The modular nature of the proposed connection then enables scalability while using the same voltage-rated semiconductors across all configurations. Furthermore, multiple voltage levels are achieved by stacking the battery modules of the same operating voltage in series, avoiding the need for different battery models and thus further simplifying the system design.

Following this approach, this paper proposes a novel generalized connection of $N-1$ LV battery modules and $N-1$ auxiliary loads to a multiport 2L-NL NPC DAB converter. This configuration is illustrated in Figure 2c and can be implemented using different topologies of NPC legs, such as the diode-clamped NPC, the active NPC (ANPC), or the T-type NPC, as presented in [27] and depicted in Figure 3.

In the proposed connection, the power sunk by the loads connected to the partial-voltage DC ports imposes an unbalanced power sourcing from the LV battery modules, which must be compensated through appropriate converter operation. To overcome this challenge, the electric currents in the NL-side DC link are analyzed, and a generalized modulation strategy and a closed-loop control strategy are proposed, effectively regulating the state of charge (SoC) of the LV battery modules while ensuring a wide range of power-supply distribution to the loads.

The rest of this paper is organized as follows. Section 2 introduces the generalized modulation strategy for the multiport 2L-NL NPC DAB converter. Section 3 presents the proposed strategy for controlling the SoC of the auxiliary battery modules. Section 4 introduces a decoupling approach for the control. Section 5 details the results obtained through hardware-in-the-loop (HIL) tests and MATLAB/Simulink simulations. Finally, Section 6 discusses the relevance of the proposed connection and control strategy and outlines future research work.

2. Generalized Modulation Strategy for the Multiport 2L-NL NPC DAB Converter

2.1. Analysis of NL-Side DC Link Currents

To define an effective modulation strategy for the multiport 2L-NL NPC DAB converter, an analysis of the electrical currents in the NL-side DC link must be performed.

Figure 4a presents the connection of the loads $R_1$ and $R_2$ to the nodes $2_{\mathrm{LV}}$ and $3_{\mathrm{LV}}$ of the LV-side DC link of the 2L-3L NPC DAB converter. Currents $i_3$ and $i_2$ are injected by the converter into nodes $3_{\mathrm{LV}}$ and $2_{\mathrm{LV}}$, respectively, while $I_{\mathrm{R}1}$ and $I_{\mathrm{R}2}$ are sunk by loads $R_1$ and $R_2$, respectively. The expressions for the average currents over a switching period in the battery modules, $I_{\mathrm{B}1}$ and $I_{\mathrm{B}2}$, can be obtained by applying the Kirchhoff current law (KCL) to nodes $2_{\mathrm{LV}}$ and $3_{\mathrm{LV}}$, and are

$$\left\{\begin{array}{c}{I}_{\mathrm{B}2}=I_3-I_{\mathrm{R}2}\hfill \\ I_{\mathrm{B}1}=I_3+I_2-I_{\mathrm{R}2}-I_{\mathrm{R}1}\hfill \end{array}\right.$$

(1)

where $I_2$ and $I_3$ are the average values over a switching cycle of $i_2$ and $i_3$, respectively.

Expanding this concept to the 2L-4L NPC DAB converter (Figure 4b), the expressions for the battery average currents are

$$\left\{\begin{array}{c}{I}_{\mathrm{B}3}=I_4-I_{\mathrm{R}3}\hfill \\ I_{\mathrm{B}2}=I_4+I_3-I_{\mathrm{R}3}-I_{\mathrm{R}2}\hfill \\ I_{\mathrm{B}1}=I_4+I_3+I_2-I_{\mathrm{R}3}-I_{\mathrm{R}2}-I_{\mathrm{R}1}\hfill \end{array}.\right.$$

(2)

From Equations (1) and (2), the generalized expression for the average current in the nth LV battery module of an NL DC link is obtained following an inductive process and is

$$I_{\mathrm{B}n}=\sum _{k=n+1}^N\left(I_k-I_{\mathrm{R}(\mathit{k}-1)}\right).$$

(3)

To guarantee the power supply to the loads, it is necessary to ensure that the batteries’ SoC variation is minimum or even zero, i.e., the SoC is kept constant. The SoC of all the battery modules is constant when their average current is zero, $I_{\mathrm{B}n}=0\forall n=\{1,\dots ,N-1\}$. From Equation (3), this is only true when the average current injected by the converter into each node of the DC link is equal to the current sunk by the group of loads connected to the node; i.e., $I_n=I_{\mathrm{R}(n-1)}\forall n\in \{2,\dots ,N\}$.

Let us assume that the maximum current sunk by each group of loads ($R_1$, $R_2$, …, $R_{N-1}$ in Figure 4c) is the same, denoted as $I_{\max }$. Then, the maximum power sunk by the loads connected to node n is

$$P_{\mathrm{R}(n-1),\max }=I_{\max }·V_{\mathrm{LV}}·(n-1)$$

(4)

where $V_{\mathrm{LV}}$ is the voltage of one LV battery module.

Furthermore, the maximum power transferred by the converter in steady-state operation, $P_{\mathrm{tot},\max }$, is equal to the maximum power consumed by all groups of loads simultaneously. Then, for a 2L-NL converter, $I_{\max }$ is expressed as a function of $P_{\mathrm{tot},\max }$ as

$$I_{\max }=\frac{2·P_{\mathrm{tot},\max }}{V_{\mathrm{LV}}·N·(N-1)}.$$

(5)

This poses a great challenge, as the converter must be able to inject up to $I_{\max }$ into each node of the LV-side DC link to keep the SoC of the battery modules constant in steady-state operation. Moreover, if an imbalance occurs between the SoCs of the LV battery modules, the modulation parameters must be changed such that $I_n\ne I_{\mathrm{R}(n-1)}$ to properly charge/discharge ${\mathrm{B}}_{\mathrm{LV},n}$ and correct the imbalance.

The present section describes the generalized modulation strategy for the multiport 2L-NL NPC DAB converter, which can overcome the challenge presented above and attain suitable performance with reduced conduction losses.

2.2. Modulation Strategy for the Multiport 2L-3L NPC DAB Converter

The generalized 2L-NL NPC DAB modulation strategy proposed in the present work is built upon a modulation and switching pattern, denoted as $\beta$ in [25], for the 2L-3L NPC DAB converter. This modulation strategy enables control of the power injection into nodes $2_{\mathrm{LV}}$ and $3_{\mathrm{LV}}$ of the 3L DC link using two degrees of freedom (DoFs). Figure 5a depicts the AC voltage waveforms $v_{\mathrm{HV}}$ and $v_{\mathrm{LV}}$, along with the instantaneous current in the series inductor, $i_{\mathrm{L}}$, and the converter HV-side and LV-side switching patterns. The primary-side transformer voltage, $v_{\mathrm{HV}}$, is a two-level square waveform, whereas the secondary-side voltage, $v_{\mathrm{LV}}$, is a four-level stepped waveform with quarter-wave symmetry. In [25], the power injection is controlled with the phase shift between $v_{\mathrm{HV}}$ and $v_{\mathrm{LV}}$ (${\phi }_1$) and the $v_{\mathrm{LV}}$ dwell time at $V_{\mathrm{LV}}$ and $-V_{\mathrm{LV}}$ (${\phi }_2$). In order to simplify the forthcoming generalization of the modulation strategy, let us choose as DoFs the phase shift between $v_{\mathrm{HV}}$ and $v_{\mathrm{LV}}$, $\phi$ (equal to ${\phi }_1$), and the $v_{\mathrm{LV}}$ dwell time at $2V_{\mathrm{LV}}$ and $-2V_{\mathrm{LV}}$, $\alpha$ (equal to $\pi -{\varphi }_2$), both depicted in Figure 5a.

Figure 6a illustrates $v_{\mathrm{LV}}$ along with the converter’s 3L-side switching pattern. The fundamental component of the inductor current is divided into a component in phase with $v_{\mathrm{LV}}$, i.e., $i_{\mathrm{L},1}^{\mathrm{p}}$, and a component in quadrature with $v_{\mathrm{LV}}$, i.e., $i_{\mathrm{L},1}^{\mathrm{q}}$. To visualize the current distribution among the DC-link nodes, the red areas in Figure 6a depict the charge injected (+)/drawn (−) by $i_{\mathrm{L},1}^{\mathrm{p}}$ and by $i_{\mathrm{L},1}^{\mathrm{q}}$ into/from node $2_{\mathrm{LV}}$, while the green areas depict the charge injected (+)/drawn (−) into/from node $3_{\mathrm{LV}}$. Due to the quarter-wave symmetry of the AC voltage waveform, only the in-phase component transfers power to the DC-link nodes, whereas $i_{\mathrm{L},1}^{\mathrm{q}}$ does not contribute to power injection, as its positive and negative areas cancel out over a switching period, and it is disregarded in the analysis. The LV-side switching pattern ensures that the average currents injected by $i_{\mathrm{L},1}^{\mathrm{p}}$ into $2_{\mathrm{LV}}$ and $3_{\mathrm{LV}}$ are positive, which are expressed as

$$I_2=\frac{2}{\pi ·rt}{\int }_0^{\frac{\pi }{2}-\frac{\alpha }{2}}{I}_{\mathrm{L},1}^{\mathrm{p}}·sin\left(\theta \right)·d\theta$$

(6)

$$I_3=\frac{2}{\pi ·rt}{\int }_{\frac{\pi }{2}-\frac{\alpha }{2}}^{\frac{\pi }{2}}{I}_{\mathrm{L},1}^{\mathrm{p}}·sin\left(\theta \right)·d\theta$$

(7)

where $I_{\mathrm{L},1}^{\mathrm{p}}$ is the amplitude of $i_{\mathrm{L},1}^{\mathrm{p}}$, and $rt$ is the transformer’s turns ratio, as defined in Figure 2c. The angle $\alpha$ controls the currents’ ratio $I_2/I_3$, while $\phi$ controls their total sum $I_2+I_3$.

2.3. Modulation Strategy for the Multiport 2L-NL NPC DAB Converter

Building upon the 2L-3L NPC DAB strategy, a modulation and switching strategy for the generalized 2L-NL NPC DAB converter is proposed. The converter features $N-1$ battery modules and N nodes in its LV-side DC link. Figure 5b presents the waveforms for $v_{\mathrm{HV}}$, $v_{\mathrm{LV}}$, and $i_{\mathrm{L}}$, as well as the converter’s HV-side and LV-side switching patterns. As with the 2L-3L converter, $v_{\mathrm{HV}}$ is a two-level square waveform. The secondary-side voltage $v_{\mathrm{LV}}$ is a stepped waveform featuring $2(N-1)$ levels. The modulation uses $N-1$ DoFs: the phase shift, $\phi$, and the modulation angles, ${\alpha }_1,\dots ,{\alpha }_{N-2}$, which control the dwell time at each voltage level.

Figure 6b illustrates $v_{\mathrm{LV}}$ along with the converter’s NL-side switching pattern. As with the 2L-3L converter, $v_{\mathrm{LV}}$ features quarter-wave symmetry; thus, only $i_{\mathrm{L},1}^{\mathrm{p}}$ transfers power to the DC-link nodes. Figure 6b depicts the charge injected into nodes $2_{\mathrm{LV}}$ to $N_{\mathrm{LV}}$. The LV-side switching pattern ensures that the average current injected by $i_{\mathrm{L},1}^{\mathrm{p}}$ into node n is positive, which is expressed as

$$I_n=\frac{2}{\pi ·rt}{\int }_{\frac{\pi }{2}-\frac{{\alpha }_{n-2}}{2}}^{\frac{\pi }{2}-\frac{{\alpha }_{n-1}}{2}}{I}_{\mathrm{L},1}^{\mathrm{p}}·sin\left(\theta \right)·d\theta ,\forall n\in \{2,\dots ,N\},{\alpha }_{N-1}=0,{\alpha }_0=\pi .$$

(8)

The proposed modulation strategy thus allows control of the current injected into each DC-link node by properly adjusting the modulation angles, $\phi ,{\alpha }_1,\dots ,{\alpha }_{N-2}$.

2.4. Assessment of Conduction Losses for the Proposed Modulation Strategy

The modulation strategy proposed for the generalized 2L-NL NPC DAB converter eliminates zero-voltage dwell times in $v_{\mathrm{HV}}$ and $v_{\mathrm{LV}}$, thereby maximizing the amplitude of their fundamental components, which directly impacts the conduction losses of the converter. In a DAB converter, the root-mean-square (RMS) value of the current flowing through the HF inductor, $I_{\mathrm{L},\mathrm{rms}}$, is commonly used as a figure of merit for the converter’s conduction losses [28]. In the APM, minimizing conduction losses is a priority due to the LV side’s high operating currents resulting from the low operating voltage of the auxiliary system.

To illustrate the RMS current minimization, the duty ratio $D_{0\mathrm{V}}$ is introduced. This parameter, expressed in p.u., defines the zero-voltage dwell time of $v_{\mathrm{LV}}$ over a switching period. In the proposed modulation strategy, the modulation angles are defined such that $D_{0\mathrm{V}}=0$. However, it is possible to implement a modulation strategy with the same DoFs while fixing $D_{0\mathrm{V}}>0$.

Figure 7a,b show the HF link AC voltage and current waveforms for a multiport 2L-3L NPC DAB converter at the nominal operating point of the converter ($I_{\mathrm{R}2}=I_{\mathrm{R}3}=27.7\mathrm{A}$) for $D_{0\mathrm{V}}=0$ and $D_{0\mathrm{V}}=1/3$, respectively. Figure 7c presents the value of $I_{\mathrm{L},\mathrm{rms}}$ across the full operating range of the converter ($0\le I_{\mathrm{R}2}\le 27.7\mathrm{A}$, $0\le I_{\mathrm{R}3}\le 27.7\mathrm{A}$) for $D_{0\mathrm{V}}=0$, $D_{0\mathrm{V}}=1/6$, and $D_{0\mathrm{V}}=1/3$. Comparing Figure 7a,b shows that the current amplitude is lower when $D_{0\mathrm{V}}=0$.

The results in Figure 7c show that the minimum $I_{\mathrm{L},\mathrm{rms}}$ is achieved when $D_{0\mathrm{V}}=0$ across the entire operating range, and that its value increases with $D_{0\mathrm{V}}$, reaching a maximum for all combinations of $\{I_{\mathrm{R}2},I_{\mathrm{R}3}\}$ when $D_{0\mathrm{V}}=1/3$. Therefore, fixing $D_{0\mathrm{V}}=0$ results in a minimum inductor RMS current, thereby minimizing conduction losses in the converter. In this case, the amplitude of the fundamental component of $v_{\mathrm{LV}}$ is reduced, requiring a higher value of $\phi$ to inject the same amount of current into the LV DC-link nodes. Consequently, $I_{\mathrm{L},\mathrm{rms}}$ increases.

3. Generalized Control Strategy

3.1. Derivation of the SoC Expression for LV Battery Modules

To design an effective control strategy for the multiport 2L-NL NPC DAB converter, it is necessary to derive the expression for the variables to be controlled, i.e., the SoC of the LV battery modules connected to the NL-side DC link, as a function of the DoFs of the converter, i.e., the modulation angles $\phi ,{\alpha }_1,\dots {\alpha }_{N-2}$.

The SoC of the nth battery module at a given instant $t_1$ is expressed as

$$So{C}_{\mathrm{B}n}\left(t_1\right)=So{C}_{\mathrm{B}n}\left(t_0\right)+\frac{1}{C}{\int }_{t_0}^{t_1}{I}_{\mathrm{B}n}·dt$$

(9)

where $t_0<t_1$, and C is the capacity of each battery module. From Equations (3) and (8), the current in the battery modules is

$$I_{\mathrm{B}n}=\sum _{k=n}^{N-1}\left(\frac{2}{\pi ·rt}{\int }_{\frac{\pi }{2}-\frac{{\alpha }_{k-1}}{2}}^{\frac{\pi }{2}-\frac{{\alpha }_k}{2}}{I}_{\mathrm{L},1}^{\mathrm{p}}·sin\left(\theta \right)·d\theta -I_{\mathrm{R}\mathit{k}}\right),\forall n\in \{1,\dots ,N-1\},{\alpha }_{N-1}=0,{\alpha }_0=\pi .$$

(10)

The expression for $I_{\mathrm{L},1}^{\mathrm{p}}$ is derived by analyzing the converter considering only the fundamental components of the HF voltages, $v_{\mathrm{HV},1}$ and $v_{\mathrm{LV},1}$. Figure 8 depicts a simplified representation of the converter’s HF link, where $v_{\mathrm{LV},1}^{\prime }$ is the LV-side AC voltage, referred to the HV side.

The power transferred by the converter is

$$P_{\mathrm{DAB}}=\frac{U_{\mathrm{HV},1}·U_{\mathrm{LV},1}^{\prime }}{2\pi fL}·sin\left(\phi \right)·\frac{1}{2}$$

(11)

where $U_{\mathrm{HV},1}$ and $U_{\mathrm{LV},1}^{\prime }$ are the amplitudes of the AC voltages, L is the series inductance, and f is the converter switching frequency. Alternatively, $P_{\mathrm{DAB}}$ can be expressed as

$$P_{\mathrm{DAB}}=\frac{I_{\mathrm{L},1}^{\mathrm{p}}·U_{\mathrm{LV},1}^{\prime }}{2}.$$

(12)

Furthermore, as $v_{\mathrm{HV}}$ is a square waveform, the amplitude of its fundamental component is $U_{\mathrm{HV},1}=\frac{4·V_{\mathrm{HV}}}{\pi }$, where $V_{\mathrm{HV}}$ is the HV-side DC-link voltage. Then, from Equations (11) and (12), the expression of $I_{\mathrm{L},1}^{\mathrm{p}}$ is derived as

$$I_{\mathrm{L},1}^{\mathrm{p}}=\frac{2·V_{\mathrm{HV}}}{{\pi }^{2}fL}·sin\left(\phi \right).$$

(13)

Finally, from Equations (9), (10) and (13), the current flowing through the $N-1$ battery modules and their SoCs are expressed as a function of the DoFs of the converter as

$$\left[\begin{array}{c}{I}_{\mathrm{B}1}\\ I_{\mathrm{B}2}\\ ⋮\\ I_{\mathrm{B}(\mathit{N}-1)}\end{array}\right]=\left[\begin{array}{c}\frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrt}sin\left(\phi \right)-\sum _{k=1}^{N-1}{I}_{\mathrm{R}k}\\ \frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrt}sin\left(\phi \right)sin\left({\alpha }_1/2\right)-\sum _{k=2}^{N-1}{I}_{\mathrm{R}k}\\ ⋮\\ \frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrt}sin\left(\phi \right)sin\left({\alpha }_{N-2}/2\right)-I_{\mathrm{R}(N-1)}\end{array}\right]$$

(14)

and

$$\left[\begin{array}{c}So{C}_{\mathrm{B}1}\left(t_1\right)\\ So{C}_{\mathrm{B}2}\left(t_1\right)\\ ⋮\\ So{C}_{\mathrm{B}(N-1)}\left(t_1\right)\end{array}\right]=\left[\begin{array}{c}So{C}_{\mathrm{B}1}\left(t_0\right)+{\int }_{t_0}^{t_1}\frac{1}{C}\left(\frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrt}sin\left(\phi \right)-\sum _{k=1}^{N-1}{I}_{\mathrm{R}k}\right)·dt\\ So{C}_{\mathrm{B}2}\left(t_0\right)+{\int }_{t_0}^{t_1}\frac{1}{C}\left(\frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrt}sin\left(\phi \right)sin\left({\alpha }_1/2\right)-\sum _{k=2}^{N-1}{I}_{\mathrm{R}k}\right)·dt\\ ⋮\\ So{C}_{\mathrm{B}(N-1)}\left(t_0\right)+{\int }_{t_0}^{t_1}\frac{1}{C}\left(\frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrt}sin\left(\phi \right)sin\left({\alpha }_{N-2}/2\right)-I_{\mathrm{R}(N-1)}\right)·dt\end{array}\right].$$

(15)

3.2. Closed-Loop Control

Equation (15) illustrates the relation between the controlled variables $So{C}_{\mathrm{B}1}$,$So{C}_{\mathrm{B}2}$, …, $So{C}_{\mathrm{B}(N-1)}$, and the modulation angles $\phi ,{\alpha }_1,\dots ,{\alpha }_{N-2}$. The value of $So{C}_{\mathrm{B}1}$ only depends on $\phi$, whereas the values of $So{C}_{\mathrm{B}2}$ to $So{C}_{\mathrm{B}(\mathit{N}-1)}$ depend on both $\phi$ and their corresponding $\alpha$ angles, ${\alpha }_1$ to ${\alpha }_{N-2}$. Thus, $So{C}_{\mathrm{B}1}$,$So{C}_{\mathrm{B}2}$, …, $So{C}_{\mathrm{B}(N-1)}$ are regulated by adjusting the value of the modulation angles $\phi$, ${\alpha }_1,\dots ,{\alpha }_{N-2}$, respectively.

Figure 9 depicts the proposed generalized closed-loop control strategy for the multiport 2L-NL NPC DAB converter. The output variables $So{C}_{\mathrm{B}1}$ to $So{C}_{\mathrm{B}(N-1)}$ are controlled by adjusting the value of the control variables, i.e., the modulation angles $\phi$ to ${\alpha }_{N-2}$. The error between the reference and measured values for the output variables ($So{C}_{\mathrm{B}n}^{\ast }$ and $So{C}_{\mathrm{B}n}$, respectively) is the input of $N-1$ PI compensators, whose outputs, $z_1$ to $z_{N-1}$, are bounded, obtaining the values of the modulation angles ($\phi$ to ${\alpha }_{N-2}$).

4. Generalized Decoupled Control Strategy

In the control system depicted in Figure 9, each output variable, $So{C}_{\mathrm{B}1}$ to $So{C}_{\mathrm{B}(\mathit{N}-1)}$, is controlled by adjusting the value of a single modulation angle, $\phi$ to ${\alpha }_{N-2}$.

However, a variation in $\phi$ simultaneously affects all output variables. If $So{C}_{\mathrm{B}1}$ deviates from its reference, the controller adjusts $\phi$ such that $I_{\mathrm{B}1}\ne 0$ to properly charge/discharge ${\mathrm{B}}_{\mathrm{LV},1}$ and correct the SoC error. While $I_{\mathrm{B}1}$ only depends on $\phi$, currents $I_{\mathrm{B}2}$ to $I_{\mathrm{B}(\mathit{N}-1)}$ depend on both $\phi$ and their respective $\alpha$ angles, ${\alpha }_1$ to ${\alpha }_{N-2}$ (Equation (14)). Consequently, when the controller adjusts $\phi$ to correct an $So{C}_{\mathrm{B}1}$ deviation, $I_{\mathrm{B}2}$ to $I_{\mathrm{B}(\mathit{N}-1)}$ are perturbed, resulting in modules ${\mathrm{B}}_{\mathrm{LV},2}$ to ${\mathrm{B}}_{\mathrm{LV},N-1}$ being discharged, thereby causing the output variables $So{C}_{\mathrm{B}2}$ to $So{C}_{\mathrm{B}(\mathit{N}-1)}$ to deviate from their references. Therefore, a coupling exists between the $So{C}_{\mathrm{B}1}$ control loop and the rest of the battery modules’ SoC control loops.

To mitigate this coupling, let us define a decoupling strategy based on a decoupling matrix. To do so, the plant is linearized, assuming that the converter operates at an equilibrium operating point.

Around a given equilibrium point, i.e., in steady-state operation, the modulation angles are expressed as

$$\left[\begin{array}{c}\phi \\ {\alpha }_1\\ ⋮\\ {\alpha }_{N-2}\end{array}\right]=\left[\begin{array}{c}{\phi }_{\mathrm{e}}+\Delta \phi \\ {\alpha }_{1,\mathrm{e}}+\Delta {\alpha }_1\\ ⋮\\ {\alpha }_{N-2,\mathrm{e}}+\Delta {\alpha }_{N-2}\end{array}\right]$$

(16)

where ${\phi }_{\mathrm{e}},{\alpha }_{1,\mathrm{e}},\dots ,{\alpha }_{N-2,\mathrm{e}}$ are the values of the angles at equilibrium, and $\Delta \phi ,\Delta {\alpha }_1,\dots ,\Delta {\alpha }_{N-2}$ represent small variations from equilibrium.

Furthermore, the current in the nth battery module can be linearized as

$$I_{\mathrm{B}\mathit{n}}=I_{\mathrm{B}\mathit{n},\mathrm{e}}+\Delta I_{\mathrm{B}\mathit{n}}$$

(17)

where $I_{\mathrm{B}\mathit{n},\mathrm{e}}$ is the equilibrium value and

$$\left\{\begin{array}{cc}\hfill \Delta I_{\mathrm{B}1}=& {\left.\frac{d{I}_{\mathrm{B}1}}{d\phi }\right|}_{{\phi }_{\mathrm{e}}}·\Delta \phi \hfill \\ \hfill \Delta I_{\mathrm{B}\mathit{n}}=& {\left.\frac{d{I}_{\mathrm{B}\mathit{n}}}{d\phi }\right|}_{{\phi }_{\mathrm{e}},{\alpha }_{n-1,\mathrm{e}}}·\Delta \phi +{\left.\frac{d{I}_{\mathrm{B}\mathit{n}}}{d{\alpha }_{n-1}}\right|}_{{\phi }_{\mathrm{e}},{\alpha }_{n-1,\mathrm{e}}}·\Delta {\alpha }_{n-1},\forall n\in \{2,\dots ,N-1\}\hfill \end{array}.\right.$$

(18)

In steady state, $So{C}_{\mathrm{B}\mathit{n}}$ is constant, i.e., $I_{\mathrm{B}\mathit{n}},\mathrm{e}=0$. Then, $I_{\mathrm{B}\mathit{n}}=\Delta I_{\mathrm{B}\mathit{n}}$, and the linear expressions for $I_{\mathrm{B}1},\dots ,I_{\mathrm{B}(\mathit{N}-1)}$ are

$$\left[\begin{array}{c}{I}_{\mathrm{B}1}\\ I_{\mathrm{B}2}\\ ⋮\\ I_{\mathrm{B}(\mathit{N}-1)}\end{array}\right]=\frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrt}\left[\begin{array}{c}cos\left({\phi }_{\mathrm{e}}\right)·\Delta \phi \\ cos\left({\phi }_{\mathrm{e}}\right)·sin\left({\alpha }_{1,\mathrm{e}}/2\right)·\Delta \phi +\frac{1}{2}·sin\left({\phi }_{\mathrm{e}}\right)·cos\left({\alpha }_{1,\mathrm{e}}/2\right)·\Delta {\alpha }_1\\ ⋮\\ cos\left({\phi }_{\mathrm{e}}\right)·sin\left({\alpha }_{N-2,\mathrm{e}}/2\right)·\Delta \phi +\frac{1}{2}·sin\left({\phi }_{\mathrm{e}}\right)·cos\left({\alpha }_{N-2,\mathrm{e}}/2\right)·\Delta {\alpha }_{N-2}\end{array}\right].$$

(19)

From Equations (15) and (19), the variations in the control output variables are then expressed in the Laplace domain as

$$\begin{array}{cc}\hfill & \left[\begin{array}{c}\Delta So{C}_{\mathrm{B}1}\\ \Delta So{C}_{\mathrm{B}2}\\ ⋮\\ \Delta So{C}_{\mathrm{B}(\mathit{N}-1)}\end{array}\right]={\displaystyle \frac{1}{s}}{\displaystyle \frac{1}{C}}\left[\begin{array}{c}{I}_{\mathrm{B}1}\\ I_{\mathrm{B}2}\\ ⋮\\ I_{\mathrm{B}(\mathit{N}-1)}\end{array}\right]\hfill \\ \hfill & ={\displaystyle \frac{1}{s}}{\displaystyle \frac{4·V_{\mathrm{HV}}}{C{\pi }^{3}fLrt}}·\left[\begin{array}{c}cos\left({\phi }_{\mathrm{e}}\right)·\Delta \phi \\ cos\left({\phi }_{\mathrm{e}}\right)·sin\left({\alpha }_{1,\mathrm{e}}/2\right)·\Delta \phi +\frac{1}{2}·sin\left({\phi }_{\mathrm{e}}\right)·cos\left({\alpha }_{1,\mathrm{e}}/2\right)·\Delta {\alpha }_1\\ ⋮\\ cos\left({\phi }_{\mathrm{e}}\right)·sin\left({\alpha }_{N-2,\mathrm{e}}/2\right)·\Delta \phi +\frac{1}{2}·sin\left({\phi }_{\mathrm{e}}\right)·cos\left({\alpha }_{N-2,\mathrm{e}}/2\right)·\Delta {\alpha }_{N-2}\end{array}\right].\hfill \end{array}$$

(20)

Thus, the plant transfer function matrix can be defined as

$$\left[\begin{array}{c}\Delta So{C}_{\mathrm{B}1}\\ \Delta So{C}_{\mathrm{B}2}\\ ⋮\\ \Delta So{C}_{\mathrm{B}(\mathit{N}-1)}\end{array}\right]=\frac{1}{s}·a·C_{N\mathrm{L}}·\left[\begin{array}{c}\Delta \phi \\ \Delta {\alpha }_1\\ ⋮\\ \Delta {\alpha }_{N-2}\end{array}\right]$$

(21)

where $a=\frac{4·V_{\mathrm{HV}}}{{\pi }^{3}fLrtC}$ and $C_{N\mathrm{L}}$ is the plant coupling matrix, derived from Equation (20) and expressed as

$$C_{N\mathrm{L}}=\left[\begin{array}{cccc}cos\left({\phi }_{\mathrm{e}}\right)& 0& \dots & 0\\ cos\left({\phi }_{\mathrm{e}}\right)·sin\left({\alpha }_{1,\mathrm{e}}/2\right)& \frac{1}{2}·sin\left({\phi }_{\mathrm{e}}\right)·cos\left({\alpha }_{1,\mathrm{e}}/2\right)& \dots & 0\\ ⋮& ⋮& \ddots & ⋮\\ cos\left({\phi }_{\mathrm{e}}\right)·sin\left({\alpha }_{N-2,\mathrm{e}}/2\right)& 0& \cdots & \frac{1}{2}·sin\left({\phi }_{\mathrm{e}}\right)·cos\left({\alpha }_{N-2,\mathrm{e}}/2\right)\end{array}\right].$$

(22)

The plant can then be decoupled by multiplying the compensators’ output variables, $z_1,\cdots ,z_{N-1}$, by the inverse of the plant coupling matrix, $D_{N\mathrm{L}}=C_{N\mathrm{L}}^{-1}$ [29]. Then, the decoupled plant transfer function for the generalized decoupled control strategy is

$$\left[\begin{array}{c}\Delta So{C}_{\mathrm{B}1}\\ \Delta So{C}_{\mathrm{B}2}\\ ⋮\\ \Delta So{C}_{\mathrm{B}(\mathit{N}-1)}\end{array}\right]=\frac{1}{s}·a·C_{N\mathrm{L}}·D_{N\mathrm{L}}·\left[\begin{array}{c}{z}_1\\ z_2\\ ⋮\\ z_{N-1}\end{array}\right]$$

(23)

where the generalized expression of $D_{N\mathrm{L}}$ is

$$D_{N\mathrm{L}}=\left[\begin{array}{cccc}\frac{1}{cos\left({\phi }_{\mathrm{e}}\right)}& 0& \dots & 0\\ \frac{-2·tan({\alpha }_{1,\mathrm{e}}/2)}{sin({\phi }_{\mathrm{e}})}& \frac{2}{cos\left({\alpha }_{1,\mathrm{e}}/2\right)·sin\left({\phi }_{\mathrm{e}}\right)}& \dots & 0\\ ⋮& ⋮& \ddots & ⋮\\ \frac{-2·tan({\alpha }_{N-2,\mathrm{e}}/2)}{sin({\phi }_{\mathrm{e}})}& 0& \cdots & \frac{2}{cos\left({\alpha }_{N-2,\mathrm{e}}/2\right)·sin\left({\phi }_{\mathrm{e}}\right)}\end{array}\right]$$

(24)

Figure 10 illustrates the generalized decoupled closed-loop control scheme for the multiport 2L-NL NPC DAB converter. The output variables, $So{C}_{\mathrm{B}1}$ to $So{C}_{\mathrm{B}(\mathit{N}-1)}$, are controlled by adjusting the value of the modulation angles, $\phi$ to ${\alpha }_{N-2}$. The errors between the reference and measured values of the output variables are the inputs to $N-1$ PI compensators. The outputs of these compensators ($z_1$ to $z_{N-1}$) are then multiplied by the decoupling matrix $D_{N\mathrm{L}}$, and the resulting vector is added to the vector of the modulation angles at equilibrium, thereby obtaining the modulation angles ($\phi$ to ${\alpha }_{N-2}$), whose values are bounded to $[-\pi /2,\pi /2]$ for $\phi$ and $[0,\pi ]$ for ${\alpha }_1$ to ${\alpha }_{N-2}$. The components of $D_{N\mathrm{L}}$ are expressed as functions of the equilibrium angles, ${\phi }_{\mathrm{e}},{\alpha }_{1,\mathrm{e}},\dots ,{\alpha }_{N-2,\mathrm{e}}$. The equilibrium angles are obtained by applying a low-pass filter to the effective modulation angles. From Equation (24), some components of the matrix $D_{N\mathrm{L}}$ become undefined for ${\phi }_{\mathrm{e}}=0$, ${\phi }_{\mathrm{e}}=\pi /2$, and ${\alpha }_{n,\mathrm{e}}=\pi ,\forall n=\{1,\dots ,N-2\}$. To avoid these singularities, the equilibrium angles are bounded for the computation of $D_{N\mathrm{L}}$ such that $0>{\phi }_{\mathrm{e}}<\pi /2$ and ${\alpha }_{n,\mathrm{e}}<\pi ,\forall n=\{1,\dots ,N-2\}$.

5. Results

This section presents the results obtained to validate the proposed control strategy. Hardware-in-the-loop (HIL) tests were performed for the 2L-3L NPC DAB and 2L-4L NPC DAB converters. In addition, MATLAB/Simulink simulations were performed for the 2L-5L NPC DAB converter to validate its scalability. Finally, a simulation-based sensitivity analysis was performed using MATLAB/Simulink to evaluate the control robustness under disturbances in the battery current measurements and a capacity reduction in the LV battery modules.

5.1. Hardware-in-the-Loop Tests

Hardware-in-the-loop (HIL) tests were performed to validate the proposed control strategy. Figure 11 illustrates the experimental setup for the HIL tests. The electrical system was simulated in a HIL 404 real-time simulator by Typhoon HIL with a fixed time step of 250 ns. The HV and LV battery modules were modeled as ideal voltage sources. The control loop and the PWM modulator were executed in real time in the digital signal processor (DSP) and the field-programmable gate array (FPGA) of a dSPACE MicroLabBox platform, respectively. The DSP and the FPGA operated with a fixed time step of 250 ns and 10 ns, respectively. The HIL simulator included short-circuit detection. Therefore, a dead time of 300 ns was included in the PWM signals generated by the FPGA during switching transitions.

This section presents the results obtained for the multiport 2L-3L NPC DAB converter and for the multiport 2L-4L NPC DAB converter. The non-decoupled control strategy (Section 3) and the decoupled control strategy (Section 4) were evaluated for both converters. Two types of tests were performed to compare the performance of the non-decoupled and decoupled control strategies. First, the SoC reference values of the LV battery modules, $So{C}_1^{\ast },\dots ,So{C}_{N-1}^{\ast }$, were modified, with the converter operating at its nominal operating point, i.e., with the auxiliary loads sinking their maximum current $I_{\max }$ (Equation (5)). In the second test, the current sunk by the auxiliary loads was varied, thereby modifying the operating point of the converter.

5.1.1. Multiport 2L-3L NPC DAB Converter

The electrical parameters of the multiport 2L-3L NPC DAB converter, the current sunk by the auxiliary loads at the nominal operating point, and the parameters of the PI controllers used in both the non-decoupled and decoupled control strategies are summarized in

Table 1. Electrical parameters of the 2L-3L NPC DAB converter, the nominal current sunk by the auxiliary loads, and the parameters of the PI controllers for the HIL tests.

Parameter	Value	Description
$P_{\mathrm{nominal}}$	1 kW	Converter nominal power
f	10 kHz	Switching frequency
L	1.2 mH	Series inductance
$rt$	0.06	Transformer’s turns ratio
$V_{\mathrm{HV}}$	400 V	HV-battery-module voltage
$V_{\mathrm{LV}}$	12 V	LV-battery-module voltage
C	83 Ah, 1 kWh	Capacity of the LV battery modules
$I_{\mathrm{R}1}$, $I_{\mathrm{R}2}$	27.7 A	Nominal current sunk by the auxiliary loads, $R_1$ and $R_2$, at the nominal operating point
$K_{\mathrm{p}}$	40	Proportional gain of the PI controllers
$K_{\mathrm{i}}$	120	Integral gain of the PI controllers
$G_{\mathrm{s}}$	$K_{\mathrm{p}}+K_{\mathrm{i}}/s$	Transfer function of the PI controllers

.

Figure 12 shows the response of the system to variations in the SoC reference values of the LV battery modules, ${SoC}_{\mathrm{B}1}^{\ast }$ and ${SoC}_{\mathrm{B}2}^{\ast }$. The converter operates at its nominal operating point, i.e., the auxiliary loads sink 27.7 A.

Figure 12a shows the results of applying the generalized non-decoupled closed-loop control strategy. At time = 0.35 s, ${SoC}_{\mathrm{B}1}^{\ast }$ increases from 80% to 85% in 0.5 s. Then, the control correspondingly increases $\phi$ from 47° to 62° during the transient to ensure that the measured $So{C}_{\mathrm{B}1}$ tracks its reference value. Conversely, when ${SoC}_{\mathrm{B}1}^{\ast }$ is reduced back to 80%, $\phi$ decreases from 47° to 37°. However, the value of $So{C}_{\mathrm{B}2}$ is also affected by the variations in $\phi$ due to the coupling of $So{C}_{\mathrm{B}1}$ regulation to the regulation of the other modules SoCs, as described in Section 4. When $\phi$ increases/decreases, the total current injected by the converter into the LV DC-link nodes increases/decreases. Therefore, the current flowing through all the battery modules becomes positive/negative, increasing/decreasing their SoC. Then, when $\phi$ is modified by the closed-loop control strategy to correct an error in $So{C}_{\mathrm{B}1}$, $So{C}_{\mathrm{B}2}$ deviates from its reference value. The value of $\alpha$ is then adjusted by the $B_{\mathrm{LV}},2$ control loop to compensate for the error between $So{C}_{\mathrm{B}2}$ and ${SoC}_{\mathrm{B}2}^{\ast }$.

On the other hand, when ${SoC}_{\mathrm{B}2}^{\ast }$ increases/decreases (at $3.4\mathrm{s}/4.9\mathrm{s}$), the control loop correspondingly increases/decreases $\alpha$ to properly adjust $So{C}_{\mathrm{B}2}$, while the measured $So{C}_{\mathrm{B}1}$ remains stable at its reference value, as its value does not depend on $\alpha$.

Figure 12b shows the response of the system when the decoupled closed-loop control strategy is used. The coupling effect is mitigated due to the use of the decoupling matrix, with $So{C}_{\mathrm{B}2}$ remaining stable around its reference value when ${SoC}_{\mathrm{B}1}^{\ast }$ varies. Furthermore, the use of the decoupled control loop yields better $So{C}_{\mathrm{B}1}$ and $So{C}_{\mathrm{B}2}$ reference tracking. After a variation in ${SoC}_{\mathrm{B}1}^{\ast }$, the measured SoC exhibits a peak overshoot of 0.5%, similar to the peak observed in $So{C}_{\mathrm{B}1}$ when the non-decoupled control strategy was used (Figure 12a). After the reference transitions, the values of $So{C}_{\mathrm{B}1}$ and $So{C}_{\mathrm{B}2}$ stabilize around the new reference values in less than 0.3 s, demonstrating better dynamic performance than the non-decoupled control strategy.

Figure 13 shows the response of the system to a 36% (10 A) drop in the current sunk by the auxiliary loads from its nominal operating point, while ${SoC}_{\mathrm{B}1}^{\ast }$ and ${SoC}_{\mathrm{B}2}^{\ast }$ remain constant at 80%.

Figure 13a shows the results for the non-decoupled closed-loop control strategy. At time = 0.35 s, $I_{\mathrm{R}1}$ drops from 27.7 A to 17.7 A. In this situation, $I_2>I_{\mathrm{R}1}$ before the closed-loop control adjusts the modulation angles to the new operating point. Then, $B_{\mathrm{LV},1}$ temporarily absorbs the excess current injected by the converter into node $2_{\mathrm{LV}}$, consequently increasing $So{C}_{\mathrm{B}1}$. The closed-loop control then decreases the value of $\phi$ from 47° to 36° to correct the $So{C}_{\mathrm{B}1}$ error. Due to the plant coupling, the decrease in $\phi$ results in a reduction in $So{C}_{\mathrm{B}2}$, which is corrected by adjusting the value of $\alpha$. Conversely, when $I_{\mathrm{R}1}$ increases back to 27.7 A, the control loop increases $\phi$ to adjust the operating point of the converter, resulting in an undesired increase in $So{C}_{\mathrm{B}2}$, which is corrected by adjusting the value of $\alpha$.

On the other hand, when $I_{\mathrm{R}2}$ drops to 17.7 A, $I_3>I_{\mathrm{R}2}$ before the closed-loop control adjusts the modulation angles to the new operating point. Thus, $B_{\mathrm{LV},2}$ and $B_{\mathrm{LV},1}$ temporarily absorb the excess current injected by the converter into node $3_{\mathrm{LV}}$, increasing their SoCs. The closed-loop control then modifies $\phi$ and $\alpha$ to correct the difference between their reference values and measured SoCs, adjusting to the new converter operating point. Conversely, when $I_{\mathrm{R}2}$ increases back to 27.7 A, the values of $So{C}_{\mathrm{B}1}$ and $So{C}_{\mathrm{B}2}$ temporarily decrease before the modulation angles are adjusted to the new operating point.

Figure 13b shows the response of the system when the decoupled closed-loop control strategy is used. As with the SoC variation test, the coupling effect when stepping $I_{\mathrm{R}1}$ is mitigated. On the other hand, the response of the system to the variation in $I_{\mathrm{R}2}$ is similar to that observed with the non-decoupled control strategy. Across all transitions, the measured SoCs for all battery modules stabilize around their reference values in less than 0.5 s.

In summary, the results confirm that the proposed non-decoupled closed-loop control strategy effectively maintains the SoC of the LV battery modules at their reference values for the multiport 2L-3L NPC DAB converter, adjusting the modulation angles to correct any deviations due to changes in the operating point of the converter. Moreover, the proposed decoupling strategy enhances the performance of the control strategy, resulting in the mitigation of the coupling of $So{C}_{\mathrm{B}1}$ regulation to $So{C}_{\mathrm{B}2}$ regulation.

5.1.2. Multiport 2L-4L NPC DAB Converter Results

The electrical parameters of the multiport 2L-4L NPC DAB converter, the current sunk by the auxiliary loads at the nominal operating point, and the parameters of the PI controllers used in both the non-decoupled and decoupled control strategies are summarized in

Table 2. Electrical parameters of the 2L-4L NPC DAB converter, the nominal current sunk by the auxiliary loads, and the parameters of the PI controllers for the HIL tests.

Parameter	Value	Description
$P_{\mathrm{DAB}}$	1 kW	Converter nominal power
f	10 kHz	Switching frequency
L	1.1 mH	Series inductance
$rt$	0.09	Transformer’s turns ratio
$V_{\mathrm{HV}}$	400 V	HV-battery-module voltage
$V_{\mathrm{LV}}$	12 V	LV-battery-module voltage
C	83 Ah, 1 kWh	Capacity of the LV battery modules
$I_{\mathrm{R}1}$, $I_{\mathrm{R}2}$, $I_{\mathrm{R}3}$	13.8 A	Nominal current sunk by the auxiliary loads, $R_1$, $R_2$, and $R_3$, at the nominal operating point
$K_{\mathrm{p}}$	80	Proportional gain of the PI controllers
$K_{\mathrm{i}}$	240	Integral gain of the PI controllers
$G_{\mathrm{s}}$	$K_{\mathrm{p}}+{\displaystyle \frac{K_{\mathrm{i}}}{s}}$	Transfer function of the PI controllers

.

Figure 14 shows the responses of the system to variations in the SoC reference values of the LV battery modules, ${SoC}_{\mathrm{B}1}^{\ast }$ to ${SoC}_{\mathrm{B}3}^{\ast }$.

Figure 14a shows the results for the non-decoupled closed-loop control strategy. At time = 0.5 s, ${SoC}_{\mathrm{B}1}^{\ast }$ increases from 80% to 85% in 0.5 s. Then, the closed-loop control increases $\phi$ from 50° to 80° to ensure that the measured $So{C}_{\mathrm{B}1}$ tracks its reference value. When ${SoC}_{\mathrm{B}1}^{\ast }$ is reduced back to 80%, $\phi$ is decreased to 34°. As with the 2L-3L converter, the values of $So{C}_{\mathrm{B}2}$ and $So{C}_{\mathrm{B}3}$ are affected by the variations of $\phi$ due to the described control coupling. Then, the closed-loop control adjusts ${\alpha }_1$ and ${\alpha }_2$ to stabilize $So{C}_{\mathrm{B}2}$ and $So{C}_{\mathrm{B}3}$ at their reference values. When ${SoC}_{\mathrm{B}2}^{\ast }$ or ${SoC}_{\mathrm{B}3}^{\ast }$ increases/decreases, the closed-loop control increases/decreases their corresponding $\alpha$ angle (${\alpha }_1$ for $So{C}_{\mathrm{B}2}$, ${\alpha }_2$ for $So{C}_{\mathrm{B}3}$) to ensure that $So{C}_{\mathrm{B}2}$ and $So{C}_{\mathrm{B}3}$ track their references. As with the 2L-3L DAB converter, the SoCs of the other LV battery modules remain stable around their reference.

Figure 14b shows the response of the system when the decoupled closed-loop control strategy is used. As with the 2L-3L converter, the coupling of $So{C}_{\mathrm{B}1}$ regulation to the regulation of the other modules’ SoCs is mitigated due to the use of the decoupling matrix, with $So{C}_{\mathrm{B}2}$ and $So{C}_{\mathrm{B}3}$ remaining stable around their reference values, and the use of the decoupled control loop yields better $So{C}_{\mathrm{B}1}$, $So{C}_{\mathrm{B}2}$ and $So{C}_{\mathrm{B}3}$ reference tracking. As with the 2L-3L configuration, after varying ${SoC}_{\mathrm{B}1}^{\ast }$, $So{C}_{\mathrm{B}1}$ presents a peak overshoot of 0.5%, similar to the peak observed in $So{C}_{\mathrm{B}1}$ when the non-decoupled control strategy was used (Figure 14a). After the reference transitions, the values of $So{C}_{\mathrm{B}1}$ to $So{C}_{\mathrm{B}3}$ stabilize around the new references in less than 0.3 s, demonstrating better dynamic performance than the non-decoupled control strategy.

Figure 15 shows the response of the system to a 36% (5 A) drop in the current sunk by the auxiliary loads from its nominal operating point, while ${SoC}_{\mathrm{B}1}^{\ast }$, ${SoC}_{\mathrm{B}2}^{\ast }$, and ${SoC}_{\mathrm{B}3}^{\ast }$ remain constant at 80%.

In Figure 15a, the generalized non-decoupled closed-loop control is tested. At time = 0.5 s, $I_{\mathrm{R}1}$ steps down from 13.8 A to 8.8 A. Similarly to the 2L-3L case, $B_{\mathrm{LV},1}$ temporarily absorbs the excess current injected by the converter into node $2_{\mathrm{LV}}$, causing $So{C}_{\mathrm{B}1}$ to rise. Then, the closed-loop control strategy decreases the value of $\phi$ from 50° to 40° to correct the $So{C}_{\mathrm{B}1}$ error and adjust the operating point of the converter. Conversely, when $I_{\mathrm{R}1}$ increases back to 13.8 A, the control loop increases $\phi$. Increasing/reducing $\phi$ results in increases/reductions in $So{C}_{\mathrm{B}2}$ and $So{C}_{\mathrm{B}3}$ due to coupling. This effect is compensated for by the closed-loop control strategy through the adjustment of ${\alpha }_1$ and ${\alpha }_2$.

When $I_{\mathrm{R}2}$ drops to 8.8 A, $B_{\mathrm{LV},2}$ and $B_{\mathrm{LV},1}$ absorb the excess current injected by the converter into node $3_{\mathrm{LV}}$, thereby raising their SoC values. Then, the closed-loop control strategy reduces the values of $\phi$ and ${\alpha }_1$. However, the coupling effect leads to a reduction in $So{C}_{\mathrm{B}3}$; thus, the closed-loop control strategy adjusts ${\alpha }_2$ to correct the $So{C}_{\mathrm{B}3}$ deviation.

Finally, variations in $I_{\mathrm{R}3}$ cause a positive/negative current to flow through all LV battery modules, thereby increasing/decreasing their SoCs. Then, the control loop strategy modifies $\phi$, ${\alpha }_1$, and ${\alpha }_2$ to correct the error between the measured and reference SoCs and adjust to the new operating point.

Figure 15b shows the response of the system when the decoupled closed-loop control strategy is used. Notably, the coupling effect when $I_{\mathrm{R}1}$ or $I_{\mathrm{R}2}$ decreases/increases is mitigated due to the use of the decoupling matrix. Indeed, when $I_{\mathrm{R}1}$ varies, the values of $So{C}_{\mathrm{B}2}$ and $So{C}_{\mathrm{B}3}$ remain stable around their reference values, and variations in $I_{\mathrm{R}2}$ produce a negligible disturbance on the value of $So{C}_{\mathrm{B}3}$. Furthermore, when $I_{\mathrm{R}3}$ increases/decreases, the modules’ SoCs decrease/increase at a similar pace, as expected in a fully decoupled control scenario. Across all transitions, the measured SoCs for all battery modules stabilize around their reference values in less than 0.5 s.

Again, the results confirm that the proposed control strategy effectively maintains the SoCs of the LV battery modules at their reference values for the multiport 2L-4L NPC DAB converter, with the decoupling strategy successfully mitigating the coupling effect and improving the regulation of the SoC during the $So{C}^{\ast }$ and load transients.

5.2. Simulation Results for the 2L-5L NPC DAB Converter

To assess the scalability of the proposed control strategy, a simulation was performed using MATLAB/Simulink for the 2L–5L NPC DAB converter using the decoupled closed-loop control strategy. Computer-based simulations were chosen instead of HIL tests due to the inability to implement the 2L-5L topology in the available HIL equipment (see Section 5.1). The electrical parameters of the converter, the current sunk by the auxiliary loads at the nominal operating point, and the parameters of the PI controllers are summarized in

Table 3. Electrical parameters of the 2L-5L NPC DAB converter, the nominal current sunk by the auxiliary loads, and the parameters of the PI controllers for the MATLAB/Simulink simulation.

Parameter	Value	Description
$P_{\mathrm{DAB}}$	1 kW	Converter nominal power
f	10 kHz	Switching frequency
L	0.9 mH	Series inductance
$rt$	0.12	Transformer’s turns ratio
$V_{\mathrm{HV}}$	400 V	HV-battery-module voltage
$V_{\mathrm{LV}}$	12 V	LV-battery-module voltage
C	83 Ah, 1 kWh	Capacity of the LV battery modules
$I_{\mathrm{R}1}$, $I_{\mathrm{R}2}$, $I_{\mathrm{R}3}$, $I_{\mathrm{R}4}$	8.3 A	Nominal current sunk by the auxiliary loads, $R_1$, $R_2$ $R_3$, and $R_4$ at the nominal operating point
$K_{\mathrm{p}}$	80	Proportional gain of the PI controllers
$K_{\mathrm{i}}$	240	Integral gain of the PI controllers
$G_{\mathrm{s}}$	$K_{\mathrm{p}}+\frac{K_{\mathrm{i}}}{s}$	Transfer function of the PI controllers

.

Figure 16 shows the response of the system to a 5% variation over 0.7 s in the SoC reference values of the LV battery modules, ${SoC}_{\mathrm{B}1}^{\ast }$ to ${SoC}_{\mathrm{B}4}^{\ast }$. The converter operates at its nominal operating point. As with the 2L-3L DAB converter, the SoCs of all LV battery modules remain stable around their reference values both in steady-state operation and under variations in the reference SoCs. When the reference SoCs increase or decrease, the measured SoCs for all battery modules stabilize around their respective reference values within 0.5 s, showing a fast dynamic response to variations. Moreover, the coupling of $So{C}_{\mathrm{B}1}$ regulation to the regulation of the other modules’ SoCs is clearly mitigated, with $So{C}_{\mathrm{B}2}$, $So{C}_{\mathrm{B}3}$, and $So{C}_{\mathrm{B}4}$ remaining stable around their reference values when ${SoC}_{\mathrm{B}1}^{\ast }$ increases/decreases.

5.3. Simulation-Based Sensitivity Analysis of the Decoupled Control Strategy

To further validate the robustness of the proposed decoupled control strategy, a software-based sensitivity analysis was performed using MATLAB/Simulink models.

This study focused on the multiport 2L–3L NPC DAB converter model and evaluated the impact of three non-idealities on the system’s response: an HF disturbance injected into the measurement of $i_{\mathrm{B}1}$, a low-frequency (LF) disturbance injected into the measurement of $i_{\mathrm{B}1}$, and a 10% reduction in the capacity of the battery modules from 83 Ah to 74.7 Ah, emulating degradation due to aging.

The electrical parameters of the 2L-3L NPC DAB converter, the nominal current sunk by the auxiliary loads, and the parameters of the PI controllers used in the simulations were the same as those employed for the HIL tests and are shown in Table 1.

5.3.1. High-Frequency Disturbance Injected into the Measurement of $i_{\mathrm{B}1}$

Figure 17 shows the response of the system to variations in the SoC reference values of the LV battery modules, ${SoC}_{\mathrm{B}1}^{\ast }$ (Figure 17a) and ${SoC}_{\mathrm{B}2}^{\ast }$ (Figure 17b), under an HF disturbance injected into the measurement of $i_{\mathrm{B}1}$. A disturbance consisting of a sinusoidal waveform with 1 A amplitude and 10 kHz frequency was considered.

As observed in the results, the modulation angles remain unaffected by the injection of the HF disturbance into $i_{\mathrm{B}1}$. The variations in the battery modules’ SoCs are estimated by integrating $i_{\mathrm{B}1}$ and $i_{\mathrm{B}2}$. Then, due to their alternating nature, HF signals tend to cancel out over short time intervals when integrated, and the integration process acts as a low-pass filter. Therefore, the control outputs $\alpha$ and $\phi$ remain unaffected, and the control loop is robust against HF disturbances injected into the battery current measurements.

5.3.2. Low-Frequency Disturbance Injected into the Measurement of $i_{\mathrm{B}1}$

Figure 18 shows the response of the system to variations in the SoC reference values of the LV battery modules, ${SoC}_{\mathrm{B}1}^{\ast }$ (Figure 18a) and ${SoC}_{\mathrm{B}2}^{\ast }$ (Figure 18b), under an LF disturbance injected into the measurement of $i_{\mathrm{B}1}$. A disturbance consisting of a sinusoidal waveform with 1 A amplitude and 50 Hz frequency was injected.

The variation in the battery modules’ SoCs is proportional to the integral of the measured current through the battery module (Equation (9)), with the integration process acting as a low-pass filter. Consequently, LF disturbances directly affect the estimation of $So{C}_{\mathrm{B}1}$ and $So{C}_{\mathrm{B}2}$, and impact the control outputs $\alpha$ and $\phi$. As observed in the results, angle $\alpha$ exhibits a steady-state oscillation with a peak amplitude of 3.4° (Figure 18b, time = 2.5 s), and angle $\phi$ oscillates in steady-state operation with a maximum amplitude of 1.8° (Figure 18b, time = 2.5 s). Despite these oscillations, the control loop is able to maintain the stability of $So{C}_{\mathrm{B}1}$ and $So{C}_{\mathrm{B}2}$ around their reference values, effectively adjusting the average value of the modulation angles to track the reference SoC values.

The simulation results confirm that a severe LF disturbance injected into the battery modules’ current measurements affects the control output, generating LF oscillations in $\phi$ and $\alpha$. Nevertheless, the decoupled control strategy successfully maintains the stability of $So{C}_{\mathrm{B}1}$ and $So{C}_{\mathrm{B}2}$ around their reference values during steady-state operation and under variations in ${SoC}_{\mathrm{B}1}^{\ast }$ and ${SoC}_{\mathrm{B}2}^{\ast }$.

5.3.3. Reduction in the Capacity of the Battery Modules

Figure 19 shows the response of the system to variations in the SoC reference values of the LV battery modules, ${SoC}_{\mathrm{B}1}^{\ast }$ (Figure 19a) and ${SoC}_{\mathrm{B}2}^{\ast }$ (Figure 19b), under a 10% reduction in the capacity of the battery modules from 83 Ah to 74.7 Ah.

The results show that the control system performance is not affected by the capacity reduction in the battery modules. Both $So{C}_1$ and $So{C}_2$ remain stable around their reference values in steady-state operation and track their reference values when these are increased/decreased. The modulation angles $\alpha$ and $\phi$ remain stable and do not present oscillations in steady-state operation. Moreover, the coupling of $So{C}_{\mathrm{B}1}$ regulation to the regulation of the other modules’ SoCs remains mitigated. Therefore, the results show that the decoupled control loop strategy is robust to moderate variations in the capacity of the battery modules caused by degradation.

6. Discussion

This paper proposes a single-stage multiport APM capable of supplying multiple groups of auxiliary loads, each operating at a different voltage level. To achieve this, $N-1$ LV battery modules are connected in series and powered through a 2L-NL NPC DAB converter. As a result, $N-1$ DC ports are obtained from the nodes of the DC link formed by the series-connected battery modules, allowing the feeding of $N-1$ groups of loads, each connected to its optimal operating voltage.

A generalized modulation strategy for the 2L-NL NPC DAB converter using $N-1$ DoF ($\phi ,{\alpha }_1,\dots ,{\alpha }_{N-2}$) is employed to compensate for the unbalanced LV battery modules’ currents caused by the load connections to the $N-1$ DC ports, thereby keeping the modules’ SoCs balanced. The proposed modulation strategy minimizes the inductor RMS current and therefore the conduction losses in the converter.

A generalized closed-loop control strategy regulating the SoC of the LV battery modules is proposed and validated through HIL tests, under variations in the modules’ reference SoCs and variations in the power sunk by the loads. A coupling of the bottom-module SoC control to the rest of the modules’ SoCs is identified, and a decoupled closed-loop control strategy, based on the use of a decoupling matrix, is proposed to mitigate the coupling between the output variables of the closed-loop control. Its performance is validated through HIL tests and MATLAB/Simulink simulations, showing greater SoC regulation performance than the non-decoupled control strategy, as well as a simulation-based sensitivity analysis.

The proposed connection aligns with ongoing research in the field aimed at obtaining a multiple-voltage architecture in the AS of the EVs [11,12,13,14,15,16,17,18,19,20,21,22].

Table 4. Comparison between the multiport 2L-3L NPC DAB converter, the TAB, and the three-port resonant DC-DC converter.

Topology	2L-3L NPC DAB	TAB [11]	Multiport resonant DC-DC converter [13]
HV DC ports	1	1	1
HV switches	4	4	4
Distinct HV switches’ voltage ratings	1	1	1
LV DC ports	2	2	2
LV switches	8 (NPC legs) 12 (ANPC legs)	8	8
Distinct LV switches’ voltage ratings	1	2	1
Transformers	1 (2 windings)	1 (3 windings)	2 (2 windings)
Inductors	1	3	3
Resonant-tank capacitors	0	0	1
Modularity	High	Intermediate	Low

presents a comparison, in terms of required components and converter modularity, between the proposed 2L-NL NPC DAB converter in its 2L-3L implementation and two alternative three-port converters for the APM application: the TAB presented in [11] and the three-port resonant DC-DC converter presented in [13]. All three topologies can be employed in the APM and feature an HF link interfacing their HV and LV sides. The TAB provides full isolation between all DC ports, whereas the 2L-3L NPC DAB converter and the resonant DC-DC converter offer isolation only between the converter’s HV and LV sides, which is sufficient for the APM use case.

On the LV side, all three topologies present two DC ports. For the TAB and the resonant DC-DC converter topologies, a total of eight LV switches is required, the same as in the 2L-3L NPC DAB converter when using NPC legs, and four fewer than in the 2L-3L NPC DAB converter when using ANPC legs. The TAB uses switches with different voltage ratings in each LV bridge, and in the resonant DC-DC converter, all LV switches share the same voltage rating, which is determined by the higher-voltage DC port. Conversely, in the 2L-3L NPC DAB converter, all the LV switches feature the same voltage rating, defined by the lower-voltage DC port. For the same DC-port voltage, this allows the use of lower-voltage-rated devices with better performance, enhancing the overall conversion efficiency. Moreover, the TAB and the resonant DC-DC converter require more passive elements than the proposed 2L-3L NPC DAB converter, which negatively impacts converter power density and efficiency. Finally, the modular nature of the 2L-3L NPC DAB converter allows scaling the number of DC ports while using the same voltage-rated switches and without requiring new passive elements in the converter. This is a key advantage over other multiport topologies. The resonant converter in [13] cannot be directly scaled to obtain more DC ports without structural modifications. The TAB can be generalized to obtain the multi-active-bridge converter (MAB) [30]; however, adding a DC port requires four additional switches (rated at the DC-port voltage) and an additional transformer winding and inductor, impacting efficiency and power density. Moreover, as the number of ports increases in the MAB, its control becomes more complex due to the coupling between the power transfer between the DC ports.

Further work could explore an optimization of the converter’s electrical parameters, such as the series inductance or the switching frequency, to obtain a converter design with minimum conduction and switching losses and high power density. Moreover, performance optimization could be explored by introducing additional DoFs to the proposed modulation, such as new modulation angles controlled by an advanced control strategy capable of optimizing their values for different operating points of the converter.