Asynchronous and Decoupled HIL Simulation of a DC Nanogrid

Abstract

In this paper, an asynchronous and decoupled Hardware-In-the-Loop simulation of a DC nanogrid is presented. The DC nanogrid is a recent way to solve problems presented in traditional power generation, such as low efficiency, pollution, and cost increase. The complexity of this kind of system is high due to the interconnection of all the composing elements, making the use of HIL simulation attractive due to its advantages regarding computational power and low solution time. However, when a nanogrid is simulated in commercial and personalized platforms, all the elements presented are solved at the same integration time, even if some elements could be solved at smaller integration times, causing a slowdown of the system solution. The results of the asynchronous HIL simulation are compared with a synchronous HIL simulation with an integration time of 425 ns, and also with an offline simulation performed in PSIM software. The proposal achieves an integration time of 200 ns for the fastest element and 425 ns for the slowest, with an error of less than 0.2 A for current signals and less than 2 V for voltage signals. These results prove that the asynchronous and decoupled solution of an HIL simulation for nanogrid is possible, allowing each element to be solved as fast as possible without affecting the accuracy of the result, as well as simplifying programming.

1. Introduction

In recent years, the concept of distributed generation (DG) has been gaining attention due to its capability to mitigate the limitations of traditional power systems, mostly based on large-scale fossil-fueled generators. By using DG, power is generated close to the consumer, which reduces the size of transmission lines and consequently increases the efficiency and reliability of the system [1].

To use DG, the concept of nanogrid (NG) is gaining more and more attention worldwide. An NG is a power distribution system for a single house or small building, with the ability to connect or disconnect from other power entities via a gateway [2]. NG is mainly classified as AC or DC ones, according to the kind of power used by the bus that interconnects all its components. Both topologies have their benefits and drawbacks, and the selection depends on the NG application and its ultimate purpose. For instance, in a case where the system’s efficiency is of utmost importance, a DC topology is more suitable, as one power conversion stage is omitted [3]. Currently, AC topology is most commonly adopted, a decision mainly driven by financial reasons. As most electrical appliances in the market are supplied from AC power, retrofitting an existing building with DC loads would increase the cost of the NG infrastructure.

The typical structure of a DC NG distribution system is depicted in Figure 1. It consists of renewable energy sources (RES), energy storage systems, loads, and a gateway to interface with other power entities, such as adjacent NG or Microgrids (MG) and the power grid.

Figure 1. Typical structure of DC nanogrid.

To develop an NG, the simulation plays an important role, as it permits safely testing the NG and studying particular scenarios that are difficult to recreate in a real NG. The Hardware In the Loop (HIL) is a technique where actual signals from a controller are fed into a test system that simulates the behavior of a real system. The test system typically runs a mathematical model of the system to be controlled on a real-time digital device, such as an FPGA, a microprocessor, or a DSP.

To simulate complex models as an NG, commercial HIL equipment is often used. Its main disadvantages are its high cost and the integration time (t_i) that can be obtained in the range of 0.5 to 2 µs [4]. This t_i limits the switching frequency of power converters to around 20 kHz. When the simulation of an NG is executed in commercial hardware, all the element models are solved at the same t_i. In recent years, some researchers have started implementing complex models for HIL simulation using FPGA due to their inherent parallelism and low latency.

In [5,6,7,8,9,10], commercial hardware simulates DC or AC MG. In these references, the main goal is to prove novel controllers for the power exchange between the main grid and MG.

Many efforts have been made to simulate MG using FPGAs. In [4], a method that allows simulating an AC MG using a low-cost FPGA is presented, which proposes a strategy that simulates the models of the converters in Real-Time in less than a microsecond, using a decoupling method between the elements. However, all models must be solved using the same t_i, even when some elements could be solved more quickly.

Another method to simulate complex systems using decoupled methods can be seen in [11], based on using Zhen’s method [12]. This method consists of converting elements into current and voltage sources, for example, inductors as current sources and capacitors as voltage sources. A more electric plane is used as a case study. However, it is not mentioned whether the t_i used in the simulation and the whole system is solved using the same t_i.

Another strategy to simulate MGs in FPGA is observed in [13,14], where using an FPGA is proposed to simulate systems with several elements, such as MG. The models of each of the MG elements are implemented in different FPGAs, generating larger systems. However, a synchronization signal should be used between the different FPGAs, and all systems are solved at the same t_i.

In this paper, an asynchronous and decoupled method to simulate NG is presented. This method allows simulating and evaluating each component of an NG independently, using the minimum t_i for each component, resulting in an accurate simulation for each NG element and the whole NG. The RES systems are decoupled with each other and simulated in parallel so that new RES integrations can be easily achieved; the main novelty of this proposal is the possibility of using different integration times in different parts of the system. In addition, it makes possible the simulation of power converters at different commutation frequencies, which are no longer limited due to the t_i of the slowest simulated element. The type of simulation presented in this work achieves results more similar to what happens while implementing a physical NG. Also, the implementation of this simulation is easier than others because a synchronization signal is not required.

This paper is organized as follows; in Section 2, the main idea to perform the HIL simulation of an NG is depicted. Section 3 shows the modeling of all the elements that constitute the NG and its implementation in the FPGA. Section 4 shows the results obtained from the asynchronous HIL simulation compared to an offline simulation and a synchronous HIL simulation, and finally, Section 5 presents our conclusions.

2. Proposed HIL Simulation for NG

Traditionally, the nodal analysis method (NAM) is used as the solution method in commercial HIL simulation hardware. As it is well known, this forces using a single t_i to solve the whole system. As a result, the actual execution time and the FPGA resource consumption will increase quickly as the complexity of the system increases. Unlike the centralized NAM used in commercial hardware, the main objective of this proposal is to decouple an NG in several submodules. In this way, each module can be solved as fast as possible and with different solution methods, if required, such as state-space (SS) or NAM.

Therefore, a hybrid solution is obtained to perform the real-time simulation of an NG, as shown in Figure 2. The power converters in DG systems (including the energy storage systems) are modeled using state spaces and solved with the Euler method, from now on referred to as the SS networks in this paper. The distribution lines are modeled with NAM, and are called the NAM network. Both the SS and the NAM networks are solved asynchronously (Figure 3), allowing each element of the NG to be solved at a minimum t_i. It is important to notice that other solution methods can be used to solve the different systems.

Figure 2. DC NG proposed topology, the power electronic converters are solved using SS, and the NG is solved using NAM.

Figure 3. Asynchronous solution of DC NG.

3. Methodology

3.1. DC Nanogrid Topology

Figure 2 shows the DC NG topology proposed in this paper, derived from that presented in [15]. It consists of: a boost converter (BC) connected to a RES that supplies DC power, its voltage is represented as V_in; a synchronous boost converter (SBC) connected to a battery with a voltage V_bat; a bidirectional power inverter (BI) that works as a gateway between the grid and the DC bus, and two loads represented as current sources i_L1 and i_L2. The impedances between components are included as well.

3.2. DC Nanogrid Model

To model the DC NG, dependent power supplies replace the DC-DC converters and the bidirectional inverter, which is replaced by a DC voltage power supply with v_DC value (Figure 4) since its main function is to regulate the DC bus voltage. The DC-DC converters and their impedance associated with the connection to the NG are replaced by two dependent DC power supplies, i_O1, and i_O2 (Figure 5 and Figure 6). Finally, two independent DC power supplies replace the loads. It is important to notice that the values of the dependent power supplies are continuously solved using their models.

Figure 4. Equivalent DC voltage power supply for BI.

Figure 5. Equivalent DC power supply for BC.

Figure 6. Equivalent DC power supply for SBC.

From Figure 2, i_O1 and i_O2 can be obtained by using:

$$i_{Ox}=\frac{v_{Ox}-v_x}{Z_{Cx}}$$

(1)

where i_Ox is the converter output current, v_Ox is the converter output voltage, v_x is the node voltage where the converter is connected to the NG, and Z_Cx is the impedance between the NG and the DC/DC converter.

Using the replacements from Figure 4, Figure 5 and Figure 6, an equivalent circuit of the DC NG is obtained (Figure 7). The mathematical model is obtained using classic circuit analysis techniques.

Figure 7. DC NG equivalent circuit.

Taking the circuit in Figure 7 and applying Kirchhoff’s current law, it is possible to find the voltage in each node of the NG. The matrix representation of the system, considering that all the impedances between the NG nodes (Z_Lx) are equal, can be written as:

$$\left[\begin{array}{cccc}1/{\mathrm{Z}}_{\mathrm{L}}& -1/{\mathrm{Z}}_{\mathrm{L}}& 0& 0\\ -1/{\mathrm{Z}}_{\mathrm{L}}& 2/{\mathrm{Z}}_{\mathrm{L}}& -1/{\mathrm{Z}}_{\mathrm{L}}& 0\\ 0& -1/{\mathrm{Z}}_{\mathrm{L}}& 2/{\mathrm{Z}}_{\mathrm{L}}& -1/{\mathrm{Z}}_{\mathrm{L}}\\ 0& 0& -1/{\mathrm{Z}}_{\mathrm{L}}& 1/{\mathrm{Z}}_{\mathrm{L}}\end{array}\right]\left[\begin{array}{c}{v}_1\\ v_2\\ v_3\\ v_4\end{array}\right]=\left[\begin{array}{c}{i}_{O1}+i_{DC}\\ i_{L1}\\ i_{O2}\\ i_{L2}\end{array}\right]$$

(2)

It can be observed from Figure 7 that:

$$i_{DC}=\frac{v_{DC}-v_1}{Z_{L1}}$$

(3)

Equation (2) is of the form:

$$\mathbf{Y}\mathbf{x}=\mathbf{j}$$

(4)

where:

$$\mathbf{Y}=\left[\begin{array}{cccc}1/{\mathrm{Z}}_{\mathrm{L}}& -1/{\mathrm{Z}}_{\mathrm{L}}& 0& 0\\ -1/{\mathrm{Z}}_{\mathrm{L}}& 2/{\mathrm{Z}}_{\mathrm{L}}& -1/{\mathrm{Z}}_{\mathrm{L}}& 0\\ 0& -1/{\mathrm{Z}}_{\mathrm{L}}& 2/{\mathrm{Z}}_{\mathrm{L}}& -1/{\mathrm{Z}}_{\mathrm{L}}\\ 0& 0& -1/{\mathrm{Z}}_{\mathrm{L}}& 1/{\mathrm{Z}}_{\mathrm{L}}\end{array}\right]$$

$$\mathbf{x}=\left[\begin{array}{c}{v}_1\\ v_2\\ v_3\\ v_4\end{array}\right]$$

$$\mathbf{j}=\left[\begin{array}{c}{i}_{O1}+i_{DC}\\ i_{L1}\\ i_{O2}\\ i_{L2}\end{array}\right]$$

The solution of (4) is given by:

$$\mathbf{x}={\mathbf{Y}}^{-1}\mathbf{j}$$

(5)

It is important to note that matrix Y is time-invariant, and values for the j vector are easily obtained from (1).

3.3. Power Converter Models

Figure 8 shows the boost converter. This converter presents three states according to switch (S) and the current through the inductor (i_L). The first state occurs when S is on, causing an i_L increase, and the diode D is open (Figure 9). The second state is when S is off, causing D to close and i_L to start to decrease (Figure 10). The third state occurs when S is off and the inductor (L) is fully discharged, so in this state i_L = 0 (Figure 11).

Figure 8. Schematic circuit of Boost Converter.

Figure 9. Schematic circuit of Boost Converter for the first state (S = 1).

Figure 10. Schematic circuit of Boost Converter for the second state (S = 0).

Figure 11. Schematic circuit of Boost Converter for the third state (S = 0 and i_L = 0).

Using circuits from Figure 9, Figure 10 and Figure 11 and using Kirchoff’s Laws, the differential equations that model the converter can be obtained and then solved by the Euler method.

The differential equations for the first state are given by:

$$\begin{gathered} \frac{d{i}_L}{dt}=\frac{V_{in}}{L} \\ \frac{d{v}_{O1}}{dt}=\left(\frac{v_{O1}-v_1}{C{Z}_{C1}}\right) \end{gathered}$$

(6)

where V_in is the input voltage of the BC, v_O1 is the output voltage of the BC, C is the output capacitor, Z_C1 is the impedance between the converter and the NG, and v₁ is the node where the converter is connected to the NG.

Solving (6) using the Euler method, the difference equations are given by:

$$\begin{gathered} i_L\left(k+1\right)=i_L\left(k\right)+\frac{h}{L}{V}_{in}\left(k\right) \\ {v}_{O1}\left(k+1\right)=v_{O1}\left(k\right)+\frac{h}{C}\left(\frac{v_{O1}\left(k\right)-v_1\left(k\right)}{Z_{C1}}\right) \end{gathered}$$

(7)

For the second state, the differential equations are given by:

$$\begin{gathered} \frac{d{i}_L}{dt}=\frac{V_{in}-v_{O1}}{L} \\ \frac{d{v}_{O1}}{dt}=\frac{i_L}{C}-\left(\frac{v_{O1}-v_1}{{CZ}_{C1}}\right) \end{gathered}$$

(8)

Solving (8) using the Euler method, the difference equations are given by:

$$\begin{gathered} i_L\left(k+1\right)=i_L\left(k\right)+\frac{h}{L}\left(V_{in}\left(k\right)-v_{O1}\right) \\ {v}_{O1}\left(k+1\right)=v_{O1}\left(k\right)+\frac{h}{C}\left(i_L\left(k\right)-\left(\frac{v_{O1}\left(k\right)-v_1\left(k\right)}{Z_{C1}}\right)\right) \end{gathered}$$

(9)

For the third state, the differential equations are given by:

$$\begin{gathered} \frac{d{i}_L}{dt}=0 \\ \frac{d{v}_{O1}}{dt}=\left(\frac{v_{O1}-v_1}{{CZ}_{C1}}\right) \end{gathered}$$

(10)

Solving (10) using the Euler method, the difference equations are given by:

$$\begin{gathered} i_L\left(k+1\right)=0 \\ {v}_{O1}\left(k+1\right)=v_{O1}\left(k\right)+\frac{h}{C}\left(\frac{v_{O1}\left(k\right)-v_1\left(k\right)}{Z_{C1}}\right) \end{gathered}$$

(11)

Figure 12 shows the synchronous boost converter. As it can be noticed, both semiconductors are controlled switches, that being the main difference compared to the asynchronous boost converter seen before. The advantage of doing so is that it permits the power flow to be bidirectional, while the asynchronous boost only permits power flow to the right. This bidirectional power transfer is commonly used to charge and discharge batteries.

Figure 12. Schematic circuit of Synchronous Boost Converter.

This converter presents two states according to switches S₁ and S₂. The equivalent circuits for the converter states are shown in Figure 13 and Figure 14.

Figure 13. Schematic circuit of Synchronous Boost Converter for the first state (S₁ = 1 and S₂ = 0).

Figure 14. Schematic circuit of Synchronous Boost Converter for the second state (S₁ = 0 and S₂ = 1).

The differential equations associated with the circuit in Figure 13 are:

$$\begin{gathered} \frac{d{i}_L}{dt}=\frac{V_{bat}}{L} \\ \frac{d{v}_{O2}}{dt}=\left(\frac{v_{O2}-v_3}{C{Z}_{C2}}\right) \end{gathered}$$

(12)

where V_bat is the battery voltage, v_O2 is the output voltage of the SBC, Z_C2 is the impedance between the converter and the NG, and v₃ is the connection node between the NG and the converter.

Solving (12) using the Euler method, the difference equations are given by:

$$\begin{gathered} i_L\left(k+1\right)=i_L\left(k\right)+\frac{h}{L}{V}_{bat}\left(k\right) \\ {v}_{O2}\left(k+1\right)=v_{O2}\left(k\right)+\frac{h}{C}\left(\frac{v_{O2}\left(k\right)-v_3\left(k\right)}{Z_{C2}}\right) \end{gathered}$$

(13)

The differential equations associated with the circuit in Figure 14 are:

$$\begin{gathered} \frac{d{i}_L}{dt}=\frac{V_{bat}-v_{O2}}{L} \\ \frac{d{v}_{O2}}{dt}=\frac{i_L}{C}-\left(\frac{v_{O2}-v_3}{{CZ}_{C2}}\right) \end{gathered}$$

(14)

Solving (14) using the Euler method, the difference equations are given by:

$$\begin{gathered} i_L\left(k+1\right)=i_L\left(k\right)+\frac{h}{L}\left(V_{bat}\left(k\right)-v_{O3}\right) \\ {v}_{O2}\left(k+1\right)=v_{O2}\left(k\right)+\frac{h}{C}\left(i_L\left(k\right)-\left(\frac{v_{O2}\left(k\right)-v_3\left(k\right)}{Z_{C2}}\right)\right) \end{gathered}$$

(15)

Figure 15 shows the bidirectional inverter used as a gateway between the NG and the AC mains.

Figure 15. Schematic circuit of the Bidirectional Inverter.

The detailed model of the bidirectional inverter can be found in [16]. The difference equations associated with this converter are:

$$\begin{gathered} i_a\left(k+1\right)=i_a\left(k\right)+\frac{h}{L_a}\left(v_{an}\left(k\right)-v_A\left(k\right)-i_a\left(k\right)R_a\right) \\ {i}_b\left(k+1\right)=i_b\left(k\right)+\frac{h}{L_b}\left(v_{bn}\left(k\right)-v_B\left(k\right)-i_b\left(k\right)R_b\right) \\ {i}_c\left(k+1\right)=i_c\left(k\right)+\frac{h}{L_c}\left(v_{cn}\left(k\right)-v_C\left(k\right)-i_c\left(k\right)R_c\right) \\ {v}_{DC}\left(k+1\right)=v_{DC}\left(k\right)+\frac{h}{C_{DC}}\left(i_{in}\left(k\right)-i_{DC}\left(k\right)\right) \end{gathered}$$

(16)

where v_xn is the phase ‘x’ inverter voltage, v_X is the phase ‘X’ grid voltage, i_x is the phase ‘x’ inverter current, L_x is the inductance of the topology, R_x is the series inductor resistance, v_DC is the capacitor voltage, C_DC is the DC-side capacitor, i_DC is the current demanded by the inverter, and i_in is the MG current.

The obtained difference equations are easily implemented in high-level programming languages such as LabVIEW.

3.4. FPGA Implementation

The methodology presented in [17] is used for the FPGA implementation. Figure 16 shows the implementation of the NG model. The j vector and the solution to the Y∙j operation can be observed, carried out with a predefined LabVIEW function. It is also important to notice that the matrix Y is generated offline and is time-invariant. The voltage values from the NG are obtained using the current values that each model converter provides. The DC NG model presented in Figure 16 has a different t_i than the models of the converters, creating a complete asynchronous solution.

Figure 16. LabVIEW FPGA NG implementation.

Figure 17 shows the implementation of the boost converter, the PI regulator used to control its output current (i_O1), and the generation of the PWM signal.

Figure 17. LabVIEW FPGA implementation of the boost converter, PI control, and PWM signal.

Figure 18 shows the implementation of the synchronous boost converter, the PI regulator used to control its output current (i_O2), and the generation of the PWM signal.

Figure 18. LabVIEW FPGA implementation of the synchronous boost converter, PI control, and PWM signal.

Figure 19 shows the implementation of the BI model, the generation of the three-phase power supply signals, and the control used for this converter based on [16].

Figure 19. LabVIEW FPGA implementation (a) the bidirectional inverter, (b) the three-phase power signals, and (c) control.

Figure 16, Figure 17, Figure 18 and Figure 19 clearly show the decoupling of each element that makes up the NG. This feature is important since the NG can be developed modularly, which is desirable in large applications. The output currents of the converters are sent to the NG model through shared variables. The NG model is responsible for obtaining the voltages of the nodes to which the different elements are connected. Figure 20 shows the graphical user interface (GUI) of the HIL simulation for NG. In the interface, the parameters of the NG, such as the current of the loads, can be modified in Real-Time. Parameters and passive elements of the converters and inverter can also be adjusted.

Figure 20. GUI of the HIL simulation of NG.

Figure 20 shows the controls for adjusting the parameters of the DC-DC converters, and the clock cycles it takes to execute each element using the Loop Rate indicator. Table 1 shows the clock cycles of each element, which is the smallest number of cycles obtained from the implementation of the element models in the FPGA using the methodology in [17]. It is important to mention that the hardware used for the HIL implementation is a NI cRIO-9067 with a Zynq-7020 FPGA, which has a clock frequency of 40 MHz.

Table 1. Clock cycles and time for each element in NG.

Element	Clock Cycles	Time
NG	17	425 ns
BC	9	225 ns
SBC	8	200 ns
BI	11	275 ns

4. Results

In this section, the results from the asynchronous HIL NG simulation are presented. Its performance is compared against an offline simulation using PSIM software and a synchronous HIL NG simulation using a t_i = 425 ns, which is the larger t_i shown in Table 1 (corresponding to the NG). In Table 2, the parameters of the NG are presented. A resistive behavior of Z_L is considered to simplify the calculations.

Table 2. DC NG parameters.

Parameter	Value	Unit
DC Bus	400	V
Line Impedance	0.1	Ω
Load Power	4	kW

The boost and the synchronous boost converter were designed using the methodology presented in [18]. The design parameters are presented in Table 3 and Table 4, respectively.

Table 3. Design parameters for the boost converter.

Parameter	Value	Unit
Output Power	4	kW
Output Voltage	420	V
Input Voltage	200	V
Efficiency	85	%
Inductor Current Ripple	5	% of IDC
Output Voltage Ripple	1	% of Vo

Table 4. Design parameters for the synchronous boost converter.

Parameter	Value	Unit
Output Power	4	kW
Output Voltage	420	V
Input Voltage	196	V
Efficiency	85	%
Inductor Current Ripple	5	% of IDC
Output Voltage Ripple	1	% of Vo

The calculated passive elements for both converters are shown in Table 5.

Table 5. Passive elements for both converters.

Parameter	Value	Unit
Inductor	2	mH
Capacitor	1	mF

Three tests were conducted to verify the behavior of the simulation. In the first one, the current reference for the boost converter increases while the other parameters are maintained without change. In the second test, a change in current reference for synchronous boost converted is made, first supplying energy to the NG and later consuming energy from the NG. In the third test, the current of one load is increased. The synchronous and asynchronous HIL simulation signals are obtained through an oscilloscope; that is, they are sent from the simulation to the real world through a digital to analog converter.

During the tests, four signals are obtained. One is the signal with the value changing, and another is i_DC to demonstrate that the NG is supplying or consuming energy from the main grid (a negative value indicates that the NG is supplying energy and a positive value indicates that it is consuming energy from the NG). Signal i_a demonstrates that the bidirectional inverter is generating a sinusoidal waveform, and the phase is also used to determine whether the NG is supplying or consuming energy. The final signal is v_DC, the voltage of the DC bus. This signal is shown to demonstrate the stability of the NG, its value has to be near 400 V, and that is expected to increase when the NG is supplying energy and decrease when it is consuming energy.

In Figure 21, a comparison between HIL simulations and offline simulations for the first test is shown. In Figure 21a, the current reference i_O1 changes from 2 A to 4 A. In Figure 21b, the i_DC current changes from −1 A to 1 A. In Figure 21c, it can be observed a magnitude and phase change in current i_a, denoting that in one instant the bidirectional inverter is supplying energy and later is receiving it. In Figure 21d, the v_DC voltage is observed. This test was performed with an i_L1 and i_L2 equal to 3 A, while i_O2 supplies a current of 3 A.

Figure 21. First test results of HIL simulations and PSIM, (a) i_O1, (b) i_DC, (c) ia and (d) v_DC.

Table 6 compares the three simulations using the mean absolute error (MAE). It can be noticed that the behavior is similar between simulations; however, a smaller error is obtained with asynchronous HIL simulation.

Table 6. First test comparison between the PSIM and HIL simulations.

Signal	MAE PSIM vs. HIL Asynchronous	MAE PSIM vs. HIL Synchronous	Unit
iO1	0.122	0.216	A
ia	0.080	0.194	A
iDC	0.047	0.140	A
vDC	1.40	1.00	V

In Figure 22 comparison between three simulations for the second test is shown. In Figure 22a, the current reference i_O2 changes from 4 A to −1 A. In Figure 22b, it can be noticed the i_DC current changes from 4 A to −1 A. In Figure 22c, it can be observed a magnitude and phase change in current i_a, denoting that in one instant the bidirectional inverter is supplying energy and later is receiving it. In Figure 22d, the v_DC voltage is observed. This test was performed with an i_L1 and i_L2 equal to 3 A, while i_O1 supplies a current of 6 A.

Figure 22. Second test Results of HIL simulations and PSIM, (a) i_O2, (b) i_DC, (c) ia and (d) v_DC.

Table 7 shows a comparison between the PSIM and HIL simulations using MAE. It can be noticed that the behavior is similar between simulations. Again, the error is smaller in the asynchronous HIL simulation.

Table 7. Second test comparison between the PSIM and HIL simulations.

Signal	MAE PSIM vs. HIL Asynchronous	MAE PSIM vs. HIL Synchronous	Unit
iO2	0.132	0.175	A
ia	0.169	0.697	A
iDC	0.129	0.231	A
vDC	1.45	1.11	V

In Figure 23 comparison between HIL simulations and PSIM for the third test is shown. In Figure 23a, the current i_L2 is shown, changing from 3 A to 6 A. In Figure 23b, it can be noticed the i_DC current changes from 1 A to −2 A. In Figure 23c, it can be observed the magnitude and phase in current i_a, denoting that in one instant the bidirectional inverter is supplying energy and later is receiving it. In Figure 23d, the v_DC voltage is observed. This test was performed with an i_O1 = 4 A and i_O2 = 3 A, while i_L1 demands a current of 3 A.

Figure 23. Third test Results of HIL simulations and PSIM, (a) i_L2, (b) i_DC, (c) ia_, and (d) v_DC.

Table 8 shows a comparison between the PSIM and HIL simulations. It can be noticed that the behavior is similar between simulations, but the smaller error is presented in the asynchronous HIL simulation.

Table 8. Third test comparison between the PSIM and HIL simulation.

Signal	MAE PSIM vs. HIL Asynchronous	MAE PSIM vs. HIL Synchronous	Unit
iL2	0.115	0.143	A
ia	0.186	0.435	A
iDC	0.055	0.154	A
vDC	1.45	1.10	V

The results presented in Figure 21, Figure 22 and Figure 23 prove that the behavior between PSIM and HIL simulations is similar. However, it is important to notice that the t_i for PSIM simulation is 200 ns, fixed for all the elements, and that the simulation with the lesser error is the asynchronous HIL simulation. Furthermore, the asynchronous HIL simulation shows, at minimum, the same precision as the PSIM simulation. This proves that the asynchronous HIL simulation can be used to test control systems for the power converters and energy management systems for the NG in a more realistic scenario since they usually have an asynchronous operation.

5. Conclusions

Nowadays, DC NG is gaining importance worldwide. These systems are complex, so simulation plays a major role in their implementation. Regarding simulation, there is no doubt that HIL simulation has substantial advantages over offline simulation. However, performing simulations of a DC NG using commercial hardware forces the system to be solved in the same integration time. Custom solutions offer advantages, but also force the system to be solved in the same integration time.

The implementation of a DC NG was achieved modularly and with different integration times for each element, that is, asynchronously. This implies advantages over other implementations that require the synchronization of all the elements, slowing down the general system, and also provides a more realistic operation than the actual systems since they may operate asynchronously in reality. The main novelty of this proposal is the possibility of using different integration times in different parts of the system.

The NG model was obtained by replacing each element with an equivalent circuit (voltage or current source) to model the NG using nodal analysis techniques. The converters used in the NG (bidirectional inverter, boost converter, and synchronous boost converter) were also modeled using the state spaces approach.

The implementation of each element in the FPGA was presented using the LabVIEW FPGA software, which helps make the implementation easier than using other low-level languages through using its own functions and, at the same time, with the power of implementing custom-made models.

Tests were performed on the DC NG. The results of the asynchronous HIL simulation are compared with a synchronous HIL simulation having an integration time of 425 ns, and with an offline simulation performed in PSIM software, achieving an integration time of 200 ns for the fastest element and a 425 ns in the slowest element. The error obtained is less than 0.2 A for current signals and less than 2 V for voltage signals. The results prove that the asynchronous HIL simulations are as precise as the PSIM and synchronous HIL simulations.