# Asynchronous and Decoupled HIL Simulation of a DC Nanogrid

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## Abstract

**:**

## 1. Introduction

_{i}) that can be obtained in the range of 0.5 to 2 µs [4]. This t

_{i}limits the switching frequency of power converters to around 20 kHz. When the simulation of an NG is executed in commercial hardware, all the element models are solved at the same t

_{i}. In recent years, some researchers have started implementing complex models for HIL simulation using FPGA due to their inherent parallelism and low latency.

_{i}, even when some elements could be solved more quickly.

_{i}used in the simulation and the whole system is solved using the same t

_{i}.

_{i}.

_{i}for each component, resulting in an accurate simulation for each NG element and the whole NG. The RES systems are decoupled with each other and simulated in parallel so that new RES integrations can be easily achieved; the main novelty of this proposal is the possibility of using different integration times in different parts of the system. In addition, it makes possible the simulation of power converters at different commutation frequencies, which are no longer limited due to the t

_{i}of the slowest simulated element. The type of simulation presented in this work achieves results more similar to what happens while implementing a physical NG. Also, the implementation of this simulation is easier than others because a synchronization signal is not required.

## 2. Proposed HIL Simulation for NG

_{i}to solve the whole system. As a result, the actual execution time and the FPGA resource consumption will increase quickly as the complexity of the system increases. Unlike the centralized NAM used in commercial hardware, the main objective of this proposal is to decouple an NG in several submodules. In this way, each module can be solved as fast as possible and with different solution methods, if required, such as state-space (SS) or NAM.

_{i}. It is important to notice that other solution methods can be used to solve the different systems.

## 3. Methodology

#### 3.1. DC Nanogrid Topology

_{in}; a synchronous boost converter (SBC) connected to a battery with a voltage V

_{bat}; a bidirectional power inverter (BI) that works as a gateway between the grid and the DC bus, and two loads represented as current sources i

_{L1}and i

_{L2}. The impedances between components are included as well.

#### 3.2. DC Nanogrid Model

_{DC}value (Figure 4) since its main function is to regulate the DC bus voltage. The DC-DC converters and their impedance associated with the connection to the NG are replaced by two dependent DC power supplies, i

_{O}

_{1}, and i

_{O}

_{2}(Figure 5 and Figure 6). Finally, two independent DC power supplies replace the loads. It is important to notice that the values of the dependent power supplies are continuously solved using their models.

_{O}

_{1}and i

_{O}

_{2}can be obtained by using:

_{Ox}is the converter output current, v

_{Ox}is the converter output voltage, v

_{x}is the node voltage where the converter is connected to the NG, and Z

_{Cx}is the impedance between the NG and the DC/DC converter.

_{Lx}) are equal, can be written as:

**Y**is time-invariant, and values for the

**j**vector are easily obtained from (1).

#### 3.3. Power Converter Models

_{L}). The first state occurs when S is on, causing an i

_{L}increase, and the diode D is open (Figure 9). The second state is when S is off, causing D to close and i

_{L}to start to decrease (Figure 10). The third state occurs when S is off and the inductor (L) is fully discharged, so in this state i

_{L}= 0 (Figure 11).

_{in}is the input voltage of the BC, v

_{O}

_{1}is the output voltage of the BC, C is the output capacitor, Z

_{C}

_{1}is the impedance between the converter and the NG, and v

_{1}is the node where the converter is connected to the NG.

_{1}and S

_{2}. The equivalent circuits for the converter states are shown in Figure 13 and Figure 14.

_{bat}is the battery voltage, v

_{O}

_{2}is the output voltage of the SBC, Z

_{C}

_{2}is the impedance between the converter and the NG, and v

_{3}is the connection node between the NG and the converter.

_{xn}is the phase ‘x’ inverter voltage, v

_{X}is the phase ‘X’ grid voltage, i

_{x}is the phase ‘x’ inverter current, L

_{x}is the inductance of the topology, R

_{x}is the series inductor resistance, v

_{DC}is the capacitor voltage, C

_{DC}is the DC-side capacitor, i

_{DC}is the current demanded by the inverter, and i

_{in}is the MG current.

#### 3.4. FPGA Implementation

**j**vector and the solution to the

**Y∙j**operation can be observed, carried out with a predefined LabVIEW function. It is also important to notice that the matrix

**Y**is generated offline and is time-invariant. The voltage values from the NG are obtained using the current values that each model converter provides. The DC NG model presented in Figure 16 has a different t

_{i}than the models of the converters, creating a complete asynchronous solution.

_{O}

_{1}), and the generation of the PWM signal.

_{O}

_{2}), and the generation of the PWM signal.

## 4. Results

_{i}= 425 ns, which is the larger t

_{i}shown in Table 1 (corresponding to the NG). In Table 2, the parameters of the NG are presented. A resistive behavior of Z

_{L}is considered to simplify the calculations.

_{DC}to demonstrate that the NG is supplying or consuming energy from the main grid (a negative value indicates that the NG is supplying energy and a positive value indicates that it is consuming energy from the NG). Signal i

_{a}demonstrates that the bidirectional inverter is generating a sinusoidal waveform, and the phase is also used to determine whether the NG is supplying or consuming energy. The final signal is v

_{DC}, the voltage of the DC bus. This signal is shown to demonstrate the stability of the NG, its value has to be near 400 V, and that is expected to increase when the NG is supplying energy and decrease when it is consuming energy.

_{O}

_{1}changes from 2 A to 4 A. In Figure 21b, the i

_{DC}current changes from −1 A to 1 A. In Figure 21c, it can be observed a magnitude and phase change in current i

_{a}, denoting that in one instant the bidirectional inverter is supplying energy and later is receiving it. In Figure 21d, the v

_{DC}voltage is observed. This test was performed with an i

_{L}

_{1}and i

_{L}

_{2}equal to 3 A, while i

_{O}

_{2}supplies a current of 3 A.

_{O}

_{2}changes from 4 A to −1 A. In Figure 22b, it can be noticed the i

_{DC}current changes from 4 A to −1 A. In Figure 22c, it can be observed a magnitude and phase change in current i

_{a}, denoting that in one instant the bidirectional inverter is supplying energy and later is receiving it. In Figure 22d, the v

_{DC}voltage is observed. This test was performed with an i

_{L}

_{1}and i

_{L}

_{2}equal to 3 A, while i

_{O}

_{1}supplies a current of 6 A.

_{L}

_{2}is shown, changing from 3 A to 6 A. In Figure 23b, it can be noticed the i

_{DC}current changes from 1 A to −2 A. In Figure 23c, it can be observed the magnitude and phase in current i

_{a}, denoting that in one instant the bidirectional inverter is supplying energy and later is receiving it. In Figure 23d, the v

_{DC}voltage is observed. This test was performed with an i

_{O}

_{1}= 4 A and i

_{O}

_{2}= 3 A, while i

_{L}

_{1}demands a current of 3 A.

_{i}for PSIM simulation is 200 ns, fixed for all the elements, and that the simulation with the lesser error is the asynchronous HIL simulation. Furthermore, the asynchronous HIL simulation shows, at minimum, the same precision as the PSIM simulation. This proves that the asynchronous HIL simulation can be used to test control systems for the power converters and energy management systems for the NG in a more realistic scenario since they usually have an asynchronous operation.

## 5. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

## Nomenclature

DG | Distributed generation |

NG | Nanogrid |

AC | Alternate current |

DC | Direct current |

RES | Renewable energy system |

MG | Microgrids |

HIL | Hardware In the Loop |

FPGA | Field Programmable Gate Array |

DSP | Digital Signal Processor |

t_{i} | Integration Time |

NAM | Nodal Analysis Method |

SS | State Spaces |

BC | Boost converter |

V_{in} | Input voltage of the BC |

SBC | Synchrounous Boost Converter |

V_{bat} | Battery Voltage connected to SBC |

BI | Bidirectional Power inverter |

i_{Lx} | Load current x |

i_{L} | Inductor current of the BC and SBC |

i_{Ox} | DC/DC converter output current |

v_{Ox} | DC/DC converter output voltage |

Z_{Cx} | Impedance between the NG and the DC/DC converter |

Z_{Lx} | Impedance between the NG nodes |

v_{xn} | The phase ‘x’ inverter voltage |

v_{X} | The phase ‘X’ grid voltage |

i_{x} | The phase ‘x’ inverter current |

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**Figure 2.**DC NG proposed topology, the power electronic converters are solved using SS, and the NG is solved using NAM.

**Figure 13.**Schematic circuit of Synchronous Boost Converter for the first state (S

_{1}= 1 and S

_{2}= 0).

**Figure 14.**Schematic circuit of Synchronous Boost Converter for the second state (S

_{1}= 0 and S

_{2}= 1).

**Figure 18.**LabVIEW FPGA implementation of the synchronous boost converter, PI control, and PWM signal.

**Figure 19.**LabVIEW FPGA implementation (

**a**) the bidirectional inverter, (

**b**) the three-phase power signals, and (

**c**) control.

**Figure 21.**First test results of HIL simulations and PSIM, (

**a**) i

_{O}

_{1}, (

**b**) i

_{DC}, (

**c**) ia and (

**d**) v

_{DC}.

**Figure 22.**Second test Results of HIL simulations and PSIM, (

**a**) i

_{O}

_{2}, (

**b**) i

_{DC}, (

**c**) ia and (

**d**) v

_{DC}.

**Figure 23.**Third test Results of HIL simulations and PSIM, (

**a**) i

_{L}

_{2}, (

**b**) i

_{DC}, (

**c**) ia

_{,}and (

**d**) v

_{DC}.

Element | Clock Cycles | Time |
---|---|---|

NG | 17 | 425 ns |

BC | 9 | 225 ns |

SBC | 8 | 200 ns |

BI | 11 | 275 ns |

Parameter | Value | Unit |
---|---|---|

DC Bus | 400 | V |

Line Impedance | 0.1 | Ω |

Load Power | 4 | kW |

Parameter | Value | Unit |
---|---|---|

Output Power | 4 | kW |

Output Voltage | 420 | V |

Input Voltage | 200 | V |

Efficiency | 85 | % |

Inductor Current Ripple | 5 | % of I_{DC} |

Output Voltage Ripple | 1 | % of V_{o} |

Parameter | Value | Unit |
---|---|---|

Output Power | 4 | kW |

Output Voltage | 420 | V |

Input Voltage | 196 | V |

Efficiency | 85 | % |

Inductor Current Ripple | 5 | % of I_{DC} |

Output Voltage Ripple | 1 | % of V_{o} |

Parameter | Value | Unit |
---|---|---|

Inductor | 2 | mH |

Capacitor | 1 | mF |

Signal | MAE PSIM vs. HIL Asynchronous | MAE PSIM vs. HIL Synchronous | Unit |
---|---|---|---|

i_{O}_{1} | 0.122 | 0.216 | A |

i_{a} | 0.080 | 0.194 | A |

i_{DC} | 0.047 | 0.140 | A |

v_{DC} | 1.40 | 1.00 | V |

Signal | MAE PSIM vs. HIL Asynchronous | MAE PSIM vs. HIL Synchronous | Unit |
---|---|---|---|

i_{O}_{2} | 0.132 | 0.175 | A |

i_{a} | 0.169 | 0.697 | A |

i_{DC} | 0.129 | 0.231 | A |

v_{DC} | 1.45 | 1.11 | V |

Signal | MAE PSIM vs. HIL Asynchronous | MAE PSIM vs. HIL Synchronous | Unit |
---|---|---|---|

i_{L}_{2} | 0.115 | 0.143 | A |

i_{a} | 0.186 | 0.435 | A |

i_{DC} | 0.055 | 0.154 | A |

v_{DC} | 1.45 | 1.10 | V |

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**MDPI and ACS Style**

Estrada, L.; Vaquero, J.; Rodríguez-Lorente, A.; Arau, J.; de Castro, A.; Sanchez, A.; Vazquez, N.
Asynchronous and Decoupled HIL Simulation of a DC Nanogrid. *Electronics* **2022**, *11*, 2045.
https://doi.org/10.3390/electronics11132045

**AMA Style**

Estrada L, Vaquero J, Rodríguez-Lorente A, Arau J, de Castro A, Sanchez A, Vazquez N.
Asynchronous and Decoupled HIL Simulation of a DC Nanogrid. *Electronics*. 2022; 11(13):2045.
https://doi.org/10.3390/electronics11132045

**Chicago/Turabian Style**

Estrada, Leonel, Joaquín Vaquero, Alba Rodríguez-Lorente, Jaime Arau, Angel de Castro, Alberto Sanchez, and Nimrod Vazquez.
2022. "Asynchronous and Decoupled HIL Simulation of a DC Nanogrid" *Electronics* 11, no. 13: 2045.
https://doi.org/10.3390/electronics11132045