Journal of Low Power Electronics and Applications, Volume 2, Issue 2

This paper presents the first known timing-error detection (TED) microprocessor able to operate in subthreshold. Since the minimum energy point (MEP) of static CMOS logic is in subthreshold, there is a strong motivation to design ultra-low-power syst...

A novel Single Event Upset (SEU) tolerant flip-flop design is proposed, which is well suited for very-low power electronics that operate in subthreshold ( < Vt ≈ 500 mV). The proposed flip-flop along with a traditional (unprotected) flip-flop, a Sens...

We present a low voltage, low power operational transconductance amplifier (OTA) designed using a Fully Depleted Silicon-on-Insulator (FDSOI) process. For very low voltage application down to 0.5 V, two-stage miller-compensated OTAs with both p-chann...

The need for ultra low power circuits has forced circuit designers to scale voltage supplies into the sub-threshold region where energy per operation is minimized [1]. The problem with this is that the traditional 6T SRAM bitcell, used for data stora...

A low complexity digital VLSI architecture for the computation of an algebraic integer (AI) based 8-point Arai DCT algorithm is proposed. AI encoding schemes for exact representation of the Arai DCT transform based on a particularly sparse 2-D AI rep...