Repeater Insertion for Multi-Walled Carbon Nanotube Interconnects

Abstract

Closed-form expressions for the optimized number and size of repeaters in multi-walled carbon nanotube (MWCNT) interconnects are presented. The contact resistance and inductive effects are taken into account. It is found that the propagation delay of MWCNT interconnects can be reduced effectively by inserting repeaters. However, the contact resistance has a significant influence on the optimized number and size of repeaters. Moreover, it is found that both the optimal number of repeaters and the minimum propagation delay are kept almost unchanged with the variation of carbon nanotube (CNT) kinetic inductance. The optimal number of repeaters in the MWCNT interconnect is much smaller than that in its Cu counterpart, thus saving chip area and power consumption.

1. Introduction

As the feature size of complementary metal-oxide semiconductor (CMOS)-integrated circuits continues to shrink, the interconnect dimensions are scaled down, which increases the electron scatterings at the surface and grain boundaries. Therefore, the interconnect delay increases dramatically and outweighs the gate delay, becoming the main bottleneck of improving the performance of modern integrated circuits [1]. More importantly, as predicted by the International Technology Roadmap for Semiconductors (ITRS), the current density will exceed the maximum allowable value of the conventional Cu interconnects within the next 5 years [2]. In order to solve such an issue, some innovative architectural concepts and materials are needed.

As alternative conductor materials, carbon nanomaterials, including carbon nanotubes (CNTs) and graphene, have aroused lots of interest due to their outstanding physical properties [3,4,5,6,7,8,9]. According to the number of carbon atom layers in a CNT wall, CNTs can be classified into single-walled CNTs (SWCNTs) and multi-walled CNTs (MWCNTs). SWCNTs can be either semiconducting or metallic, while MWCNTs are always metallic. Moreover, MWCNTs have a simpler fabrication process than SWCNTs due to easier control of the growth process, and under certain circumstances, MWCNTs possess a negative temperature coefficient on electrical resistance, which cannot be observed in SWCNTs [10,11].

Several research efforts have been made on the modeling and fabrication of MWCNT interconnects. Based on a physical model, it was found that the MWCNT conductivity increases with length and tends to be stable as the influence of contact resistance can be reduced by increasing the length [12]. As the length exceeds tens of micrometers, MWCNTs exhibit superior performance to their Cu and SWCNT counterparts, which makes MWCNTs suitable for the intermediate and global interconnect levels [13]. Although the complete multi-conductor transmission line proposed in [13] is accurate, it is time-consuming in dealing with complex MWCNT interconnects. Therefore, a simplified equivalent single-conductor (ESC) transmission line model was provided in [14] to reduce the computational complexity, with an expression for equivalent capacitance in the ESC model derived analytically. Furthermore, the impact of intershell tunneling conductance was investigated in [15,16], respectively, and it was found that the ESC model can provide an accurate prediction of time delay. Based on the ESC model, the robust design of the propagation characteristics and the crosstalk of MWCNT interconnects was carried out [17,18,19].

On the other hand, a repeater insertion methodology is essential for the implementation of high-performance VLSI designs. It is intuitive to insert some repeaters at intermediate- and global-level MWCNT interconnects, and a related investigation was carried out in [20]. As is well-known, however, contact resistance is inevitable in real-world applications of nanotube-like structures [21,22]. As shown in Figure 1, each inserted repeater in an MWCNT interconnect would, apparently, introduce new contact resistance, which would surely influence the propagation delay. The previous study [20] neglected the contact resistances induced by the inserted repeaters, thereby leading to overestimated electrical performance. The impact of contact resistance on optimal repeater insertion was studied for a monolayer SWCNT, an SWCNT bundle, and MWCNT interconnects in [23]. It was demonstrated that for MWCNT interconnects, the contact resistance must be taken into account when it exceeds a certain value. However, the study in [23] is just based on the resistance-capacitance (RC) model, and the optimal repeater size and number were obtained numerically. As indicated in [24], the measured CNT kinetic inductance may be 15 times larger than its theoretical value, and the inductive effect should be considered. Therefore, closed-form expressions for the optimized repeater size and number are desirable for MWCNT interconnects with the considerations of contact resistance and inductive effects, which is the motivation behind this study.

Figure 1. Repeater insertion in a long multi-walled carbon nanotube (MWCNT) interconnect and the equivalent single-conductor (ESC) model for one segment of the MWCNT interconnect.

Based on the resistance-inductance-capacitance (RLC) model, this study focuses on the impacts of contact resistance on the optimal repeater size and number in intermediate- and global-level MWCNT interconnects at the 14 nm and 7 nm technology nodes. The rest of the paper is organized as follows. Section 2 introduces the ESC model of the MWCNT interconnects. Repeater insertion is studied in Section 3, with the closed-form expressions presented. Based on the proposed closed-form expressions, the optimal repeater insertion in MWCNT interconnects is investigated in Section 4. Some conclusions are finally drawn in Section 5.

2. ESC Model of the MWCNT Interconnect

For easy reference and completion of the model, the ESC modeling procedure of an MWCNT interconnect is reproduced here. Figure 2 shows the schematic of an MWCNT placed above the ground plane. In the figure, $r_s$ and $r_1$ represent the outmost and innermost diameters, respectively, $s$ is the shell number, and $d$ is the distance between the MWCNT and ground plane. Here, the innermost shell diameter is assumed to be half of its outermost diameter, i.e., $r_1=r_s/2$ [25].

Figure 2. Geometrical configuration of the cross-section of an MWCNT.

Supposing the spacing between adjacent shells in an MWCNT is $\delta =0.34 \mathrm{nm}$, the number of the shells can be given as

$$s=1+\mathrm{Inter}\left[\frac{r_s-r_1}{\delta }\right]$$

(1)

where “Inter[·]” indicates that only the integer part is considered. The radius of the $j$th shell is $r_j=r_1+\left(j-1\right)\delta$. As aforementioned, the MWCNT can be modeled as an ESC model [14] as shown in Figure 1. $R_c$ is the total terminal contact resistance, and it can be given as

$$R_c=2{\left[{\displaystyle \sum }_{j=1}^s{\left(\frac{R_Q}{2n_j}+R_{\mathrm{mc},j}\right)}^{-1}\right]}^{-1}$$

(2)

where $R_Q=h/\left(2e^2\right)=12.9 \mathrm{k}\mathsf{\Omega }$, $h$ is the Planck’s constant, $e$ is the electron charge, and $R_{\mathrm{mc},j}$ is the imperfect contact resistance of the $j$th shell. $n_j$ is the number of conducting channels of the $j$th shell of an MWCNT, and it can be expressed as [12,26]

$$n_j=\{\begin{array}{c}{k}_1{r}_j+k_2, r_j>1.5 \mathrm{nm}\\ 2/3, r_j<3 \mathrm{nm}\end{array}$$

(3)

where $k_1=0.122 {\mathrm{nm}}^{-1}$ and $k_2=0.425$. $r$ is the equivalent quantum resistance per-unit-length (p.u.l.), and it is in parallel connection of the p.u.l. series resistances of each shell, i.e.,

$$r={\left({\displaystyle \sum }_{j=1}^s\frac{n_j{\lambda }_j}{R_Q}\right)}^{-1}=R_Q{\left({\displaystyle \sum }_{j=1}^s{n}_j{\lambda }_j\right)}^{-1}$$

(4)

where ${\lambda }_j\approx 2000r_j$ is the effective mean free path of the $j$th shell in the MWCNT. $l$ is the equivalent p.u.l. inductance, and it can be obtained by

$$l=l_K+l_E$$

(5)

where $l_K$ is the p.u.l. equivalent kinetic inductance, and $l_E$ is the p.u.l. magnetic inductance of the external shell. According to [14], as the p.u.l. mutual inductance between adjacent shells is more than 3 orders of magnitude smaller than the p.u.l. kinetic inductance, it can be neglected. Therefore, the equivalent kinetic inductance is given as

$$l_K=\frac{L_{K/channel}}{n_{total}}$$

(6)

where $L_{K/channel}\approx 8 \mathrm{nH}/\mathsf{\mu }\mathrm{m}$ is the kinetic inductance per channel, and $n_{total}={\sum }_{j=1}^s{n}_j$ is the total number of conducting channels of the MWCNT. $c$ is the equivalent p.u.l. capacitance, and it can be given as [14]

$$c=\frac{c_Q{c}_E}{c_Q+c_E}.$$

(7)

The equivalent quantum capacitance is given as [14]

$$c_Q=\alpha s+\beta r_1+\gamma$$

(8)

where $c_Q$ is expressed in $\mathrm{nH}/\mathrm{m}$, $r_1$ is in nanometer, $\alpha =2.56\times {10}^{-2}\mathrm{nF}/\mathrm{m}$, $\beta =7.525\times {10}^{-2}\mathrm{F}/{\mathrm{m}}^2$, and $\gamma =9.887\times {10}^{-2}\mathrm{nF}/\mathrm{m}$. $c_E$ is the p.u.l. electrostatic capacitance of the external shell. The relationship between $l_E$ and $c_E$ can be expressed as

$$l_E=\frac{{\mu }_0{\epsilon }_0{\epsilon }_r}{c_E}$$

(9)

where ${\mu }_0$ and ${\epsilon }_0$ are the vacuum permeability and permittivity, respectively, and ${\epsilon }_r$ is the relative permittivity of the surrounding dielectric. Based on the typical interconnect configurations shown in Figure 3, the p.u.l. external capacitance $c_E$ is extracted by an electromagnetic simulator (e.g., ANSYS Maxwell). In this study, two technology nodes (i.e., the 14 nm and 7 nm technology nodes) are selected. In the figure, $W$ and $H\left(=AR\times W\right)$ are the interconnect width and height, respectively, $AR$ is the aspect ratio, $S\left(=W\right)$ is the separation between adjacent interconnects, and $t_{ox}$ is the thickness of the inter-layer dielectric (ILD). The geometrical and physical parameters, which are adopted from ITRS 2013, are listed in Table 1 [2]. Here, the aspect ratios of both the intermediate- and global-level MWCNT interconnects are assumed to be 2, as shown in Figure 3b. That is, two identical MWCNTs are stacked in parallel, and their gap is $\delta$. It is evident that the external capacitance of the MWCNT interconnects is smaller than that of their Cu counterpart.

Figure 3. Cross-sectional views of (a) Cu and (b) MWCNT interconnect configurations in an advanced integrated circuit design.

Table 1. Geometrical and physical parameters at the 14 nm and 7 nm technology nodes.

Technology Node		14 nm	7 nm
Intermediate	Width $\mathit{W}$ (nm)	14	7
	Aspect ratio $\mathit{A}\mathit{R}$	2.1	2.3
	Dielectric thickness ${\mathit{t}}_{\mathit{o}\mathit{x}}$ (nm)	26.6	13.3
	Cu resistivity ${\mathit{\rho }}_{{0}}$ ($\mathsf{\mu }\mathsf{\Omega }·\text{cm}$) 1	7.43	11.41
	${\mathit{c}}_{\mathit{E}}$ for Cu ($\text{pF}/\mathsf{\mu }\text{m}$)	130.8	110.3
	${\mathit{c}}_{\mathit{E}}$ for MWCNT ($\text{pF}/\mathsf{\mu }\text{m}$)	115.8	92.4
Global	Width $\mathit{W}$ (nm)	21	11
	Aspect ratio $\mathit{A}\mathit{R}$	2.34	2.34
	Dielectric thickness ${\mathit{t}}_{\mathit{o}\mathit{x}}$ (nm)	31.5	16.5
	Cu resistivity ${\mathit{\rho }}_{{0}}$ ($\mathsf{\mu }\mathsf{\Omega }·\text{cm}$)	6.11	8.97
	${\mathit{c}}_{\mathit{E}}$ for Cu ($\mathrm{p}\mathrm{F}/\mathsf{\mu }\text{m}$)	143.6	115
	${\mathit{c}}_{\mathit{E}}$ for MWCNT ($\text{pF}/\mathsf{\mu }\text{m}$) 2	124.2	99.7
Minimum sized gate	Output resistance ${\mathit{R}}_{\mathit{t}\mathit{r}\mathbf{0}}$ ($\text{k}\mathsf{\Omega }$)	30.3	69.7
	Input capacitance ${\mathit{C}}_{\mathit{g}\mathbf{0}}$ ($\mathrm{f}\mathrm{F}$)	0.22	0.13
Relative permittivity of the ILD ${\mathit{\epsilon }}_{\mathit{r}}$		2.0	1.6

¹ The effective resistivity of the Cu interconnect, which is adopted from the ITRS 2013, is much larger than its bulk value due to the influences of width-dependent scattering and the conformal barrier liner; ² The aspect ratio of the global level MWCNT interconnect is assumed to be 2.

3. Repeater Insertion

As shown in Figure 1, a long MWCNT interconnect is divided into $k$ segments of by repeaters. Here, the inserted repeaters are assumed to be equispaced CMOS inverters, whose on resistance and input capacitance are obtained from the ITRS projection (see Table 1) [2]. In Figure 1, $L$ is the interconnect length, and $h$ is the ratio of the driver/load size to the minimum gate size. As aforementioned, each segment of the MWCNT interconnect can be modeled as an ESC model. The 50% propagation delay of one segment can be calculated by [27]

$$T_{seg}=T_{\mathrm{rc}}+\left(T_{\mathrm{rlc}}-T_{\mathrm{rc}}\right)·M$$

(10)

where $M=1/\sqrt{1+0.005{\left\{\cos \left[9\mathrm{acos}\frac{{\left(a_1+a_2\right)}^{0.294}}{1.2-0.0498a_3}\right]\right\}}^2}$, $T_{\mathrm{rc}}=T_{\mathrm{f}}·\left[0.4a_1+0.7\left(a_2+a_1{a}_3+a_2{a}_3\right)\right]$, and $T_{\mathrm{rlc}}=T_{\mathrm{f}}·\left[1+a_3\left(0.342+0.397a_2+0.229a_1^{2.34}+0.642a_1^{1.3}{a}_2^{1.35}\right)\right]$, and the three basic coefficients a₁, a₂, and a₃ are the normalized ratios defined as follows [28]

$$a_1=\frac{\mathrm{line}\mathrm{resistance}}{\mathrm{characteristic}\mathrm{impedance}}=\frac{1}{Z_0}\left(R_c+\frac{rL}{k}\right)$$

(11)

$$a_2=\frac{\mathrm{driver}\mathrm{output}\mathrm{resistance}}{\mathrm{characteristic}\mathrm{impedance}}=\frac{R_{tr0}}{h{Z}_0}$$

(12)

$$a_3=\frac{\mathrm{load}\mathrm{capacitance}}{\mathrm{line}\mathrm{capacitance}}=\frac{hk{C}_{g0}}{cL}$$

(13)

where $R_{tr0}$ and $C_{g0}$ are the output resistance and input capacitance of the minimum size gate, respectively, $Z_0=\sqrt{l/c}$ is the characteristic impedance, and $T_{\mathrm{f}}=\sqrt{lc}L/k$ is the time-of-flight [28].

Based on the circuit model of a driver-interconnect-load (DIL) system in Figure 4, the accuracy of expression of the propagation delay can be examined. The driver and load are assumed to be 50 times the minimum sized gate for the intermediate-level interconnects, i.e., the driver resistance and load capacitance are $R_d=R_{tr0}/50$ and $C_L=50C_{g0}$, respectively. Figure 5 shows the 50% propagation delays of the intermediate-level Cu and MWCNT interconnects at the 14 nm and 7 nm technology nodes. The solid lines are obtained analytically from (10), while the dashed lines denote the simulated results using a commercial circuit simulator (e.g., Keysight ADS). It can be seen that the analytical and simulated results agree well with each other. With the technology node advanced, the propagation delay increases significantly due to the increased resistivity. Moreover, it is known that an MWCNT has an extremely long mean free path, which is usually several micrometers and much larger than that of Cu wire (approximately 40 nm). Therefore, an MWCNT interconnect exhibits superior performance over its Cu counterpart, as shown in Figure 5. However, considering the contact resistance induced by the inserted repeaters, an MWCNT interconnect may lose its performance advantage, which will be discussed in the next section.

Figure 4. Distributed circuit model of a driver-interconnect-load (DIL) system.

Figure 5. Propagation delays versus length in the intermediate-level (a) Cu and (b) MWCNT interconnects.

It is evident that that the time delay is a function of $a_1$, $a_2$, and $a_3$, that is, $T_{seg}=T_{\mathrm{f}}·F\left(a_1,a_2,a_3\right)$. The total propagation delay of the MWCNT interconnects can be written as

$$T_{\mathrm{total}}=k{T}_{\mathrm{f}}·F\left(a_1, a_2, a_3\right)=\sqrt{lc}L·F\left(a_1, a_2, a_3\right).$$

(14)

According to [29], the repeater size and number of segments can be expressed as

$$h=\sqrt{\frac{R_{tr0}cL}{C_{g0}\left(rL+R_{\mathrm{c}}\right)}}{h}^{\prime }$$

(15)

$$k=\sqrt{\frac{4}{7}\frac{\left(rL+R_{\mathrm{c}}\right)cL}{R_{tr0}{C}_{g0}}}{k}^{\prime }$$

(16)

where $h^{\prime }$ and $k^{\prime }$ are the correction factors. Substituting (15) and (16) into (14), the total propagation delay can be written as $T_{\mathrm{total}}=\sqrt{lc}L·F\left(m+\sqrt{7}/\left(\sqrt{4}{k}^{\prime }pq\right), q/\left(h^{\prime }p\right), \sqrt{4}/\left(\sqrt{7}{h}^{\prime }{k}^{\prime }\right)\right)$, where $p=\sqrt{l/\left(r{R}_{tr0}{C}_{g0}\right)}$, $q=\sqrt{1+R_c/\left(rL\right)}$, and $m=R_c/Z_0$. In real-world applications, $R_c$ must be smaller than the interconnect resistance $rL$. Otherwise, the fabrication process should be optimized first [22]. Therefore, $q$ is limited to [1, 1.4], and $p$ is in the range of [0, 10] [29]. After careful examination of the characteristic impedance of the MWCNT interconnects according to the geometrical and physical parameters adopted from the ITRS projection, $m$ is defined in the range of [0, 10]. In order to minimize the total propagation delay, $\partial F/\partial h^{\prime }=0$ and $\partial F/\partial k^{\prime }=0$ need to be solved simultaneously. By numerically solving these equations, $h^{\prime }$ and $k^{\prime }$ can be obtained. Using the multivariable curve fitting technique, the closed-form expressions of $h_{opt}^{\prime }$ and $k_{opt}^{\prime }$ are obtained and given as

$$h_{opt}^{\prime }=\cos \left(q-1\right)\frac{0.839+0.269m-0.021m^2-0.917\ln p+0.345{\left(\ln p\right)}^2-0.037{\left(\ln p\right)}^3}{1+0.209m+0.045m^2-0.005m^3-0.854\ln p+0.361{\left(\ln p\right)}^2}$$

(17)

$$k_{opt}^{\prime }=\cos \left(q-1\right)\frac{0.835+0.307m-0.047m^2+0.002m^3-0.606\ln p+0.116{\left(\ln p\right)}^2}{1+0.739m-0.073m^2+0.002m^3-0.474\ln p+0.161{\left(\ln p\right)}^2}.$$

(18)

The optimized repeater size $h_{opt}$ and number of segments $k_{opt}$ can be finally obtained by substituting (17) into (15) and (18) into (16), respectively. Then, the minimum propagation delay $T_{\min }$ can be obtained by (14). Here, the optimal number of repeaters is denoted as $n_{opt}$, which is calculated as $k_{opt}-1$.

4. Results and Discussion

In order to clarify the influences of the contact resistance and CNT kinetic inductance, three types of MWCNT interconnects are taken into account, as listed in Table 2. Here, MWCNT 1 denotes an MWCNT interconnect with the minimum contact resistance $R_{c, \min }$, i.e., only the quantum contact resistance is considered. However, in real-world fabrication, imperfect contact resistance is inevitable. So, a contact resistance $R_c$ of $10 \mathrm{k}\mathsf{\Omega }$ is considered in the case of MWCNT 2. As aforementioned, the CNT kinetic inductance may be 15 times larger than its theoretical value. Therefore, MWCNT 3 represents an MWCNT interconnect with a contact resistance $R_c$ of $10 \mathrm{k}\mathsf{\Omega }$ and a kinetic inductance per channel $L_{K/channel}$ of $60 \mathrm{nH}/\mathsf{\mu }\mathrm{m}$.

Table 2. Parameters of MWCNT interconnects.

Type	MWCNT 1	MWCNT 2	MWCNT 3
$R_c$ ($\mathrm{k}\mathsf{\Omega }$)	$R_{c, \min }$ 1	10	10
$L_{K/channel}$ ($\mathrm{nH}/\mathsf{\mu }\mathrm{m}$)	8	8	60

¹ $R_{c,\min }$ denotes the minimum contact resistance, i.e., only the quantum contact resistance is considered. At the 14 nm (7 nm) technology node, $R_{c,\min }$ is 0.55 kΩ (1.45 kΩ) for the intermediate level and 0.29 kΩ (0.75 kΩ) for the global level.

Figure 6 shows the propagation delay for 1000 μm-long intermediate-level Cu and MWCNT interconnects with the insertion of different numbers of repeaters. The optimal repeater size $h_{opt}$ and the size of 50 times larger than the minimum gate size are considered. It can be seen that the minimum propagation delay $T_{\min }$ is achieved when the repeaters of optimal size are inserted, and the estimation from the closed-form expressions is closed to the simulated optimal number of repeaters, as listed in Table 3. It is found that with the technology node advanced, the propagation delay increases significantly and more repeaters need to be inserted, which has an adverse effect on the chip area and power consumption. Therefore, a tapered buffer insertion should be employed to avoid large power dissipation [30,31], and further investigation should be conducted with constraints of both delay and power [32,33,34], which is the subject of our next study.

Figure 6. Propagation delays versus number of repeaters for 1000-μm-long intermediate-level Cu and MWCNT interconnects. (a) Cu; (b) MWCNT 1; (c) MWCNT 2; and (d) MWCNT 3.

Table 3. Comparison of the simulated and estimated optimal number of repeaters, repeater size, and minimum time delay in 1000 μm-long intermediate-level Cu and MWCNT interconnects at the 14 nm and 7 nm technology nodes.

14 nm Node	Cu	MWCNT 1	MWCNT 2	MWCNT 3
Simulated $n_{opt}$	44	21	12	11
Estimated $n_{opt}$	43	19	11	9
Estimated $h_{opt}$	10	17	10	10
$T_{\min }$ (ns)	0.974	0.651	1.538	1.522
7 nm Node	Cu	MWCNT 1	MWCNT 2	MWCNT 3
Simulated $n_{opt}$	83	36	24	25
Estimated $n_{opt}$	79	31	24	19
Estimated $h_{opt}$	8	12	11	7
$T_{\min }$ (ns)	2.473	1.303	1.865	1.890

It is found that MWCNT interconnects require a much lower number of repeaters to optimize timing than Cu wires, which results in low complexity and power consumption. With the minimum contact resistance, MWCNT interconnects still exhibit superior performance over their Cu counterpart. However, the propagation delay of the MWCNT interconnects increases with the increasing contact resistance. At the 14 nm technology node, as the contact resistance increases to 10 kΩ, the minimum propagation delay of the MWCNT interconnect is 1.538 ns, which is much larger than that of Cu wire. Moreover, the increase in the CNT kinetic inductance has negligible influence on the optimal repeater size and number. So, the minimum propagation delay is kept almost unchanged with the variation of CNT kinetic inductance.

Further, the optimal repeater insertions in the global-level Cu and MWCNT interconnects are studied, as shown in Figure 7. The minimum propagation delay and optimal repeater size and number are summarized in Table 4. As a global-level interconnect has smaller resistivity than an intermediate one, it requires less repeaters to optimizing the timing. Similarly, the estimated repeater number agrees well with the simulated one. The propagation delay of the MWCNT interconnect decreases significantly with increasing contact resistance, implying that the impact of contact resistance cannot be simply neglected in the interconnect’s optimization and it is always essential to improve the fabrication process to reduce the contact resistance. Figure 8 compares the estimated and simulated values of the optimal repeater number and minimum propagation delay for the global interconnects at the 14 nm technology node. It is shown that the optimal repeater number increases linearly with increasing interconnect length.

Figure 7. Propagation delays versus number of repeaters for 2000-μm-long global-level Cu and MWCNT interconnects. (a) Cu; (b) MWCNT 1; (c) MWCNT 2; and (d) MWCNT 3.

Table 4. Comparison of the simulated and estimated optimal number of repeaters, repeater size, and minimum time delay in 2000-μm-long global-level Cu and MWCNT interconnects at the 14 nm and 7 nm technology nodes.

14 nm Node	Cu	MWCNT 1	MWCNT 2	MWCNT 3
Simulated $n_{opt}$	53	22	11	10
Estimated $n_{opt}$	51	19	12	9
Estimated $h_{opt}$	18	25	14	14
$T_{\min }$ (ns)	1.172	0.678	2.067	2.038
7 nm Node	Cu	MWCNT 1	MWCNT 2	MWCNT 3
Simulated $n_{opt}$	95	41	25	23
Estimated $n_{opt}$	91	37	25	20
Estimated $h_{opt}$	14	22	17	15
$T_{\min }$ (ns)	2.828	1.562	2.776	2.758

Figure 8. Optimal number of repeaters (Inset: minimum propagation delay) versus length for global-level Cu and MWCNT interconnects at the 14 nm technology node.

Based on the proposed fitting expressions, the minimum propagation delays of the intermediate and global interconnects are obtained as shown in Figure 9. It can be seen that the minimum propagation delay increases linearly with the length. With the minimum contact resistance, MWCNT interconnects can always provide a smaller delay than their Cu counterparts. However, as the contact resistance increases to $10 \mathrm{k}\mathsf{\Omega }$, MWCNT interconnects would lose their edge at the 14 nm technology node, but still show superior performance over Cu at the 7 nm technology node. This can be explained as follows. As shown in Figure 10, at the 14 nm node, an MWCNT interconnect outperforms its Cu counterpart when the contact resistance is smaller than $3.3 \mathrm{k}\mathsf{\Omega }$. With the technology scaling to 7 nm, the maximum tolerable contact resistance of the MWCNT interconnect is increased to 10.5 kΩ.

Figure 9. Minimum propagation delays versus length for (a) intermediate- and (b) global-level Cu and MWCNT interconnects.

Figure 10. Minimum propagation delay versus contact resistance for 2000-μm-long global-level Cu and MWCNT interconnects.

However, it is worth noting that even without the size effect and fabrication challenges at smaller nodes, the contact resistance of $3.3 \mathrm{k}\mathsf{\Omega }$ will be scaled up by 4 times from the 14 nm node to the 7 nm node. This is, at the 7 nm technology node, the contact resistance will increase to $13.2 \mathrm{k}\mathsf{\Omega }$, which is already larger than the maximum tolerable contact resistance. In reality, the contact resistance scales up more drastically as the technology node goes down, which means more fabrication efforts need to be pursued such that an MWCNT interconnect can be able to outperform its Cu counterpart. In addition, the signal needs to go through back-end-of-line (BEOL) multilevel interconnect levels, from the top-level interconnect to the bottom-level buffer. After careful calculation, it is found that the resistance induced by multilevel interconnect levels is much smaller than the maximum tolerable contact resistance of the MWCNT interconnects [2]. Consequently, the conclusion of this study would not change even if the parasitic effects of these multilevel interconnect levels are taken into account.

5. Conclusions

In this study, closed-form expressions were presented for extracting the optimized size and number of repeaters in MWCNT interconnects. The contact resistance and the inductive effects were considered. It was demonstrated that neglecting the contact resistance would lead to significant error. To provide superior performance over the Cu wire, it is critical to reduce the contact resistance for the real-world applications of MWCNT interconnects. In particular, more fabrication efforts need to be pursued to reduce the contact resistance at more advanced technology nodes.