# Multi-Functional Isolated Three-Port Bidirectional DC/DC Converter for Photovoltaic Systems

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Circuit Architecture and Operational Principles

_{PV}) can be stepped up to a DC bus (V

_{H}400 V) for supplying the DC load and charging the battery at the same time, and the battery (V

_{Bat}) also can be stepped up to the DC bus. In addition, the DC bus can also be stepped down to charge the battery. This topology includes switches S

_{1}–S

_{6}, a transformer, an inductor (L), and capacitors C

_{1}–C

_{3}. The structure of this circuit is simple, and only one set of complementary signals is needed for control in different operating modes. It has leakage inductance recovery to reduce energy consumption, and it has four operating stages to achieve multiple operating functions under various conditions.

_{PV}) to the high-voltage side (V

_{H}) of the DC bus; stage two stepped down the output of the PV (V

_{PV}) to charge the battery; stage three stepped up the battery output (V

_{B}) to the high-voltage side (V

_{H}); and stage four stepped down the high-voltage side (V

_{H}) to charge the battery.

- (1)
- Capacitors C
_{PV}, C_{Bat}, and C_{1}–C_{3}are large enough to keep the output voltage as a constant voltage source. - (2)
- Switches S
_{1}–S_{6}are ideal components. - (3)
- The inductor current is operated in a continuous conduction mode (CCM).
- (4)
- The switching period is T; the time when the switch turns on is DT, and the time when the switch turns off is (1-D)T.

#### 2.1. Stage One: PV Output Is Stepped Up to the High-Voltage Side (V_{H}) of the DC Bus

- (1)
- Mode 1 [t0–t1]

_{k}and capacitor C

_{1}store energy through the parasitic capacitance of switch S3. The parasitic capacitance of switch S4 and magnetizing inductance L

_{m}transmit energy to the secondary side through the transformer. The energy of capacitor C

_{2}is transferred to the V

_{H}and charges capacitor C

_{3}at the same time. This mode ends when switch S4 is turned on.

- (2)
- Mode 2 [t1–t2]

_{PV}) stores energy in leakage inductance L

_{k}and magnetizing inductance L

_{m}and transfers the energy to the secondary side through the transformer for charging capacitor C

_{2}. Capacitor C

_{3}releases energy to the V

_{H}through the body diode of switch S5 and the secondary side of the transformer. Mode 2 ends when switch S4 is turned off.

- (3)
- Mode 3 [t2–t3]

_{m}, the transformer, the parasitic capacitance of switch S4, and capacitor C

_{1}, and stores energy in capacitor C

_{2}through the body diode of switch S5. Capacitor C

_{3}releases energy to the V

_{H}through the body diode of switch S5 and the secondary side of the transformer. Mode 3 ends when switch S3 is turned on.

- (4)
- Mode 4 [t3–t4]

_{k}releases energy to the transformer and capacitor C

_{1}, and the secondary side of the transformer stores energy in capacitor C

_{3}through the body diode of switch S6. Capacitor C

_{2}releases energy to the V

_{H}through the body diode of switch S6 and the secondary side of the transformer. When the energy of leakage inductance L

_{k}drops to zero, mode 4 ends.

- (5)
- Mode 5 [t4–t5]

_{m}and capacitor C

_{1}release energy to the transformer, and the secondary side of the transformer stores energy in capacitor C

_{3}through the body diode of switch S6. Capacitor C

_{2}releases energy to the V

_{H}through the body diode of the switch and the secondary side of the transformer. Mode 5 ends when switch S3 is turned off.

#### 2.2. Stage Two: PV Output Is Stepped Down to Charge the Battery

- (1)
- Mode 1 [t0–t1]

_{Bat}) through switch S1. Mode 1 ends when switch S1 is turned off.

- (2)
- Mode 2 [t1–t2]

_{PV}stores energy in inductor L, and the energy of inductor L charges the battery at the same time. Mode 2 ends when switch S2 is turned off.

#### 2.3. Stage Three: Battery Output Is Stepped Up to the V_{H} of the DC Bus

- (1)
- Mode 1 [t0–t1]

_{k}and the parasitic capacitance of switch S3 release energy to capacitor C

_{1}, capacitor C

_{2}stores energy through the secondary side of the transformer, and capacitor C

_{3}releases energy to the V

_{H}through the secondary side of the transformer. Mode 1 ends when switches S1 and S3 are turned on.

- (2)
- Mode 2 [t0–t1]

_{Bat}) stores energy in inductor L, and leakage inductance L

_{k}releases energy to capacitor C

_{1}to recover the leakage inductance energy. Magnetizing inductance L

_{m}stores energy in capacitor C

_{3}through the secondary side of the transformer, and capacitor C

_{2}releases energy to the V

_{H}through the body diode of switch S6 and the secondary side of the transformer. Mode 2 ends when the energy of leakage inductance L

_{k}is zero.

- (3)
- Mode 3 [t2–t3]

_{k}and capacitor C

_{1}release energy to magnetizing inductance L

_{m}and transfer it to the secondary side of the transformer. The remaining operating states are the same as in the previous mode. Mode 3 ends when switches S1 and S3 are turned off.

- (4)
- Mode 4 [t3–t4]

_{m}releases energy to capacitor C

_{3}through the secondary side of the transformer and the body diode of switch S6, and capacitor C

_{2}releases energy to the V

_{H}through the body diode of switch S6 and the secondary side of the transformer. Mode 4 ends when switches S2 and S4 are turned on.

- (5)
- Mode 5 [t4–t5]

_{Bat}and inductor L release energy to the transformer and store energy in magnetizing inductor L

_{m}. The secondary side of the transformer transfers energy to capacitor C

_{2}through the body diode of switch S5, and capacitor C

_{3}releases energy to the V

_{H}through the body diode of switch S5 and the secondary side of the transformer. Mode 5 ends when switches S2 and S4 are turned off.

#### 2.4. Stage Four: The High-Voltage Side (V_{H}) Is Stepped Down to Charge the Battery

- (1)
- Mode 1 [t0–t1]

_{2}releases energy to parasitic capacitor C

_{S5}of switch S5, while parasitic capacitor C

_{S6}of switch S6 releases energy to capacitor C

_{3}. Leakage inductance L

_{k}transfers energy to parasitic capacitance C

_{S2}of switch S2 and the input capacitance (C

_{PV}) of the PV terminal through the body diode of switch S4. Mode 1 ends when switches S1, S3, and S6 are turned on.

- (2)
- Mode 2 [t0–t1]

_{H}transfers energy to capacitor C

_{2}and the secondary side of the transformer, while capacitor C

_{3}also transfers energy to the primary side through the secondary side of the transformer. Leakage inductance L

_{k}releases energy to capacitor C

_{1}for leakage inductance recovery, magnetizing inductance L

_{m}stores energy through the primary side of the transformer while capacitor C

_{PV}transfers energy to parasitic capacitor C

_{S4}of switch S4, and inductor L releases energy to the battery terminal V

_{Bat}. Mode 2 ends when the energy of leakage inductance L

_{k}is zero.

- (3)
- Mode 3 [t2–t3]

_{k}and capacitor C

_{1}release energy to magnetizing inductance L

_{m}. The other operating state is the same as in the previous Mode. Mode 3 ends when switches S1, S3, and S6 are turned off.

- (4)
- Mode 4 [t3–t4]

_{S6}of switch S6, parasitic capacitor C

_{S5}of switch S5 transfers energy to capacitor C

_{2}, parasitic capacitor C

_{S4}of switch S4 transfers energy to capacitor C

_{PV}, capacitor C

_{1}releases energy to parasitic capacitance C

_{S3}of switch S3, and inductor L releases energy to the battery terminal V

_{Bat}through the body diode of switch S1. Mode 4 ends when switches S2, S4, and S5 are turned on.

- (5)
- Mode 5 [t4–t5]

_{2}is charged by the transformer, capacitor C

_{3}transfers energy through the secondary side to the primary side of the transformer, and inductor L stores energy through magnetizing inductor L

_{m}and capacitor C

_{PV}. Mode 5 ends when the current in magnetizing inductance L

_{m}is greater than that of leakage inductance L

_{k}.

- (6)
- Mode 6 [t5–t6]

_{2}transfers energy to the primary side through the secondary side of the transformer, the V

_{H}stores energy in capacitor C

_{3}and at the same time transfers energy to the primary side through the secondary side of the transformer, and inductor L stores energy through magnetizing inductor L

_{m}, capacitor C

_{PV}, and the primary side of the transformer. Mode 6 ends when switches S2, S4, and S5 are turned off.

## 3. Steady-State Analysis

#### 3.1. Voltage Gain Analysis

- (1)
- Stage One

_{PH}is stepped up to the V

_{H}when switch S3 is turned on and switch S4 is turned off, and the body diode of switch S5 is reverse biased. According to Kirchhoff’s voltage law, the voltage across magnetizing inductance Lm is as follows:

_{on}can be derived as follows when switch S3 is turned on:

_{m}, and the voltage across the inductance is:

_{PV}and V

_{C3}can be obtained as:

_{H}/V

_{PV}) of stage one can be obtained, as shown in Figure 11. Among them, the turns ratio n and duty cycle D used in this paper were 4 and 0.33, respectively; therefore, the voltage gain (V

_{H}/V

_{PV}) was 12.12.

- (2)
- Stage Two

_{PH}is stepped down to charge the battery V

_{bat}. When switch S1 is turned on, the voltage across inductor L is:

_{on}can be derived as follows when switch S1 is turned on:

_{Bat}/V

_{PV}) of stage two can be obtained, as shown in Figure 12. In this stage, duty cycle D was designed to be 0.5, and the voltage gain (V

_{Bat}/V

_{PV}) was 0.5.

- (3)
- Stage Three

_{bat}is stepped up to the V

_{H}. When switches S1 and S3 are turned on, the voltages of inductance L and magnetizing inductance Lm can be obtained by Kirchhoff’s voltage law, respectively:

_{m}with time can be calculated as follows:

_{m}is:

_{m}with time is:

_{Bat}and V

_{L}can be obtained as:

_{H}/V

_{Bat}) of stage three can be obtained, as shown in Figure 13. Among them, the turns ratio n and duty cycle D designed in this paper were 4 and 0.5, respectively; therefore, the voltage gain (V

_{H}/V

_{Bat}) was 16.6.

- (4)
- Stage Four

_{H}is stepped down to charge the V

_{bat}. When switches S1, S3, and S6 are turned on, the voltages of inductance L and magnetizing inductance L

_{m}can be obtained from Kirchhoff’s voltage law:

_{m}with time can be calculated as:

_{m}is:

_{m}with time is:

_{C2}and V

_{H}can be obtained as:

_{Bat}/V

_{H}) of stage four can be obtained, as shown in Figure 14. Among them, the turns ratio n and duty cycle D designed in this paper were 4 and 0.5, respectively; therefore, the voltage gain (V

_{Bat}/V

_{H}) was 0.0625. It could be seen that the voltage gain (V

_{Bat}/V

_{H}) could be increased by reducing duty cycle D or increasing turns ratio n.

#### 3.2. Voltage Stress Analysis

_{PV}is V

_{PV}.

_{Bat}is V

_{Bat}.

_{2}is:

_{3}is:

#### 3.3. Magnetic Component Design

_{m}.

- (1)
- Design of Inductor L

_{Lmax}and i

_{Lmin}) can be expressed as follows when switch S1 is turned on and off:

_{Bat}) is equal to the output power (P

_{H}):

_{H}with output resistance R

_{H}on the high-voltage side, the equation can be simplified as follows:

_{L}is always greater than zero. If the converter operates in the boundary conduction mode (BCM), i

_{L(min)}is equal to zero. Therefore, the boundary value between the continuous and discontinuous inductor current is expressed as:

_{(BCM)}can be obtained by substituting switching frequency f and simplifying the equation:

_{(BCM)}, the converter will operate in CCM; conversely, when the value of inductance L is lower than L

_{(BCM)}, it will operate in DCM.

- (2)
- Design of Magnetizing Inductance (L
_{m})

_{Lm(max}) and i

_{Lm(min)}) can be expressed as follows when switch S4 is turned on and off:

_{H}with output resistance R

_{H}on the high-voltage side, the equation can be simplified as follows:

_{Lm(min)}is equal to zero. Therefore:

_{m}and the duty ratio D. The proposed converter operates in CCM when the value of magnetizing inductance L

_{m}is greater than${L}_{m\left(BCM\right)}$; conversely, when the value of magnetizing inductance Lm is lower than ${L}_{m\left(BCM\right)}$, it will operate in DCM.

## 4. Experimental Results

_{bat}was 24 V, and the V

_{H}was 400 V.

_{gs3}, v

_{ds3}, and i

_{ds3}of switch S3. It can be seen that when switch S3 was turned on, i

_{ds3}started to rise from a negative to a positive current, leakage inductance current i

_{Lk}was released by switch S3, and the leakage inductance is recovered. Figure 18b shows the measured waveforms (v

_{gs4}, v

_{ds4}, and i

_{ds4}) of switch S4. It can be seen that magnetizing inductance L

_{m}stored energy through switch S4. Figure 18c shows the measured waveforms v

_{gs4}, v

_{ds5}, and i

_{ds5}. In this stage, in order to avoid circuit malfunctions caused by an unbalanced magnetic flux on the secondary side, the current flowed through the body diode of switch S5. Figure 18d shows the measured waveforms v

_{gs3}, v

_{ds6}, and i

_{ds6}. The current flowed through the body diodes of switch S6. Figure 18e shows the measured waveform v

_{gs3}, the primary-side current i

_{n1}, and the secondary-side current i

_{n2}of the transformer.

_{gs1}, v

_{ds1}, and i

_{ds1}) of switch S1. It can be seen that switch S1 had synchronous rectification characteristics in this stage. Figure 19b shows the measured waveforms (v

_{gs2}, v

_{ds2}, and i

_{ds2}) of switch S2. Figure 19c shows the measured waveforms of v

_{gs2}, v

_{ds2}, and i

_{L}. It can be seen that inductor L stored energy while switch S2 was turned on and released energy while switch S2 was turned off.

_{gs1}, v

_{ds1}, and i

_{ds1}of switch S1, and it can be seen that inductor L stored energy through switch S1. Figure 20b shows the measured waveforms (v

_{gs2}, v

_{ds2}, and i

_{ds2}) of switch S2. Figure 20c shows the measured waveforms (v

_{gs3}, v

_{ds3}, and i

_{ds3}) of switch S3. When switch S3 was turned on, current i

_{ds3}started to turn from a negative current to a positive current, and leakage inductance current i

_{Lk}was released and recovered energy through switch S3. Figure 20d shows the measured waveforms (v

_{gs4}, v

_{ds4}, and i

_{ds4}) of switch S4. Figure 20e shows the measured waveforms v

_{gs4}, v

_{ds5}, and i

_{ds5}. Figure 20f is the measured waveforms v

_{gs3}, v

_{ds6}, and i

_{ds6}. In this mode, the energy flowed through the body diode of switch S6. Figure 20g shows the measured waveform v

_{gs1}, inductor current i

_{L}, and the transformer primary-side current i

_{n1}. Figure 20h shows the measured waveform v

_{gs1}, the transformer primary-side current i

_{n1}, and the transformer secondary-side current i

_{n2}.

_{gs1}, v

_{ds1}, and i

_{ds1}) of switch S1. It can be seen that inductor L released energy through switch S1 at this time. Figure 21b shows the measured waveforms (v

_{gs2}, v

_{ds2}, and i

_{ds2}) of switch S2. It can be seen that inductor L stored energy through switch S2. Figure 21c shows the measured waveforms (v

_{gs3}, v

_{ds3}, and i

_{ds3}) of switch S3. Current i

_{ds3}started to rise from positive to negative, and the leakage inductance current i

_{Lk}released and recovered energy through switch S3. The energy was transferred to the magnetizing inductance L

_{m}. Figure 21d shows the measured waveforms (v

_{gs4}, v

_{ds4}, and i

_{ds4}) of switch S4. Figure 21e shows the measured waveforms (v

_{gs5}, v

_{ds5}, and i

_{ds5}) of switch S5. Figure 21f shows the measured waveforms (v

_{gs6}, v

_{ds6}, and i

_{ds6}) of switch S6. Figure 21g shows the measured waveforms v

_{gs1}, the transformer primary-side current i

_{n1}, and the transformer secondary-side current i

_{n2}.

_{H}/V

_{Bat}) was stable and not greatly affected by load changes.

## 5. Conclusions

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

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**Figure 2.**Proposed three-port bidirectional converter: (

**a**) circuit architecture; (

**b**) operating current direction of the proposed converter.

**Figure 4.**Operating equivalent circuits of stage one: (

**a**) mode 1; (

**b**) mode 2; (

**c**) mode 3; (

**d**) mode 4; and (

**e**) mode 5.

**Figure 8.**Operating equivalent circuits of stage three: (

**a**) mode 1; (

**b**) mode 2; (

**c**) mode 3; (

**d**) mode 4; and (

**e**) mode 5.

**Figure 10.**Equivalent circuit diagrams of stage four: (

**a**) mode 1; (

**b**) mode 2; (

**c**) mode 3; (

**d**) mode 4; (

**e**) mode 5; and (

**f**) mode 6.

**Figure 18.**Measured waveforms of stage one: (

**a**) v

_{gs3}, v

_{ds3}, and i

_{ds3}; (

**b**) v

_{gs4}, v

_{ds4}, and i

_{ds4}; (

**c**) v

_{gs4}, v

_{ds5}, and i

_{ds5}; (

**d**) v

_{gs3}, v

_{ds6}, and i

_{ds6}; and (

**e**) v

_{gs3}, i

_{n1}, and i

_{n2}.

**Figure 19.**Measured waveforms of stage two: (

**a**) v

_{gs1}, v

_{ds1}, and i

_{ds}

_{1}; (

**b**) v

_{gs2}, v

_{ds2}, and i

_{ds}

_{2}; (

**c**) v

_{gs2}, v

_{ds2}, and i

_{L}.

**Figure 20.**Measured waveforms of stage three: (

**a**) v

_{gs1}, v

_{ds1}, and i

_{ds1}; (

**b**) v

_{gs2}, v

_{ds2}, and i

_{ds2}; (

**c**) v

_{gs3}, v

_{ds3}, and i

_{ds3}; (

**d**) v

_{gs4}, v

_{ds4}, and i

_{ds4}; (

**e**) v

_{gs4}, v

_{ds5}, and i

_{ds5}; (

**f**) v

_{gs3}, v

_{ds6}, and i

_{ds6}; (

**g**) v

_{gs1}, i

_{L}, and i

_{n1}; (

**h**) v

_{gs1}, i

_{n1}, and i

_{n2}.

**Figure 21.**Measured waveforms of stage four: (

**a**) v

_{gs1}, v

_{ds1}, and i

_{ds1}; (

**b**) v

_{gs2}, v

_{ds2}, and i

_{ds2}; (

**c**) v

_{gs3}, v

_{ds3}, and i

_{ds3}; (

**d**) v

_{gs4}, v

_{ds4}, and i

_{ds4}; (

**e**) v

_{gs5}, v

_{ds5}, and i

_{ds5}; (

**f**) v

_{gs6}, v

_{ds6}, and i

_{ds6}; and (

**g**) v

_{gs1}, i

_{n1}, and i

_{n2}.

**Figure 22.**Step variation of the output load of the proposed topology: (

**a**) step-up mode; (

**b**) step-down mode.

**Figure 23.**Efficiency curve of the proposed converter: (

**a**) stage one; (

**b**) stage two; (

**c**) stage three; (

**d**) stage four.

Parameter | Specification | |
---|---|---|

Input PV voltage V_{PV} | 48 V | |

Battery voltage V_{Bat} | 24 V | |

High-side voltgae V_{H} | 400 V | |

Maximus output battery power | 500 W | |

Maximus output load bus power | 500 W | |

Switching frequency fs | 40 kHz | |

Component | Model | Specification |

S_{1}, S_{2}, S_{3} and S_{4} | IRFP4568PbF | 150 V/171 A |

S_{5} and S_{6} | IXFH60N50P3 | 500 V/60 A |

C_{1} | Electroytic Capacitor | 50 μF/100 V |

C_{2} and C_{3} | Electroytic Capacitor | 330 μF/450 V |

L | MPP Ring Core | 40 μH |

Lm | MPP Ring Core | 170 μH |

Item/Ref. | [15] | [16] | [17] | [18] | [19] | Proposed Converter |
---|---|---|---|---|---|---|

Voltage of input/battery/output (V) | 48/40/400 | 30/48/400 | 30/24/400 | 24/24/200 | 24/48/400 | 48/24/400 |

Rated power | 200 W | 150 W | 200 W | 500 W | 300W | 500 W |

MOSFETs | 3 | 4 | 3 | 4 | 3 | 6 |

Diodes | 7 | 6 | 3 | 3 | 5 | 0 |

Capacitors | 4 | 5 | 8 | 4 | 6 | 5 |

Magnetic elements | 2 | 2 | 4 | 2 | 2 | 2 |

Efficiency of step-up mode | 92.9% | 95.3% | 95.5% | 95.3% | 94% | 94.5% |

Voltage gain of step-up mode PV-DC bus | $\frac{1+N}{1-D}$ | $\frac{1+N}{1-D}$ | $\frac{N}{1-D}$ | $\frac{N}{1-D}$ | $\frac{1+N}{1-D}$ | $\frac{N}{\left(1-D\right)D}$ |

Voltage gain of step-down mode DC bus-Battery | $\frac{1-D}{1+N}$ | D | $\frac{1-D}{N}$ | $\frac{1-D}{N}$ | $\frac{1-D}{1+N}$ | $\frac{\left(1-D\right)D}{N}$ |

Switching frequency | 100 kHz | 50 kHz | 100 kHz | 50 kHz | 50 kHz | 40 kHz |

Isolated | NO | NO | Yes | Yes | NO | Yes |

Operational mode | 3 | 4 | 3 | 3 | 3 | 4 |

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## Share and Cite

**MDPI and ACS Style**

Wu, Y.-E.; Hong, R.-R.
Multi-Functional Isolated Three-Port Bidirectional DC/DC Converter for Photovoltaic Systems. *Sustainability* **2022**, *14*, 11169.
https://doi.org/10.3390/su141811169

**AMA Style**

Wu Y-E, Hong R-R.
Multi-Functional Isolated Three-Port Bidirectional DC/DC Converter for Photovoltaic Systems. *Sustainability*. 2022; 14(18):11169.
https://doi.org/10.3390/su141811169

**Chicago/Turabian Style**

Wu, Yu-En, and Rui-Ru Hong.
2022. "Multi-Functional Isolated Three-Port Bidirectional DC/DC Converter for Photovoltaic Systems" *Sustainability* 14, no. 18: 11169.
https://doi.org/10.3390/su141811169