Correction: Liu et al. Junction Temperature Control of a Traction Inverter Based on Three-Level Active Neutral Point-Clamping. Energies 2025, 18, 2241

Haitao Liu ^1,2, Sen Wang ², Liang Hu ², Ling Feng ^2,* and Yue Wang ²

Author Contributions: Methodology, H.L. and L.F.; software, H.L.; validation, S.W. and L.H.; formal analysis, S.W., L.H. and Y.W.; data curation, L.F.; supervision, Y.W. All authors have read and agreed to the published version of the manuscript.

(1) There was a mistake in the original publication. The mistake lies in the incorrect description of the redundant zero voltage vector in the ANPC.

A correction has been made to the third paragraph of Section 2 (Mathematical Model and Synchronous SVPWM):

In the ANPC three-level topology, each phase bridge arm consists of six power devices, theoretically allowing for 64 possible switching states per phase. However, to ensure the safe operation of the inverter, certain switching combinations must be avoided. Specifically, configurations that result in half-bus or full-bus conduction pose a significant risk, as they can lead to short-circuit conditions or expose devices to voltages exceeding their rated limits. To mitigate these risks, only six permissible switching state combinations are used. For an output voltage of zero, six distinct switching states are available: OU1, OU2, OL1, and OL2. The conduction status of the power devices corresponding to each switching state is detailed in Table 1. These selected states ensure safe and reliable inverter operation while maintaining the necessary output voltage characteristics.

(2) There was a mistake in the original publication. The mistake lies in wrongly expounding the converter mode of ANPC.

A correction has been made to the second to fourth paragraphs of Section 3 (Proposed Active Thermal Control Method):

In Operation Mode I, switching occurs between vectors P1 and OL1 during the positive half-cycle and between vectors N1 and OU2 during the negative half-cycle. In this mode, switches S_x5 (x = a, b, c) and S_x6 operate at a high switching frequency, while switches S_x1, S_x2, S_x3, and S_x4 operate at a lower frequency. As a result, the primary switching losses are concentrated on S_x5 and S_x6.

In Operation Mode II, switching occurs between vectors P and OU2 during the positive half-cycle and between vectors N and OL2 during the negative half-cycle. This configuration ensures that current commutation takes place within a single module, reducing the impact of stray currents. In this mode, switches S_x5 and S_x6 operate at the fundamental frequency, while the remaining switches operate at a higher frequency. Notably, switches S_x2 and S_x3 are switched at a higher frequency than S_x1 and S_x4, which helps to balance the losses across the six switching devices in each phase.

In Operation Mode III, switching occurs between vectors P1 and OU1 during the positive half-cycle and between N1 and OL1 during the negative half-cycle. In this mode, the majority of the commutation losses are concentrated within the high-frequency unit modules S_x1, S_x2, S_x3, and S_x4. Meanwhile, switches S_x5 and S_x6 operate at the industrial frequency only during voltage commutation, effectively avoiding current commutation between different unit modules. This reduces the detrimental effects of parasitic inductance on switching speed. The theoretical loss distribution for this commutation path is more balanced, resulting in improved thermal characteristics compared to the larger commutation loops found in other modes.

In the original publication [1], there is an error in the published Table 1. There is an error of a duplicate definition in the current list of switch states. The corrected Table 1 is as follows:

In the original publication [1], there was a mistake in Figure 14 as published. A lower-power experiment result is incorrect, instead the traction converter should be used. The corrected Figure 14 and the description has been updated as below.

The NP voltage control experiments presented in Figure 14 further validate the control performance of the proposed loss equalization strategy. This indicates that the introduction of junction temperature equalization constraints does not interfere with the balancing of the NP voltage. Furthermore, the NP voltage can be well-balanced under full speed conditions.

The authors realized that several important recently published studies need to be supplemented to further improve the diversity supporting the circulation pathways. These newly added studies are highly relevant to this research, which can more comprehensively reflect the latest progress in the field and enhance the academic rigor of the paper.

Two newly cited references were added on fourth paragraph of Section 2 (Mathematical Model and Synchronous SVPWM):

As illustrated in Figure 2, the synchronous space vector pulse-width modulation (SVPWM) method partitions the space vector plane into six sectors (I–VI), and each sector is divided into six smaller sectors (1–6). To ensure symmetry in the output voltage waveforms, the reference vectors are uniformly distributed within each sector. The distribution of reference vectors in Sector I is depicted in Figure 3 [27,28]. In this scheme, N represents the total number of reference vectors within each sector. When N is odd, the n-th reference vector aligns with the boundary between adjacent sectors, while the remaining reference vectors are positioned entirely within the sector. Conversely, when NNN is even, all reference vectors are confined within the sector. The angular spacing between consecutive reference vectors is consistently maintained at π/(3N), ensuring uniform modulation and high-quality output voltage.

The newly added references appear below:

The authors state that the scientific conclusions are unaffected. This correction was approved by the Academic Editor. The original publication has also been updated.