#
Capacitor Voltage Balancing of a Grid-Tied, Cascaded Multilevel Converter with Binary Asymmetric Voltage Levels Using an Optimal One-Step-Ahead Switching-State Combination Approach^{ †}

^{1}

^{2}

^{*}

^{†}

## Abstract

**:**

## 1. Introduction

#### Research Contribution and Scope

## 2. Asymmetric Cascaded Multilevel Converter Basics

#### 2.1. Switching-States

#### 2.2. Nearest-Level Control

## 3. Weighted Total Harmonic Distortion of Higher Level NLC Waveform in Comparison to Three-Level PWM

## 4. Current Control and Voltage Balancing of the Asymmetric Cascaded Multilevel Converter

#### 4.1. Current Control Using a Proportional-Resonant Controller

#### 4.2. Capacitor Voltage Balancing Using a One-Time-Step Model Predictive Control Approach

#### 4.3. Sensorless Capacitor Voltage Balancing Using a Dynamic Programming Approach

## 5. Stability of the Sensorless, Dynamic Programming Approach

## 6. Measurements

#### 6.1. Capacitor Precharging

#### 6.2. Operation in Grid-Feeding Mode

## 7. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## References

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**Figure 1.**Grid-connected, single-phase asymmetric MLC arrangement, using an NPC module as main stage and n series-connected H-bridges, with charging resistor ${R}_{\mathrm{charging}}$.

**Figure 2.**Desired, modulated reference voltage waveform ${v}_{\mathrm{out}}^{\prime},\mathrm{ref}$ using nearest-level control for a 17-level converter and a modulation index $M=0.95$.

**Figure 3.**Weighted THD $WTHD$ relative to the modulation index M when using NLC, computed for 17, 33, and 65 output voltage levels, and three-level PWM for different carrier frequency ratios ${m}_{\mathrm{f}}$.

**Figure 5.**Vector diagram of controlled current ${I}_{\mathrm{AC}}$ relative to converter voltage ${V}_{\mathrm{out}}$ and grid voltage ${V}_{\mathrm{AC}}$ when operating converter in grid-feeding mode without capacitor voltage sensing.

**Figure 6.**Switching-state sequence generation: (

**a**) simulated capacitor voltage oscillations using the suggested one-time-step MPC approach for one discrete output voltage level and (

**b**) generated switching-state sequence for one electrical period.

**Figure 7.**(

**a**) Converter modules and grid filter. (

**b**) Actual laboratory arrangement of the 33-level, grid-tied asymmetric MLC.

**Figure 8.**Measured charging of H-bridges’ capacitors during converter startup using additional charging resistance ${R}_{\mathrm{charging}}=80\mathsf{\Omega}$ (

**a**), with sensing and (

**b**) without sensing of the capacitor voltages.

**Figure 9.**Measured operation of 33-level asymmetric MLC, controlling a grid current of ${\widehat{I}}_{\mathrm{AC}}=10\mathrm{A}$, (

**a**) with and (

**b**) without sensing of the capacitor voltages.

**Figure 10.**Harmonic components of measured voltage and current waveforms given in Figure 9, (

**a**) with and (

**b**) without sensing of the capacitor voltages.

**Table 1.**Switching-state combinations for ${v}_{\mathrm{out}}=\frac{{V}_{\mathrm{DC}}}{{2}^{4}}$ and $n=4$, which gives $m=5$ possible combinations.

${\mathit{S}}_{\mathbf{NPC}}\left(\right)open="("\; close=")">\frac{{\mathit{V}}_{\mathbf{DC}}}{{2}^{0}}$ | ${\mathit{S}}_{\mathbf{HB}1}\left(\right)open="("\; close=")">\frac{{\mathit{V}}_{\mathbf{DC}}}{{2}^{1}}$ | ${\mathit{S}}_{\mathbf{HB}2}\left(\right)open="("\; close=")">\frac{{\mathit{V}}_{\mathbf{DC}}}{{2}^{2}}$ | ${\mathit{S}}_{\mathbf{HB}3}\left(\right)open="("\; close=")">\frac{{\mathit{V}}_{\mathbf{DC}}}{{2}^{3}}$ | ${\mathit{S}}_{\mathbf{HB}4}\left(\right)open="("\; close=")">\frac{{\mathit{V}}_{\mathbf{DC}}}{{2}^{4}}$ |
---|---|---|---|---|

1 | −1 | −1 | −1 | −1 |

0 | 1 | −1 | −1 | −1 |

0 | 0 | 1 | −1 | −1 |

0 | 0 | 0 | 1 | −1 |

0 | 0 | 0 | 0 | 1 |

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**MDPI and ACS Style**

Kuder, M.; Kersten, A.; Marques-Lopez, J.-L.; Estaller, J.; Buberger, J.; Schwitzgebel, F.; Thiringer, T.; Lesnicar, A.; Marquardt, R.; Weyh, T.;
et al. Capacitor Voltage Balancing of a Grid-Tied, Cascaded Multilevel Converter with Binary Asymmetric Voltage Levels Using an Optimal One-Step-Ahead Switching-State Combination Approach. *Energies* **2022**, *15*, 575.
https://doi.org/10.3390/en15020575

**AMA Style**

Kuder M, Kersten A, Marques-Lopez J-L, Estaller J, Buberger J, Schwitzgebel F, Thiringer T, Lesnicar A, Marquardt R, Weyh T,
et al. Capacitor Voltage Balancing of a Grid-Tied, Cascaded Multilevel Converter with Binary Asymmetric Voltage Levels Using an Optimal One-Step-Ahead Switching-State Combination Approach. *Energies*. 2022; 15(2):575.
https://doi.org/10.3390/en15020575

**Chicago/Turabian Style**

Kuder, Manuel, Anton Kersten, Jose-Luis Marques-Lopez, Julian Estaller, Johannes Buberger, Florian Schwitzgebel, Torbjörn Thiringer, Anton Lesnicar, Rainer Marquardt, Thomas Weyh,
and et al. 2022. "Capacitor Voltage Balancing of a Grid-Tied, Cascaded Multilevel Converter with Binary Asymmetric Voltage Levels Using an Optimal One-Step-Ahead Switching-State Combination Approach" *Energies* 15, no. 2: 575.
https://doi.org/10.3390/en15020575