Miniature DC-DC Boost Converter for Driving Display Panel of Notebook Computer

Abstract

This paper proposes a miniature DC-DC boost converter to drive the display panel of a notebook computer. To reduce the size of the circuit, the converter was designed to operate at a switching frequency of 1 MHz. The power conversion efficiency improved using a passive snubber circuit that consisted of one inductor, two capacitors, and two diodes; it reduced the switching losses by lowering the voltage stress of the switch and increased the voltage gain using charge pumping operations. An experimental converter was fabricated at 2.5 cm × 1 cm size using small components, and tested at input voltage 5 V ≤ V_IN ≤ 17.5 V and output current 30 mA ≤ I_O ≤ 150 mA. Compared to existing boost converters, the proposed converter had ~7.8% higher power conversion efficiency over the entire range of V_IN and I_O, only ~50% as much voltage stress of the switch and diodes, and a much lower switch temperature T_SW = 49.5 °C. These results indicate that the proposed converter is a strong candidate for driving the display panel of a notebook computer.

1. Introduction

Notebook or tablet computers are powered by a Li ion battery pack [1,2,3,4]. Typically, the battery pack is composed of 2–4 Li ion battery cells. Each Li ion cell has a terminal voltage of 2.6–4.2 V depending on the charging state, so the voltage of the battery pack changes in the range of 5–17 V [5,6,7]. To supply power to each part of the computer, the pack voltage is converted to several voltages by DC-DC converters.

Many computers use a light-emitting diode (LED) backlight unit (BLU) for the liquid crystal display (LCD) panel. For a 17 inch panel, the voltage required to drive the LED backlight can be as high as 40 V [8]. The DC-DC boost converter for the LED BLU in a notebook or tablet computer should have a circuit topology that can reduce the overall size and weight [9,10,11,12,13,14,15,16]. The conventional boost converter (Figure 1) has the simplest structure, and can be implemented in small sizes by operating at a high switching frequency f_S. However, the switching loss increases as f_S increases, and thereby decreases the power conversion efficiency η_e and can cause overheating of the switch. This problem has been solved using soft-switching converters [17,18,19,20,21].

Soft-switching converters [17,18,19,20,21] use active snubbers to reduce switching loss. These snubbers are implemented using an auxiliary switch, diodes, and energy storage elements. The auxiliary switch requires a separate gate drive circuit that is controlled by a sophisticated algorithm. The snubber of Reference [17] discharges the drain-source capacitor C_DS of the main switch before the switch turns on, so zero-voltage (ZV) turn-on of the switch is possible. The snubbers of References [18,19] force the switch current to zero before the switch turns off, so zero-current (ZC) turn-off of the switch is possible. The snubber of Reference [20] achieves ZV turn-off of the switch by reducing the rate of voltage increase during the turn-off transient, and achieves ZC turn-on of the switch by reducing the rate of current increase during the turn-on transient. However, the converters of References [17,18,19,20] have some limitations when they operate at high f_S; they use a resonance between an inductor (L) and a capacitor (C) in the active snubber, the inductance L of L should be small enough to achieve ZV or ZC switching in a short time; the current peak of the switch or diodes increases as L decreases, therefore, this change increases the conduction loss and reduces the maximum output power. In the converter of Reference [21], the capacitance C_DS discharges through L of the snubber when the auxiliary switch turns on. The ZV turning on of the main switch is achieved by discharging C_DS completely. The L required to achieve the ZV turning on of the switch decreases as f_S increases; as a consequence, the switching loss in the auxiliary switch increases. Therefore, simultaneous reduction of switching losses in the main and auxiliary switches is very difficult at high f_S. The converter of Reference [9] uses a passive snubber to reduce the switching loss. The switching loss is reduced by lowering the turn-on slope of the switch current; the inductor L_S that is connected in series with the switch controls the turn-on slope. However, the energy stored in L_S is released as a voltage spike because the current path of L_S is blocked when the switch is turned off. To ensure that this voltage spike does not exceed the maximum voltage limit of the switch, L_S should be less than 50 nH at high switching frequencies; This value of L_S was calculated using Equation (9) of the design guide in Reference [9]. The low value of the chip type inductor has a low maximum current limit. This low inductance also causes undesired resonance due to the parasitic inductance or capacitance of the circuit. Because of this, the converter of Reference [9] is difficult to use at high switching frequencies. Additionally, the switch current significantly increases the conduction loss in L_S because the components of small size have non-negligible series resistance.

To improve upon the aforementioned drawbacks in the existing converters, this paper proposes a miniature DC-DC boost converter for the display panel of a notebook computer. The proposed converter (Figure 2) uses a passive snubber to reduce the switching loss; the capacitor C₂ is connected in parallel with the switch, and the inductor L₁ is connected in series with C₂, and the value of L₁ and C₂ are large enough to prevent resonance at high f_S. This lowers V_SW to V_O-V_C1 and eliminates the switching loss. In addition, L₁ is placed apart from the main current path to reduce the conduction loss in the passive snubber. The switch operates under a hard-switching condition to achieve fast switching, but the switching loss is reduced by lowering V_SW (Figure 3). The switching loss P_SW is calculated using the waveforms of i_SW and V_SW as:

$$P_{sw}=\frac{1}{T_s}{\displaystyle {\int }_{t_0}^{t_2}{V}_{sw}(t)i_{sw}(t)}dt+\frac{1}{T_s}{\displaystyle {\int }_{t_3}^{t_5}{V}_{sw}(t)i_{sw}(t)}dt$$

Compared with the conventional converter, the proposed converter has a similar current peak, but has V_SW(t₁) and V_SW(t₄) lowered by ~1/2, so P_SW is reduced.

The proposed converter has a higher voltage conversion ratio than the conventional boost converter, and therefore has a wide range of output voltage for a given range of input voltage. Section 2 describes the circuit structure and operating principle of the proposed converter, Section 3 gives the design guidelines, Section 4 shows the experimental results, and Section 5 concludes the paper.

2. Circuit Structure and Operating Principles of the Proposed Converter

The proposed converter consists of two capacitors C₁ and C₂, two diodes D₁ and D₂, and an inductor L₁, in addition to the conventional boost components L_b, D_O, C_O, and a switch (SW). C₁ is located between boost inductor L_b and output diode D_O, and acts as a charge pump capacitor to increase the voltage gain. L₁ and C₂ reduce the voltage stress of SW by dividing the output voltage V_O. D₁ and D₂ provide a charging or discharging path for C_2.

The operating modes (Figure 4) and key waveforms (Figure 5) of the proposed converter include three sequential modes of operation.

Mode 1 (t₀~t₁): The first operation (Figure 4a) starts at t = t₀ by turning ON SW. During this operation, D₂ turns ON, and D₁ and D_O turn OFF. $v_{Lb}=V_{IN}$ and $v_{L1}=V_{C2}-V_{C1}$, so

$$i_{Lb}(t)=\frac{V_{IN}}{L_b}(t-t_0)+i_{Lb}(t_0)$$

(1)

$$i_{L1}(t)=i_{C1}(t)=-i_{C2}(t)=\frac{V_{C2}-V_{C1}}{L_1}(t-t_0)$$

(2)

C₁ is charged and C₂ is discharged when SW is turned ON. Mode 1 ends when SW is turned OFF.

Mode 2 (t₁~t₂): The second operation (Figure 4b) starts at t = t₁ when SW turns OFF. During mode 2, D₂ stays ON, and D₁ and D_O are turned ON. When SW is turned OFF, the anode voltage of D₁ is V_C2 because V_Lb = V_C2 − V_IN according to the voltage second valance law. The cathode voltage of D₁ is V_C2 − ΔV_C2 because C₂ was discharged in Mode 1, so D₁ is turned ON. After D₁ is turned ON, the anode voltage of D_O is V_C1 + V_C2 and cathode voltage is V_O − ΔV_O because C_O was discharged in Mode 1. Therefore, D_O is turned ON because V_C1 + V_C2 = V_O in steady state. In the same manner, after D₁ and D_O are turned ON, D₂ is turned ON because the anode voltage of D₂ is V_C1 + V_C2 and the cathode voltage is V_O − ΔV_O. $v_{Lb}=V_{IN}-V_{C2}$ and $v_{L1}=-V_{C1}$, so

$$i_{Lb}(t)=\frac{V_{IN}-V_{C2}}{L_b}(t-t_1)+i_{Lb}(t_1),i_{L1}(t)=-\frac{V_{C1}}{L_1}(t-t_1)+i_{L1}(t_1).$$

The voltage stress of SW is V_C2 because D₁ is turned ON when SW is turned OFF. The output voltage V_O is divided into V_C1 and V_C2, so the voltage stress of SW is smaller than V_O, which is the voltage stress of the conventional boost converter.

Mode 3 (t₂~t₃): The last operation (Figure 4c) starts at t = t₂ when D₂ turns OFF. D₁ and D_O stay ON during this mode. $v_{Lb}=V_{IN}-V_{C2}$, so

$$i_{Lb}(t)=\frac{V_{IN}-V_{C2}}{L_b}(t-t_1)+i_{Lb}(t_1)$$

In this mode, $v_{L1}=0$ because i_L1 = 0. Mode 3 ends when SW is turned ON for the next switching cycle.

The voltage–second balance law of inductances L_b and L₁ yields

$$V_{IN}D+(V_{IN}-V_{C2})(1-D)=0$$

(3)

$$(V_{C2}-V_{C1})D-V_{C1}(1-D-\alpha )=0$$

(4)

where D is the duty of switching and αT_S is the duration of Mode 3. Solving Equations (3) and (4) for V_C1 and V_C2 yields

$$V_{C2}=\frac{V_{IN}}{1-D},V_{C1}=\frac{D}{1-\alpha }\frac{V_{IN}}{1-D}.$$

(5)

Equation (5) and $V_O=V_{C1}+V_{C2}$ then give the voltage conversion ratio as

$$\frac{V_O}{V_{IN}}=\frac{1}{1-D}\frac{1-\alpha +D}{1-\alpha }$$

(6)

The average current of L₁, I_L1 for one switching period T_S is equal to the average output current I_O, so

$$I_O=\frac{V_{C2}-V_{C1}}{2L_1}{D}^2{T}_S+\frac{V_{C1}}{2L_1}{(1-D-\alpha )}^2{T}_S$$

(7)

Inserting Equation (5) into Equation (7) and solving for α yields

$$\alpha =\frac{(V_{IN}D{T}_S-2I_O{L}_1)(1-D)}{V_{IN}D{T}_S}$$

(8)

Combining Equations (6) and (8) yields the output voltage

$$V_O=\frac{2V_{IN}(V_{IN}{D}^2{T}_S+I_O{L}_1(1-D))}{(1-D)(V_{IN}{D}^2{T}_S+2I_O{L}_1(1-D))}$$

(9)

V_O versus D (Figure 6) for L₁ = 10 μH, f_S = 1 MHz, I_O = 150 mA, V_IN = 5 V, and 0.1 ≤ D ≤ 0.9 was calculated using Equation (9) for the proposed converter, but the conventional boost converter was calculated using their voltage gain equations. To have V_O = 40 V for given V_IN, D = 0.775 was applied to the proposed converter, whereas D = 0.875 was applied to the conventional boost converter. At given V_IN and D, the proposed converter had higher V_O than the conventional boost converters.

3. Design Guideline

3.1. Boost Inductor L_b

The inductance L_b of L_b should be determined so that the proposed converter operates in a continuous conduction mode (CCM). The current through L_b is minimum at t₀ and maximum at t₁. The following equation is obtained using the average of i_Lb and Equation (1),

$$i_{Lb}(t_1)-i_{Lb}(t_0)=\frac{V_{IN}D{T}_S}{L_b},i_{Lb}(t_1)+i_{Lb}(t_0)=2I_{IN}.$$

(10)

Solving Equation (10) for i_Lb(t₀) yields

$$i_{Lb}(t_0)=I_{IN}-\frac{V_{IN}D{T}_S}{2L_b}$$

The condition i_Lb(t₀) > 0 should be satisfied to operate the proposed converter in CCM. This condition yields

$$L_b>\frac{V_{IN}D{T}_S}{2I_{IN}}$$

(11)

For 5 ≤ V_IN ≤ 17.5 V, V_O = 40 V, f_S = 1 MHz, and 30 ≤ I_O ≤ 150 mA, L_b = 33 µH was determined using Equations (9) and (11).

3.2. Snubber Inductor L₁

A small value of L₁ causes a drastic current decrease of D₂ in mode 2. Therefore, the limit of L₁ is calculated using the following condition for a soft turn-off of D₂.

$$\frac{V_{C1}}{L_1}<<\frac{I_{D2,\max }}{t_{D2,fall}}$$

where I_D2,max is the highest diode current and t_fall is the diode turn-off time; L₁ ≫ 0.2 μH for I_D2,max = 1 A and t_fall = 10 ns. The diode turn-off loss increases as L₁ decreases, so L₁ = 10 µH was chosen to provide an operating margin and to reduce turn-off loss of D₂.

3.3. Snubber Capacitors C₁ and C₂

The capacitance of C₁ is determined by the condition that $\Delta V_{C1}<<V_{C1}$ because V_C1 should be almost constant for one switching period T_S, where $\Delta V_{C1}$ is the voltage ripple of C₁. During Mode 1, C₁ charges through L₁; this results in a voltage ripple $\Delta V_{C1}$ of C₁; $\Delta V_{C1}=(V_{C2}-V_{C1}){(D{T}_S)}^2/(2C_1{L}_1)$ because the current through C₁ decreases linearly from 0 A at t₀ to $(V_{C2}-V_{C1})D{T}_S/L_1$ at t₁.

Therefore,

$$C_1>>\frac{V_{C2}-V_{C1}}{2V_{C1}{L}_1}{(D{T}_S)}^2.$$

(12)

For V_IN = 5 V, V_O = 40 V, f_S = 1 MHz, and L₁ = 10 µH, C₁ = 1 µF was determined using Equations (5) and (12). C₂ has been chosen to be the same as C₁ because $\Delta V_{C1}=\Delta V_{C2}$ and i_C1 = −i_C2 in Mode 1.

4. Experimental Results

The proposed boost converter (Figure 7) was designed to operate at V_IN = 5 V, V_O = 40 V, 30 ≤ I_O ≤ 150 mA, and f_S = 1 MHz. The inductances were set at L_b = 33 µH and L₁ = 10 µH. Capacitances C₁ and C₂ were both set at 1 µF. The experimental circuit was implemented using the following miniature components (

Table 1. Component values for the experimental boost converters.

Components	Conventional Boost Converter	Proposed Converter
Lb	33 μH (450 mΩ)	33 μH (450 mΩ)
L1	-	10 μH (150 mΩ)
C1	-	1 μH (12.5 mΩ)
C2	-	1 μH (12.5 mΩ)
CO	4.7 μF (10 mΩ)	4.7 μF (10 mΩ)
D1	-	RB160M-60TR
D2	-	RB160M-60TR
DO	RB160M-60TR	RB160M-60TR
Driver IC (SW)	TPS55340 (Ron = 0.1 Ω)	TPS55340 (Ron = 0.1 Ω)

): TPS55340 DC-DC controller (Texas Instruments Inc., Dallas, TX, USA), which has an internal n-MOS switch (40 V, 5A), RB160M-60TR diodes (Rohm Co.), IFSC-1515AH-01 (Vishay Inc.) and SSMC252008R47SC (SST Inc.) chip inductors, and multilayer ceramic chip capacitors of a size 3.2 mm × 1.6 mm. The chip inductors and capacitors have series resistances given in the parentheses. To ensure a fair comparison, the conventional boost converter used the same components.

The TPS55340 regulates the output voltage with current mode PWM control, and has an internal oscillator. The pulse width modulation of the gate pulse V_g is achieved in the control circuit for the proposed converter (Figure 8) as follows; each clock pulse resets the flip-flop and the ramp generator, which sets V_g to the ‘high’ state; the output V_c of the error amplifier increases as V_O increases; the comparator output changes from ‘low’ to ‘high’ when the output voltage of the ramp generator exceeds V_c, which changes the inverter output V_g to the ‘low’ state. When the output current I_O increases/decreases abruptly, V_O decreases/increases instantly, which increases/decreases V_c. Thus, the pulse width of V_g increases/decreases to keep V_O constant.

The voltage and current waveforms of SW (Figure 9) were measured at V_IN = 5 V, V_O = 40 V, I_O = 150 mA, and f_S = 1 MHz. The voltage stress of the proposed converter (Figure 9a) was lower than that of the conventional boost converter (Figure 9b) because the voltage stress was $V_O-V_C{}_1$ in the proposed converter but V_O in the conventional boost converter. The current stresses of the proposed converter and the conventional boost converter were similar. The current waveforms of the diodes are shown in Figure 10. The diodes current stresses of the proposed converter was lower than the conventional boost converter. The time-averaged values <i_D1>, <i_D2>, and <i_Do> were all equal to I_O.

The curves of η_e on I_O (Figure 11a) were measured at 30 ≤ I_O ≤ 150 mA, V_IN = 5 V, V_O = 40 V, f_S = 1 MHz. At I_O = 30 mA, η_e was 84.0% for the proposed converter and 76.9% for the conventional boost converter. At I_O = 150 mA, η_e was 80.4% for the proposed converter and 72.6% for the conventional boost converter. The curves of η_e on V_IN (Figure 11b) were measured at 5 ≤ V_IN ≤ 17.5 V, I_O = 150 mA, V_O = 40 V, f_S = 1 MHz; η_e at V_IN = 17.5 V was 89.1% for the proposed converter and 88.6% for the conventional boost converter. The η_e of the proposed converter was up to 7.8% higher than the conventional boost converter at V_IN = 5 V. The proposed converter had a high η_e over the entire input voltage and output current ranges.

The temperatures of SW and inductors (Figure 12) were measured for 30 min using a digital temperature recorder (GL-220, GRAPHTEC), while the converters were operated at V_IN = 5 V, V_O = 40 V, f_S = 1 MHz, and I_O = 150 mA. In the conventional boost converter the switch stabilized at 86.6 °C and the inductor stabilized at 91.7 °C, but in the proposed converter, the switch stabilized at 49.5 °C and the inductor stabilized at 62.9 °C. These data indicate that the proposed converter generated less heat loss than the conventional boost converter.

The circuit losses were calculated using a circuit simulator at V_O = 40 V, I_O = 150 mA, f_s = 1 MHz, and V_IN = 5 V (Figure 13a) and 15 V (Figure 13b). The total power losses were 1.59 W (proposed) and 2.31 W (conventional) at V_IN = 5 V, and they were 0.68 W (proposed) and 0.78 W (conventional) at V_IN = 15 V. These results show that the proposed converter had lower power loss than the conventional boost converter at both V_IN = 5 V and 15 V. The losses in the switch were 0.65 W (proposed) and 1.41 W (conventional) at V_IN = 5 V, and they were 0.38 W (proposed) and 0.63 W (conventional) at V_IN = 15 V. The proposed converter reduced the switching loss by decreasing V_SW. Additionally, the snubber loss of the proposed converter was 0.16 W at V_IN = 5 V, and it was 0.15 W at V_IN = 15 V. The proposed converter reduced the snubber losses by placing L₁ at the output stage and eliminating the resonant current in the snubber circuit.

The voltage and current stress (

Table 2. Voltage and current stresses of components in the experimental boost converters.

	Components	Conventional Boost Converter	Proposed Converter
Peak voltage stress (V)	SW	45.1	24.9
	DO	53.5	27.7
	D1	-	27.3
	D2	-	26.0
Peak voltage stress (A)	SW	1.72	1.87
	DO	1.78	0.90
	D1	-	0.96
	D2	-	0.32

) of the proposed and conventional boost converter were measured at V_IN = 5 V, V_O = 40 V, I_O = 150 mA, and f_S = 1 MHz. Without parasitic components, the voltage stress of SW and diodes were as follows: (1) in the conventional boost converter, $V_{SW}=V_O$ because D_O was turned ON when SW was turned OFF, and $V_{Do}=V_O$ because SW was turned ON when D_O was turned OFF; (2) in the proposed converter, $V_{SW}=V_O-V_C{}_1$ because D_O, D₁, and D₂ were turned ON when SW was turned OFF, $V_{Do}=V_{D1}=V_O-V_C{}_1$ because SW was turned ON when D_O and D₁ are turned OFF, and $V_{D2}=V_O-V_C{}_2$ because D₁ and D_O were turned ON, and SW was turned OFF when D₂ was turned OFF. The proposed converter had lower voltage stress of SW and diodes than the conventional boost converter because $V_O=V_{C1}+V_{C2}$. The current stress of SW was similar in the conventional boost converter and the proposed converter. The current stresses of diodes were lower by half in the proposed converter than in the conventional boost converter.

The voltage stress, current stress, voltage gain, and efficiency of the existing boost converter were calculated using a circuit simulator at V_IN = 5 V, V_O = 40 V, I_O = 150 mA, and f_s = 1 MHz (

Table 3. Comparison with existing boost converters.

		Conventional	Proposed	Converter of Reference [12]	Converter of Reference [21]
Number of Components	SW	1	1	1	2
	Inductor	1	2	2	2
	Capacitor	1	3	3	2
	Diode	1	3	3	3
Switch Stress	Voltage stress (V)	45.1	24.9	45.2	SW1 42.2
					SW2 42.8
	Current stress (A)	1.72	1.87	2.92	SW1 2.42
					SW2 2.64
Duty		0.875	0.775	0.831	0.82 (main SW)
Efficiency (%)		72.6	80.4	75.1	76.6

). The efficiency η_e was 72.6% for the conventional boost converter, 80.4% for the proposed converter, 75.1% for the converter of Reference [12], and 76.6% for the converter of Reference [21]. The proposed converter had the highest η_e for given input and output conditions. The converters of References [12,21] had a lower efficiency than that of the proposed converter due to a high current stress and the loss of auxiliary switch, respectively. The voltage stress of the proposed converter was lower than that of the other converters because the voltage stress is V_O-V_C1 in the proposed converter but V_O in the other converters. The current stresses of the proposed converter and the conventional boost converter were similar, but the converter of Reference [12] had a high current stress because it used resonance to reduce the switching loss at high frequency. At given V_IN and V_O, the proposed converter had the smallest duty, so the proposed converter had the highest voltage gain.

5. Conclusions

A miniature DC-DC boost converter for driving a display panel of a notebook computer was proposed. This converter operates at a switching frequency of 1 MHz to miniaturize the circuit. The switching loss is reduced by using a passive snubber that lowers the voltage stresses of the switch. The conduction losses of the snubber and switch is also minimized by preventing high peak current due to the resonance at high f_S. The experimental converter was fabricated in 2.5 cm × 1 cm size and tested at 5 ≤ V_IN ≤ 17.5 V, 30 ≤ I_O ≤ 150 mA. Compared to previous boost converters, the proposed converter had a higher voltage conversion ratio, ~7.8% higher power conversion efficiency over the entire range of V_IN and I_O, ~1/2 as much voltage stress of the switch and diodes, and a much lower switch temperature. The results indicate that the proposed converter is a strong candidate for driving the display panel of a notebook computer.