Search Results (25)

This paper proposes relaxed Simultaneous Signal and Noise Matching (SSNM) conditions to address limitations in selecting source degeneration inductors for multistage LNA design, achieved by introducing controlled mismatches at the external ports. Additionally, a novel frequency-bounded mismatch envelope is introduced to guide load termination selection based on desired IM-OM (input mismatch-output mismatch) characteristics across the operating band. Building on these concepts, a systematic, easy-to-follow strategy is presented for implementing wideband multistage low-noise amplifiers (LNAs), significantly reducing reliance on blind CAD-based optimisation. This approach is validated through a three-stage MMIC LNA prototype, fabricated using a 0.15 μm GaAs process and operating from 28 to 34 GHz. The measured results closely match the simulation, demonstrating a stable gain of 23 ± 1 dB and a noise figure of 2–2.5 dB, confirming the practical effectiveness of the proposed design approach for wideband amplifiers. Full article

This paper presents a wideband low-power/low-voltage 60-GHz low-noise amplifier (LNA) in a 28-nm bulk CMOS technology. The LNA has been designed for high-speed millimeter-wave (mm-wave) communications. It consists of two pseudo-differential amplifying stages and a buffer stage included for 50-Ohm on-wafer measurements. Two integrated input/output baluns guarantee both simultaneous 50-ohm input–noise/output matching at input/output radio frequency (RF) pads. A power-efficient design strategy is adopted to make the LNA suitable for low-power applications, while minimizing the noise figure (NF). Thanks to the adopted design strategy, the post-layout simulation results show an excellent trade-off between power gain and 3-dB bandwidth (BW_3dB) with 13.5 dB and 7 GHz centered at 60 GHz, respectively. The proposed LNA consumes only 11.6 mA from a 0.9-V supply voltage with an NF of 8.4 dB at 60 GHz, including the input transformer loss. The input 1 dB compression point (IP_1dB) of −15 dBm at 60 GHz confirms the first-rate linearity of the proposed amplifier. Human body model (HBM) electrostatic discharge (ESD) protection is guaranteed up to 2 kV at the RF input/output pads thanks to the input/output integrated transformers. Full article

This paper presents a 17–38 GHz wideband low-noise amplifier (LNA) designed in a 150-nm GaAs pHEMT process. The proposed amplifier adopts a cascode topology with an interstage inductor between the common-source (CS) and common-gate (CG) stages, and a series inductor at the source node of the CS stage for source degeneration. By incorporating these inductors in the amplification stage, simultaneous noise and input matching is facilitated, while achieving flat gain characteristics over a broad frequency range and ensuring stability. In addition, the amplification stage with inductors achieves input matching using only a shunt component in the DC bias path, without any series matching elements. This approach allows the amplifier to achieve simultaneous noise and input matching (SNIM), ensuring low-noise performance over a wide bandwidth. The simulation results show a flat gain of 20–23 dB and a low noise figure of 1.1–2.1 dB over the 17–38 GHz band. Full article

This paper presents an ultra-wideband low-noise amplifier (LNA) with a new cross-coupling noise-canceling technique for 28 nm CMOS technology. The entire LNA contains two stages. The first stage employs inductively coupled Gm-boosted technology, while the second stage is a novel asymmetric cross-coupling noise-canceling structure (ACCNCS). Through the introduction of these two key techniques, the LNA achieves balanced performance across a relative bandwidth of 56%. Input/output/inter-stage impedance matching uses a transformer-based network with series-parallel combinations of inductors and capacitors. The LNA is designed in a 28 nm CMOS process with a chip core area of 335 × 665 µm². The operating frequency range is 26–46 GHz. Post-layout simulation results show that the peak gain of the LNA is 12.6 dB, and the noise figure is between 2.9 and 4.2 dB across the wideband range. At a center frequency of 36 GHz with a supply voltage (V_DD) of 0.9 V, the input 1 dB compression point (IP_1dB) is −7.6 dBm, while the power consumption is 22 mW. Full article

This paper presents the design analysis of a low-power wideband single-ended CMOS low-noise amplifier (LNA). The proposed topology is based on a modified current- reuse circuit, in which two-stage common-source (CS) amplifiers consume the same DC current and are isolated from each other by large MIMCAPs, which results in good performance with low power consumption. The proposed circuit achieves a bandwidth of 2.5 GHz, suitable for several wireless communication standards such as GSM, WLAN, and Bluetooth. In the first stage, a current-reuse circuit with shunt feedback is used to satisfy input impedance matching and signal amplification with minimal noise injection. A common source (CS) with a source follower circuit forms the second stage to improve the noise figure (NF), harmonic distortion, and output impedance matching. The proposed LNA is designed in 65 nm CMOS technology and covers a frequency range of 0.17–2.68 GHz. The proposed LNA achieves a maximum gain of 17.24 dB, a minimum NF of 2.67 dB, a maximum IIP3 of −14.9 dBm, and input and output return losses of less than −10 dB. The power consumption of the proposed LNA is 3.52 mW from a 1 V power supply, and the core area is 0.3 mm². Full article

A three-stage low-noise amplifier (LNA) operating over the 6–18 GHz frequency range is designed and implemented, featuring a flat noise figure (NF) and enhanced output 1 dB compression point (OP_1dB). To improve linearity and minimize distortion, a power high-electron-mobility transistor (HEMT) is employed in the final stage. Additionally, resistive feedback and self-biasing techniques are integrated to extend the amplifier’s bandwidth. The proposed LNA exhibits a high and flat power gain of 25 ± 1 dB, with an input return loss of more than 10 dB. The measured NF remains stable at 2.6 ± 0.3 dB over the 6–18 GHz range. Furthermore, the OP_1dB exceeds 19.5 dBm across the entire 3 dB gain bandwidth (BW). The circuit is fabricated using a 0.15 μm GaAs pHEMT process, occupying a compact chip area of 1.2 × 1.8 mm². Full article

The deployment of fifth-generation (5G) and beyond-5G wireless communication systems necessitates advanced transceiver architectures to support high data rates, spectrum efficiency, and energy-efficient designs. This paper presents a highly adaptive reconfigurable receiver front-end (HARRF) designed for 5G and satellite applications, integrating a switchable low noise amplifier (LNA) and a single pole double throw (SPDT) switch. The HARRF architecture supports both X-band (8–12 GHz) and K/Ka-band (23–28 GHz) operations, enabling seamless adaptation between radar, satellite communication, and millimeter-wave (mmWave) 5G applications. The proposed receiver front-end employs a 0.15 μ$\mathrm{m}$ pseudomorphic high electron mobility transistor (pHEMT) process, optimised through a three-stage cascaded LNA topology. A switched-tuned matching network is utilised to achieve reconfigurability between X-band and K/Ka-band. Performance evaluations indicate that the X-band LNA achieves a gain of 23–27 dB with a noise figure below 7 dB, whereas the K/Ka-band LNA provides 23–27 dB gain with a noise figure ranging from 2.3–2.6 dB. The SPDT switch exhibits low insertion loss and high isolation, ensuring minimal signal degradation across operational bands. Network analysis and scattering parameter extractions were conducted using advanced design system (ADS) simulations, demonstrating superior return loss, power efficiency, and impedance matching. Comparative analysis with state-of-the-art designs shows that the proposed HARRF outperforms existing solutions in terms of reconfigurability, stability, and wideband operation. The results validate the feasibility of the proposed reconfigurable RF front-end in enabling efficient spectrum utilisation and energy-efficient transceiver systems for next-generation communication networks. Full article

Future communication, 5G, medical, and IoT systems need compact, green, efficient wideband sensors, and antennas. Novel linear and dual-polarized antennas for 5G, 6G, medical devices, Internet of Things (IoT) systems, and healthcare monitoring sensors are presented in this paper. One of the major goals in the evaluation of medical, 5G, and smart wireless communication devices is the development of efficient, compact, low-cost antennas and sensors. Moreover, passive and active sensors may be self-powered by connecting an energy-harvesting unit to the antenna to collect electromagnetic radiation and charge the wearable sensor battery. Wearable sensors and antennas can be employed in smart grid applications that provide communication between neighbors, localized management, bidirectional power transfer, and effective demand response. A low-cost wearable antenna may be developed by etching the printed feed and matching the network on the same substrate in the printed antenna. Active modules may be placed on the same dielectric board. The antenna design parameters and a comparison between the computation and measured electrical performance of the antennas are presented in this paper. The electrical characteristics of the new compact antennas in the vicinity of the patient’s body were simulated by using electromagnetic simulation techniques. Fractal and metamaterial efficient antennas and sensors were evaluated to maximize the electrical characteristics of smart communication and medical devices. The dual- and circularly polarized antennas developed in this paper are crucial to the evaluation of wideband and multiband compact 5G, 6G, and IoT advanced systems. The new efficient sensors and antennas maximize the system’s dynamic range and electrical characteristics. The new efficient wearable antennas and sensors are compact, wideband, and low-cost. The operating resonant frequency of the metamaterial antennas with circular split-ring resonators (CSRRs) may be 5% to 9% lower than the resonant frequency of the sensor without CSRRs. The directivity and gain of the metamaterial fractal antennas with CSRRs may be up to 3 dB higher than the antennas without CSRRs. The directivity and gain of the metamaterial fractal passive sensors with CSRRs may be up to 8.5 dBi. This study presents new wideband active meta-fractal antennas and sensors. The bandwidth of the new sensors is around 9% to 20%. At 2.83 GHz, the receiving active sensor gain is 13.5 dB and drops to 8 dB at 3.2 GHz. The receiving module noise figure with TAV541 LNA is around 1dB. Full article

This paper presents a highly integrated C-band RF transceiver front-end design consisting of two Single Pole Double Throw (SPDT) transmit/receive (T/R) switches, a Low Noise Amplifier (LNA), and a Power Amplifier (PA) for Ultra-Wideband (UWB) positioning system applications. When fabricated using a 0.25 μm GaAs pseudomorphic high electron mobility transistor (pHEMT) process, the switch is optimized for system isolation and stability using inductive resonance techniques. The transceiver front-end achieves overall bandwidth expansion as well as the flat noise in receive mode using the bandwidth expansion technique. The results show that the front-end modules (FEM) have a typical gain of 22 dB in transmit mode, 18 dB in receive mode, and 2 dB noise in the 4.5–8 GHz band, with a chip area of 1.56 × 1.46 mm². Based on the available literature, it is known that the proposed circuit is the most highly integrated C-band RF transceiver front-end design for UWB applications in the same process. Full article

This paper presents the design of a low-noise amplifier (LNA) with a bypass mode for the n77/79 bands in 5G New Radio (NR). The proposed LNA integrates internal matching networks for both input and output, combining two LNAs for the n77 and n79 bands into a single chip. Additionally, a bypass mode is integrated to accommodate the flexible operation of the receiving system in response to varying input signal levels. For each frequency band, we designed a low-noise amplifier for the n77 band to expand the bandwidth to 900 MHz (3.3 GHz to 4.2 GHz) using resistive–capacitance (RC) feedback and series inductive-peaking techniques. For the n79 band, only the RC feedback technique was employed to optimize the performance of the LNA for its 600 MHz bandwidth (4.4 GHz to 5.0 GHz). Because wideband techniques can lead to a trade-off between gain and noise, causing potential degradation in noise performance, appropriate bandwidth design becomes crucial. The designed n77 band low-noise amplifier achieved a simulated gain of 22.6 dB and a noise figure of 1.7 dB. Similarly, the n79 band exhibited a gain of 21.1 dB and a noise figure of 1.5 dB with a current consumption of 10 mA at a 1.2 supply voltage. The bypass mode was designed with S₂₁ of −3.7 dB and −5.0 dB for n77 and n79, respectively. Full article

This paper proposes a low-noise amplifier (LNA) for terahertz communication systems. The amplifier is designed based on 90 nm InP high-electron-mobility transistor (HEMT) technology. In order to achieve high gain of LNA, the proposed amplifier adopts a five-stage amplification structure. At the same time, the use of staggered tuning technology has achieved a large bandwidth of terahertz low-noise amplification. In addition, capacitors are used for interstage isolation, sector lines are used for RF bypass, and Microstrip is used to design matching circuits. The entire LNA circuit was validated using accurate electromagnetic simulation. The simulation results show that at 140 GHz, the small signal gain is 25 dB, the noise figure is 4.4 dB, the input 1 dB compression point is −19 dBm, and the 3 dB bandwidth reaches 60 GHz (110–170 GHz), which validates the effectiveness of the design. Full article

In this work, the design of a wideband low-noise amplifier (LNA) using a resistive feedback network is proposed for potential multi-band sensing, communication, and radar applications. For achieving wide operational bandwidth and flat in-band characteristics simultaneously, the proposed LNA employs a variety of circuit design techniques, including a voltage–current (shunt–shunt) negative feedback configuration, inductive emitter degeneration, a main branch with an added cascode stage, and the shunt-peaking technique. The use of a feedback network and emitter degeneration provides broadened transfer characteristics for multi-octave coverage and a real impedance for input matching, respectively. In addition, the cascode stage pushes the band-limiting low-frequency pole, due to the Miller capacitance, to a higher frequency. Lastly, the shunt-peaking approach is optimized for the compensation of a gain reduction at higher frequency bands. The wideband LNA proposed in this study is fabricated using a commercial 0.13 μm silicon-germanium (SiGe) BiCMOS process, employing SiGe heterojunction bipolar transistors (HBTs) as the circuit’s core active elements in the main branch. The measurement results show an operational bandwidth of 2.0–29.2 GHz, a noise figure of 4.16 dB (below 26.5 GHz, which was the measurement limit), and a total power consumption of 23.1 mW under a supply voltage of 3.3 V. Regarding the nonlinearity associated with large-signal behavior, the proposed LNA exhibits an input 1-dB compression (IP1dB) point of −5.42 dBm at 12 GHz. These performance numbers confirm the strong viability of the proposed approach in comparison with other state-of-the-art designs. Full article

With the development of microelectronic technology, the integration of electronic systems is increasing continuously. Electronic systems are becoming more and more sensitive to external electromagnetic environments. Therefore, to improve the robustness of radio frequency (RF) microwave circuits, it is crucial to study the reliability of semiconductor devices. In this paper, the temporary failure mechanism of a gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) in a navigation low-noise amplifier (LNA) under the jamming of ultra-wideband (UWB) electromagnetic pulses (EMP) is investigated. The failure process and failure mechanism of pHEMT under UWB EMP are elaborated by analyzing the internal electric field, current density, and temperature distribution. In detail, as the amplitude of UWB EMP increases, the output current, carrier mobility, and transconductance of pHEMT decrease, eventually resulting in gain compression. The injection experiment on LNA, which effectively verified the failure mechanism, indicates that the gain of pHEMT is suppressed instantaneously under the jamming of UWB EMP and the navigation signal cannot be effectively amplified. When UWB EMP amplitude increases to nearly 10 V, the BeiDou Navigation Satellite System (BDS) carrier signal is suppressed by nearly 600 ns. Experimental results accord well with the simulation of our model. UWB EMP jamming is a new and efficient type of electromagnetic attack system based on the device saturation effect. The performance degradation and failure mechanism analysis contribute to RF reinforcement design. Full article

In this paper, an inductorless and gain-controllable 0.5~2.5 GHz wideband low noise amplifier (LNA) based on second generation current controlled current conveyors (CCCIIs) is presented. The proposed wideband LNA utilizes CCCIIs as building blocks to implement the amplifier stage and impedance matching stage. By varying the DC biasing current of the CCCII, the voltage gain of the proposed LNA is controllable in the range of 1~18 dB. In the frequency range of 0.5~2.5 GHz, the post-layout simulation results show that the proposed LNA has a typical voltage gain S21 of 12.6 dB with a gain ripple of ±1.5 dB, an input and output return loss (S11 and S22) of, respectively, −21.4 dB to −16.6 dB and −18.6 dB to −10.6 dB, and a high reverse isolation S12 of −65.2 dB to −39.5 dB. A noise figure of 4.05~4.35 dB is obtained across the whole band, and the input third-order intercept point (IIP3) is −2.5 dBm at 1.5 GHz. Using a 0.18 μm RF CMOS technology, the LNA occupies an active chip area of only 0.096 mm² with a power consumption of 12.0 mW. Full article

In this paper, a wide-band noise-canceling (NC) current conveyor (CC)-based CMOS low-noise amplifier (LNA) is presented. The circuit employs a CC-based approach to obtain wide-band input matching without the need for bulky inductances, allowing broadband performance with a very small area used. The NC technique is applied by subtracting the input transistor’s noise contribution to the output and achieves a noise figure (NF) reduction from 4.8 dB to 3.2 dB. The NC LNA is implemented in a UMC 65-nm CMOS process and occupies an area of only 160 × 80 μm². It achieves a stable frequency response from 0 to 6.2 GHz, a maximum gain of 15.3 dB, an input return loss (S11) < −10 dB, and a remarkable IIP3 of 7.6 dBm, while consuming 18.6 mW from a ±1.2 V DC supply. Comparisons with similar works prove the effectiveness of this new implementation, showing that the circuit obtains a noteworthy performance trade-off. Full article