Search Results (42)

In order to elucidate the market potential and competition strategies of various photovoltaic (PV) technologies in the context of future architectural trends, taking into account the aesthetic impact and evolving architectural styles, a suite of market assessment methodologies was proposed and applied to systematically evaluate five commercially available PV technologies. Three methodologies were employed or introduced: a comprehensive weighting approach that integrates the TOPSIS entropy weight method with user weight surveys, cumulative prospect theory (CPT), and a market integration method. The survey revealed that price emerged as the paramount factor distinguishing technologies, with a score of 4.8766, closely followed by conversion rates, at 4.8326. Aesthetics was deemed 3% more significant than government subsidies to consumers, scoring 4.4414. During the evaluation, technical indicators were translated into professional financial metrics. The results indicated that crystalline silicon PV technologies hold market advantages in both traditional and transparent applications. Monocrystalline silicon exhibited the highest utility in traditional settings, with a value of −0.0766, whereas polysilicon topped the charts in transparent applications, scoring −0.0676. However, when aesthetics was fully factored in, thin-film technologies began to outperform crystalline silicon, initially in transparent settings and subsequently in traditional ones. When both scenarios were merged, the market share of thin-film PVs increased with a rise in transparent applications, while that of crystalline silicon PVs decreased. Sensitivity and comparative analyses yielded diverse outcomes, validating the robustness of the findings. Further research unveiled that, beyond utility and cost, competition and technological factors also influence market shares, particularly when contemplating future shifts in architectural styles and innovations in product aesthetics. Considering the above, crystalline silicon PV can dominate the PVs in the building market due to their advantages of cost and efficiency, and thin-film PVs can increase their own market share with their aesthetic advantages in the future. Full article

The development of low-temperature piezoresistive materials provides compatibility with standard silicon-based MEMS fabrication processes. Additionally, it enables the use of such material in flexible substrates, thereby expanding the potential for various device applications. This work demonstrates, for the first time, the fabrication of a 200 nm polycrystalline silicon thin film through a metal-induced crystallization process mediated by an AlSiCu alloy at temperatures as low as 450 °C on top of silicon and polyimide (PI) substrates. The resulting polycrystalline film structure exhibits crystallites with a size of approximately 58 nm, forming polysilicon (poly-Si) grains with diameters between 1–3 µm for Si substrates and 3–7 µm for flexible PI substrates. The mechanical and electrical properties of the poly-Si were experimentally conducted using microfabricated test structures containing piezoresistors formed by poly-Si with different dimensions. The poly-Si material reveals a longitudinal gauge factor (GF) of 12.31 and a transversal GF of −4.90, evaluated using a four-point bending setup. Additionally, the material has a linear temperature coefficient of resistance (TCR) of −2471 ppm/°C. These results illustrate the potential of using this low-temperature film for pressure, force, or temperature sensors. The developed film also demonstrated sensitivity to light, indicating that the developed material can also be explored in photo-sensitive applications. Full article

Tunnel oxide passivating contact cells have become the mainstream form of high-performance photovoltaic cells; however, the key factor restricting the further improvement of tunnel oxide passivating contact cell performance lies in the deposition process technology of high-quality polysilicon films. The experimental optimization cost for the deposition of large-sized polysilicon films in low-pressure chemical vapor deposition reactors is enormous when conducted in the temperature range of 800–950 K; hence, the necessity to develop effective computer simulation models becomes urgent. In recent years, our research group has conducted two-dimensional simulation research on large-sized, low-pressure chemical vapor deposition. This article focuses on analyzing the influence of gas-phase chemical reactions on the contribution rate of polysilicon film deposition under a mixed atmosphere of H₂ and SiH₄. The findings indicate that when using SiH₄ as the precursor reactants with a gas pressure not exceeding 100 Pa, SiH₄ contributes more than 99.6% to the deposition of polysilicon films, while the contribution rate of intermediates from chemical reactions to film deposition is less than 0.5% with 860–900 K. The influence of temperature on the contribution rate of gas-phase intermediates is negligible. It is found that simulating complex multi-step chemical reactions is highly resource-intensive, making it difficult to achieve the three-dimensional simulations of large-sized tubular LPCVD reactors. Based on the in-depth analysis of the mechanism and simulation results, a simplified model neglecting the complex multi-step chemical reaction process has been proposed. Through employing this refined and simplified model, the two-dimensional simulation of the polysilicon thin films deposition process in the large-sized tubular low pressure chemical vapor deposition reactor will become more effective and resource efficient. Full article

Blue laser annealing can be used to obtain a high-mobility thin-film transistor (TFT) through a laser annealing (i.e., LTPS: low-temperature Poly-Si) process. However, the laser annealing process’s low productivity (as well as high cost) is an issue because the high output power of blue lasers still needs to be addressed. Therefore, productivity can be improved if blue laser energy is efficiently supplied during the laser annealing process using a continuous wave laser instead of a conventional pulsed excimer laser. We developed a blue laser light source (440 ± 10 nm) using the wavelength beam combining (WBC) method, which can achieve a laser power density of 73.7 kW/cm². In this semiconductor laser, when the power was increased s by 2.9 times, the laser scanning speed was increased by 5.0 times, achieving twice the productivity of conventional lasers. After laser annealing, the size of the crystal grains varied between 2 and 15 μm, resulting in a crystallization rate of 100% by Raman scattering rsult and low resistivity of 0.04 Ωcm. This increase in production capacity is not an arithmetic increase with increased power but a geometric production progression. Full article

In this study, we enhance the synaptic behavior of artificial synaptic transistors by utilizing nanowire (NW)-type polysilicon channel structures. The high surface-to-volume ratio of the NW channels enables efficient modulation of the channel conductance, which is interpreted as the synaptic weight. As a result, NW-type synaptic transistors exhibit a larger hysteresis window compared to film-type synaptic transistors, even within the same gate voltage sweeping range. Moreover, NW-type synaptic transistors demonstrate superior short-term facilitation and long-term memory transition compared with film-type ones, as evidenced by the measured paired-pulse facilitation and excitatory post-synaptic current characteristics at varying frequencies and pulse numbers. Additionally, we observed gradual potentiation/depression characteristics, making these artificial synapses applicable to artificial neural networks. Furthermore, the NW-type synaptic transistors exhibit improved Modified National Institute of Standards and Technology pattern recognition rate of 91.2%. In conclusion, NW structure channels are expected to be a promising technology for next-generation artificial intelligence (AI) semiconductors, and the integration of NW structure channels has significant potential to advance AI semiconductor technology. Full article

When AlN thin films are deposited directly on the high-resistance silicon (HR-Si) substrate, a conductive layer will be formed on the HR-Si surface. This phenomenon is called the parasitic surface conduction (PSC) effect. The presence of the PSC effect will increase the power consumption of electronic components. Therefore, it is necessary to reduce the PSC effect. In prior technology, the polysilicon layer is usually used as the trap-rich layer to reduce the PSC effect. Experiments show that compared to AlN films deposited directly on HR-Si, the AlN substrates with polysilicon introduced on HR-Si have less radio frequency (RF) loss. To verify the effect of polysilicon on RF loss, polysilicon films of three different thicknesses and several different roughnesses were introduced. The results show that the thickness of the polysilicon will affect the RF loss, while the roughness has almost no effect on it. The polysilicon trap-rich layer can reduce the RF loss, which gradually becomes smaller as the polysilicon thickness increases. Full article

This paper presents a simple method for the in situ determination of Young’s moduli of surface-micromachined bilayer thin films. The test structure consists of a cantilever, a bottom drive electrode located near the anchor, and a bottom contact electrode placed below the free end of the cantilever. The cantilever is driven by applying a voltage sweep between the cantilever and the drive electrode, and bends due to the electrostatic force. A novel theoretical model is derived to relate Young’s modulus with the applied voltage and structure dimensions. The theoretical model is validated by finite element simulation. Test structures for Au/polysilicon thin films are fabricated by the PolyMUMPsand tested with the current–voltage measurement system. The measured Young modulus of polysilicon ranges from 152.344 GPa to 154.752 GPa, and the measured Young modulus of Au ranges from 71.794 GPa to 74.880 GPa. Compared with existing extraction methods, the proposed method is featured with simple operation, good repeatability, relatively high precision, and low requirements for equipment. It can be used alongside the application of a process control monitor (PCM) in surface-micromachining process lines. Full article

Microelectromechanical systems (MEMS) are nowadays widespread in the sensor market, with several different applications. New production techniques and ever smaller device geometries require a continuous investigation of potential failure mechanisms in such devices. This work presents an experimental on-chip setup to assess the geometry- and material-dependent strength of stoppers adopted to limit the deformation of movable parts, using an electrostatically actuated device. A series of comb-finger and parallel plate capacitors are used to provide a rather large stroke to a shuttle, connected to the anchors through flexible springs. Upon application of a varying voltage, failure of stoppers of variable size is observed and confirmed by post-mortem $\mathsf{\Delta }C–V$ curves. The results of the experimental campaign are collected to infer the stochastic property of the strength of polycrystalline, columnar silicon films. Full article

Amorphous InGaZnO (a-InGaZnO) is currently the most prominent oxide semiconductor complement to low-temperature polysilicon for thin-film transistor (TFT) applications in next-generation displays. However, balancing the transmission performance and low-temperature deposition is the primary obstacle in the application of a-InGaZnO TFTs in the field of ultra-high resolution optoelectronic display. Here, we report that a-InGaZnO:O TFT prepared at room temperature has high transport performance, manipulating oxygen vacancy (V_O) defects through an oxygen-doped a-InGaZnO framework. The main electrical properties of a-InGaZnO:O TFTs included high field-effect mobility (µ_FE) of 28 cm²/V s, a threshold voltage (V_th) of 0.9 V, a subthreshold swing (SS) of 0.9 V/dec, and a current switching ratio (I_on/I_off) of 10⁷; significant improvements over a-InGaZnO TFTs without oxygen plasma. A possible reason for this is that appropriate oxygen plasma treatment and room temperature preparation technology jointly play a role in improving the electrical performance of a-InGaZnO TFTs, which could not only increase carrier concentration, but also reduce the channel-layer surface defects and interface trap density of a-InGaZnO TFTs. These provides a powerful way to synergistically boost the transport performance of oxide TFTs fabricated at room temperature. Full article

In this work, we present a method for growing highly c-axis oriented aluminum scandium nitride (AlScN) thin films on (100) silicon (Si), silicon dioxide (SiO₂) and epitaxial polysilicon (poly-Si) substrates using a substrate independent approach. The presented method offers great advantages in applications such as piezoelectric thin-film-based surface acoustic wave devices where a metallic seed layer cannot be used. The approach relies on a thin AlN layer to establish a wurtzite nucleation layer for the growth of w-AlScN films. Both AlScN thin film and seed layer AlN are prepared by DC reactive magnetron sputtering process where a Sc concentration of 27% is used throughout this study. The crystal quality of (0002) orientation of Al_0.73Sc_0.27N films on all three substrates is significantly improved by introducing a 20 nm AlN seed layer. Although AlN has a smaller capacitance than AlScN, limiting the charge stored on the electrode plates, the combined piezoelectric coefficient d_33,f with 500 nm AlScN is only slightly reduced by about 4.5% in the presence of the seed layer. Full article

Due to the untiring efforts of scientists and researchers on oxide semiconductor materials, processes, and devices, the applications for oxide-based thin film transistors (TFTs) have been researched and promoted on a large scale. With the advantages of relatively high carrier mobility, low off-current, good process compatibility, optical transparency, low cost, and especially flexibility, oxide-based TFTs have already been adapted for not only displays (e.g., liquid crystal display (LCD), organic light emitting diode (OLED), micro-light-emitting diode (Micro-LED), virtual reality/augmented reality (VR/AR) and electronic paper displays (EPD)) but also large-area electronics, analog circuits, and digital circuits. Furthermore, as the requirement of TFT technology increases, low temperature poly-silicon and oxide (LTPO) TFTs, which combine p-type LTPS and n-type oxide TFT on the same substrate, have drawn further interest for realizing the hybrid complementary metal oxide semiconductor (CMOS) circuit. This invited review provides the current progress on applications of oxide-based TFTs. Typical device configurations of TFTs are first described. Then, the strategies to apply oxide-based TFTs for improving the display quality with different compensation technologies and obtaining higher performance integrated circuits are highlighted. Finally, an outlook for the future development of oxide-based TFTs is given. Full article

In this study, the efficient fabrication of nickel silicide (NiSi_x) Schottky barrier thin-film transistors (SB-TFTs) via microwave annealing (MWA) technology is proposed, and complementary metal-oxide-semiconductor (CMOS) inverters are implemented in a simplified process using ambipolar transistor properties. To validate the efficacy of the NiSi_x formation process by MWA, NiSi_x is also prepared via the conventional rapid thermal annealing (RTA) process. The Rs of the MWA NiSi_x decreases with increasing microwave power, and becomes saturated at 600 W, thus showing lower resistance than the 500 °C RTA NiSi_x. Further, SB-diodes formed on n-type and p-type bulk silicon are found to have optimal rectification characteristics at 600 W microwave power, and exhibit superior characteristics to the RTA SB-diodes. Evaluation of the electrical properties of NiSi_x SB-TFTs on excimer-laser-annealed (ELA) poly-Si substrates indicates that the MWA NiSi_x junction exhibits better ambipolar operation and transistor performance, along with improved stability. Furthermore, CMOS inverters, constructed using the ambipolar SB-TFTs, exhibit better voltage transfer characteristics, voltage gains, and dynamic inverting behavior by incorporating the MWA NiSi_x source-and-drain (S/D) junctions. Therefore, MWA is an effective process for silicide formation, and ambipolar SB-TFTs using MWA NiSi_x junctions provide a promising future for CMOS technology. Full article

Low-hydrogen-containing amorphous silicon (a-Si) was deposited at a low temperature of 80 °C using a very high frequency (VHF at 162 MHz) plasma system with multi-split electrodes. Using the 162 MHz VHF plasma system, a high deposition rate of a-Si with a relatively high deposition uniformity of 6.7% could be obtained due to the formation of high-ion-density (>10¹¹ cm⁻³) plasma with SiH₄ and a lack of standing waves by using small multi-split electrodes. The increase in the radio frequency (RF) power decreased the hydrogen content in the deposited silicon film and, at a high RF power of 2000 W, a-Si with a low hydrogen content of 3.78% could be deposited without the need for a dehydrogenation process. The crystallization of the a-Si by ultraviolet (UV) irradiation showed that the a-Si can be crystallized with a crystallinity of 0.8 and a UV energy of 80 J without dehydrogenation. High-resolution transmission electron microscopy showed that the a-Si deposited by the VHF plasma was a very small nanocrystalline-like a-Si and the crystalline size significantly grew with the UV irradiation. We believe that the VHF (162 MHz) multi-split plasma system can be used for a low-cost low-temperature polysilicon (LTPS) process. Full article

Audio applications such as mobile phones, hearing aids, true wireless stereo earphones, and Internet of Things devices demand small size, high performance, and reduced cost. Microelectromechanical system (MEMS) capacitive microphones fulfill these requirements with improved reliability and specifications related to sensitivity, signal-to-noise ratio (SNR), distortion, and dynamic range when compared to their electret condenser microphone counterparts. We present the design and modeling of a semiconstrained polysilicon diaphragm with flexible springs that are simply supported under bias voltage with a center and eight peripheral protrusions extending from the backplate. The flexible springs attached to the diaphragm reduce the residual film stress effect more effectively compared to constrained diaphragms. The center and peripheral protrusions from the backplate further increase the effective area, linearity, and sensitivity of the diaphragm when the diaphragm engages with these protrusions under an applied bias voltage. Finite element modeling approaches have been implemented to estimate deflection, compliance, and resonance. We report an 85% increase in the effective area of the diaphragm in this configuration with respect to a constrained diaphragm and a 48% increase with respect to a simply supported diaphragm without the center protrusion. Under the applied bias, the effective area further increases by an additional 15% as compared to the unbiased diaphragm effective area. A lumped element model has been also developed to predict the mechanical and electrical behavior of the microphone. With an applied bias, the microphone has a sensitivity of −38 dB (ref. 1 V/Pa at 1 kHz) and an SNR of 67 dBA measured in a 3.25 mm × 1.9 mm × 0.9 mm package including an analog ASIC. Full article

The memory characteristics of a flash memory device using c-axis aligned crystal indium gallium zinc oxide (CAAC-IGZO) thin film as a channel material were demonstrated. The CAAC-IGZO thin films can replace the current poly-silicon channel, which has reduced mobility because of grain-induced degradation. The CAAC-IGZO thin films were achieved using a tantalum catalyst layer with annealing. A thin film transistor (TFT) with SiO₂/Si₃N₄/Al₂O₃ and CAAC-IGZO thin films, where Al₂O₃ was used for the tunneling layer, was evaluated for a flash memory application and compared with a device using an amorphous IGZO (a-IGZO) channel. A source and drain using indium-tin oxide and aluminum were also evaluated for TFT flash memory devices with crystallized and amorphous channel materials. Compared with the a-IGZO device, higher on-current (I_on), improved field effect carrier mobility (μ_FE), a lower body trap (N_ss), a wider memory window (ΔV_th), and better retention and endurance characteristics were attained using the CAAC-IGZO device. Full article