Search Results (18)

A compact 8–15 GHz Doherty power amplifier (DPA) is proposed and fabricated in 22 nm FD-SOI CMOS. The proposed DPA relies on a quadrature-hybrid splitter and combiner to replace the bulky $\lambda$/4 impedance inverters at the input and the output of the conventional DPA enabling load modulation over a large fractional bandwidth (FBW = 61%) with efficient and compact integration. The proposed DPA achieves a peak gain of 19.6 dB; ≥17 dB across 8–15 GHz, 18 dBm P1dB, 19.5 dBm $P_{sat}$, and a peak PAE of 21% at 10 GHz, while sustaining 17% PAE at 6 dB back-off. The proposed DPA enables a modulation BW up to 200 MHz for a 256-QAM single carrier (SC) signal with a peak-to-average power ratio (PAPR) of 6 dB. Under this setting, the average output power (Pavg) is measured at 12.5 dBm with an RMS error vector magnitude (EVM) of $-24.1$ dB and an average PAE of 15%. Within the scope of CMOS power amplifiers in 22 nm FD-SOI, we found no published example that jointly demonstrates 8–15 GHz coverage and sustained PAE at 6 dB back-off using a quadrature hybrid. Full article

This paper presents a class-D outphasing power amplifier (PA) that incorporates a non-isolating balun combiner employing a 180° phase shift. Both isolating and non-isolating outphasing combiners are analyzed for signal restoration and combining efficiency. The proposed non-isolating balun combiner employing the 180° phase shift was experimentally evaluated and compared with a commercial isolating Wilkinson combiner. When two constant-envelope signals derived from a 10 MHz long-term evolution (LTE) signal are applied to the inputs of the outphasing combiners, both combiners demonstrate successful signal reconstruction. The measured adjacent channel leakage ratios (ACLRs) are −47 dBc for the Wilkinson combiner and −46 dBc for the proposed balun combiner. At 6 dB power back-off (PBO), the proposed balun combiner achieves a combining efficiency of 85.1%, representing an improvement of nearly 60% over the Wilkinson combiner. With a center frequency of 650 MHz, targeting 5G FR1 applications, a class-D outphasing PA was designed in a 28 nm CMOS process using the measured S-parameter data from both outphasing combiners. Simulation results show that the class-D outphasing PA incorporating the proposed balun combiner achieves a peak drain efficiency (DE) of 82.9% with an output power of 17.7 dBm. At 6 dB PBO, the DE reaches 61%, which is approximately 37% higher than that of the outphasing PA using the Wilkinson combiner. Moreover, the designed outphasing PA supports broadband operation over the 360–860 MHz range. Full article

This paper extends the quasi-load insensitive (QLI) Class-E Doherty power amplifier (PA) design methodology to address Doherty PA combiners with complex load impedance trajectories. Additionally, the QLI operation is analyzed for generalized class-E output matching networks with input series inductors and finite DC-feed inductors. We demonstrate that the QLI class-E Doherty operation can be achieved for various Doherty combiners by selecting the appropriate combination of class-E outputs matching network resonance factors and input series inductances. Moreover, a modified class-E output network is proposed to overcome the frequency limitation that might be caused by the class-E network resonance factor choice. To validate the proposed methodology, two 40 W Doherty PAs are designed and simulated using commercial GaN HEMT transistors achieving more than 70% efficiency over a 6 dB output power back-off at 3.8 GHz. Full article

In this paper, a 3.2–3.6 GHz two-stage Doherty power amplifier (PA) module is proposed for fifth-generation (5G) massive multiple-input multiple-output (MIMO) base stations. A detailed design method and procedure for a compact and low-loss combiner suitable for the Doherty PA module are introduced. Based on the proposed combiner, a Doherty PA module is implemented using gallium nitride (GaN) transistors and surface-mounted devices (SMDs) with a packaged size of 8 × 8 mm². The proposed two-stage Doherty PA module achieves a 3 dB small-signal bandwidth of 3.1–3.9 GHz and a peak gain of 31.7 dB. From 3.2 to 3.6 GHz, the saturated output power is 40.4–41.1 dBm. Moreover, the measured saturated drain efficiency (DE) and 8 dB power back-off (PBO) DE reach 51–56.6% and 45.5–48.6%, respectively. Full article

Power amplifiers are crucial components that significantly influence the linearity and energy efficiency of next-generation communication system radio units. A key challenge in designing power amplifiers is managing high peak-to-average power ratio (PAPR) in order to achieve both high linearity and energy efficiency during back-off conditions. This paper presents simulation and measurement results for a dynamic load modulation power amplifier based on a ferroelectric tunable matching network to operate at 2.5 GHz. Experimental studies on a power amplifier with the tunable output matching network confirm its performance at 8 dB back-off while varying the control voltage applied to the ferroelectric element. Additionally, a bias modulator to adjust the transistor’s load in relation to input power was designed. Measurement studies of the dynamic load modulation power amplifier have demonstrated an efficiency of at least 50% at 8 dB back-off and more than 60% at peak power at 2.5 GHz. Furthermore, it was found that the modulator output voltage adjustment function on input power of the bias modulator affects the linearity of the output power. Different bias responses were studied and, as a result, the optimal output voltage response was found. The proposed load modulation power amplifier is promising for operation with high PAPR digital signals. Full article

This paper studies the performance of the communication link between a ground station and the satellites of a LEO constellation, employing code division multiplexing and a non-linear high-power amplifier. The analysis shows that the input power selection at the high-power amplifier of the ground station has a significant impact on overall system performance. The results concerning output power, the challenge of adjusting the back-off with a continuously changing number of satellites, and improved energy efficiency suggest operating in saturation. In this scenario, we can choose to transmit directly the sign of the sum of the signals directed to individual satellites. Analytical exact and simplified results are derived, enabling the estimation of performance as a function of the number of satellites being served when the amplifier operates at saturation. These analytic results are further validated through simulations. A formula to compute the loss across different numbers of satellites is also presented. The performance under saturated amplifier conditions is evaluated, compared, and discussed, providing valuable insights for simplifying the design and operation of satellite uplink communication systems under power amplifier constraints. Full article

This paper presents a Doherty power amplifier (DPA) integrated circuit (IC) designed to have enhanced gain, efficiency, and AM-AM characteristics through a dynamic power dividing technique, which can control the power dividing ratio according to the input power. Since this multi-purpose dynamic power dividing network also provides the phase offset and impedance matching at the interstage network needed for appropriate DPA operation, the active IC area could be reduced. To verify the proposed technique and its analysis, the DPA was implemented with a 28 nm bulk CMOS process for the fifth-generation (5G) new radio (NR) millimeter-wave frequency band of 23.5–27.5 GHz. The measured results showed a gain of 20.3–21.9 dB, saturated output power of 14.0–15.2 dBm, power added efficiency (PAE) of 22.8–26.7% at the peak power, and PAE of 14.6–17.6% at the 6 dB output power back-off (OBO). Full article

The present manuscript introduces a method for evaluating and forecasting the quality of vehicle-to-infrastructure (V2I) communication channels in urban settings. This method precisely classifies and predicts channel quality levels in V2I scenarios based on long-range (LoRa) technology. This approach aims to accurately classify and predict channel quality levels in V2I scenarios. The concept of channel quality scoring was first introduced, offering a more precise description of channel quality compared to traditional packet reception rate (PRR) assessments. In the channel quality assessment model based on the gated recurrent unit (GRU) algorithm, the current channel quality score of the vehicular terminal and the spatial channel parameters (SCP) of its location are utilized as inputs to achieve the classification of channel quality levels with an accuracy of 97.5%. Regarding prediction, the focus lies in forecasting the channel quality score, combined with the calculation of SCP for the vehicle’s following temporal location, thereby achieving predictions of channel quality levels from spatial and temporal perspectives. The prediction model employs the Variational Mode Decomposition-Backoff-Bidirectional Long Short-Term Memory (VMD-BO-BiLSTM) algorithm, which, while maintaining an acceptable training time, exhibits higher accuracy than other prediction algorithms, with an R² value reaching 0.9945. This model contributes to assessing and predicting channel quality in V2I scenarios and holds significant implications for subsequent channel resource allocation. Full article

This paper presents a Ka-band three-stage power amplifier for 5G communications, which has been implemented in a 150 nm GaN-on-SiC technology and adopts a Doherty architecture. The amplifier is made up of a 50 Ω input buffer, which drives a power splitter, thanks to which it delivers its output power to the two power amplifier units of the Doherty topology, namely the main and auxiliary amplifier. Finally, the outputs of the two power amplifiers are properly arranged in a current combining scheme that enables the typical load modulation of the Doherty architecture, alongside allowing power combining at the final output. The proposed amplifier achieves a small signal gain of around 30 dB at 27 GHz, while providing a saturated output power of 32 dBm, with a power-added efficiency (PAE) as high as 26% and 18% at peak and 6 dB output power back-off, respectively. Full article

The Doherty Power Amplifier represents one of the most promising solutions for the design of high-efficiency power stages. In the widely adopted ABC scheme, the Doherty Amplifier design critically depends on the accuracy of the device model in different operating conditions, ranging from class AB to class C. For the class C case, library models are often inaccurate, while experimental characterization is difficult since it must be carried out in large signal conditions and with varying gate bias. In this paper, we propose an alternative approach, based on physics-based Technological CAD (TCAD) simulations of the complete Doherty amplifier along with the analysis of its individual MAIN (class AB) and AUXILIARY (class C) stages. TCAD simulations seamlessly provide an accurate modelling of the device behavior in all operation classes, including the device turn-on and the nonlinear capacitances, and easily account for the cross-loading effects of the MAIN and AUXILIARY devices through the output network and the effect of the device feedback (gate-drain) capacitance on the input matching. Analyzing a GaAs Doherty stage at 12 GHz, we show that the input phase of the auxiliary stage can be exploited for the Doherty power amplifier optimization in terms of gain, linearity and efficiency, showing a 9 dB gain with less than 1 dB gain variation from back-off to peak power with a power-added efficiency exceeding 45% over a Doherty region extending to a more than 6 dB output power back-off. Full article

While Orthogonal Frequency Division Multiplexing (OFDM) is a dominating spectrum access technology in modern, wideband access networks, it is important to maximize its transmission efficiency considering the underlying radio front-end characteristics. A practical front-end contains nonlinear components, e.g., a Power Amplifier (PA), resulting in nonlinear distortion being injected into OFDM band deteriorating symbols detection. A PA operating point, defined here by Input Back-Off (IBO), can be adjusted to balance the wanted signal power and nonlinear distortion power. While it is the most common to maximize the spectral efficiency (SE), recently, energy efficiency (EE) maximization gained momentum. However, EE maximization requires, in addition to PA nonlinearity modeling, modeling of the power consumption of the PA and all other transmitter components. While it is commonly overlooked, if a battery is used to power the transmitter, its model should be considered as well. This paper derives mathematical expressions for EE and SE of an OFDM transmitter considering Rapp and soft-limiter models of PA nonlinearity, class A, class B, and perfect PA power consumption models, and two battery models: perfect and worst-case. While closed-form expressions cannot be obtained for most of the derived integrals, numerical methods have been used to obtain the optimal IBO value in each case. The numerical results show, in addition to optimal IBO values, the expected Signal-to-Noise and Distortion Ratios (SNDRs). It is shown that the optimal IBO value changes significantly with the wireless channel properties, utilized hardware architecture, or the utilized optimization goal. As such, the proposed optimization is an important topic for 5G and beyond transmitters. Full article

This work presents a comprehensive theoretical analysis of current-mode power amplifiers as a function of input power for different biasing classes under the common simplifying assumption of constant transconductance and hard current cut-off/saturation. Typically, the theoretical analysis of power amplifier performance and behavior are carried out only at maximum output power. However, to achieve high data-rates, modern telecommunication systems adopt signals characterized by a very high peak-to-average power ratio, thus it is useful to analyze the power amplifier behavior as a function of power back-off. Moreover, in many cases, to enhance the efficiency and/or to apply harmonic shaping techniques, a clipped drain-source current, which approaches a square wave, is required. The classical analysis can be extended to low power levels only under the assumption of power-independent conduction angle, which is true only for class-A and class-B amplifiers, and does not take into account possible waveform clipping at maximum current. This work presents a complete theoretical Fourier analysis of FET-based power amplifiers as a function of quiescent drain-source current at any input power level and accounting for the clipped current case, up to the square-wave limit, reorganizing and completing the material that can be found in classical textbooks in the field. Full article

In this paper, a coordinated multipoint joint transmission (CoMP-JT) framework at mmWave for a cyclic prefix (CP)-free multiuser OFDM wireless communication system is developed and analyzed. The aim is to provide high-quality service to cell-edge users; otherwise, the cell-users would suffer from significant signal degradation due to undesired interference. The impact of complex Hadamard transform with block diagonalization channel precoding for multiuser interference reduction and designed subcarrier mapping for out-of-band (OOB) reduction are investigated. In addition, the paper studied the input back-off-aided high-power amplifier for peak-to-average power ratio (PAPR) reduction and forward error correction channel coding for improved bit error rate (BER) for cell-edge users at mmWave frequencies. Moreover, signal-to-interference-noise ratio and ergodic achievable rate are estimated both in the presence and absence of CoMP-JT-based transmission technique to verify their significance in terms of transmitted power. Numerical investigations showed an OOB reduction of 312 dB, PAPR reduction from 17.50 dB to 7.66 dB, and improved BER of $1\times {10}^{-3}$ in 16-QAM for a signal-to-noise ratio of −6 dB. Hence, the simulation results demonstrated the effectiveness of the developed system. Full article

Iterative subcarrier regularization (ISR) has been recently proposed as a receiver-side remedy for orthogonal frequency division multiplexing (OFDM) nonlinearity. It allows the power amplifier of OFDM transmitters to operate at a lower input back-off for more efficient uplinks. However, the compensation ability cannot align with increasing channel quality, because the standard quadrature amplitude modulation (QAM) used in ISR may eliminate compensation due to erroneous decisions. To solve this issue, an improved version of ISR was proposed to flexibly adjust the constellation borders of QAM and numerically optimize it based on IEEE 802.11ah (hereinafter referred to as 802.11ah) specifications. Simulations show that the proposed scheme not only improves the converged bit error rate of ISR but also accelerates its own convergence, especially in a high channel quality, thereby achieving better power efficiency for Internet of Things clients without additional computational complexity. Full article

This paper proposes a broadband asymmetrical monolithic microwave integrated circuit (MMIC) Doherty power amplifier (DPA) using 0.25-μm gallium-nitride process with a compact chip size of 2.37 × 1.86 mm² for 5G communication. It adopts an unequal Wilkinson’s power divider with a ratio of 2.5:1, where 71.5% of the total power is transferred to the main amplifier for higher gain. Different input matching networks are used to offset phase difference while completing impedance conversion. This design also applies a novel topology to solve the problem of large impedance transformer ratio (ITR) in conventional DPA, and it optimizes the ITR from 4:1 to 2:1 for wider band. Moreover, most of the components of the DPA including power divider and matching networks use lumped inductors and capacitors instead of long transmission line (TL) for a smaller space area. The whole circuit is designed and simulated using Agilent’s advanced design system (ADS). The simulated small-signal gain of DPA is 8–11 dB and the saturation output power is more than 39.5 dBm with 800 MHz band from 4.5 GHz to 5.3 GHz. At 6-dB output power back-off, the DPA demonstrates 38–41.3% power added efficiency (PAE), whereas 44–54% PAE is achieved at saturation power. Full article