Search Results (133)

The force ripple of a permanent magnet synchronous linear motor (PMSLM) caused by multi-source disturbances in practical applications seriously restricts its high-precision motion control performance. The traditional single-mechanism model has difficulty fully characterizing the nonlinear disturbance factors, while the data-driven method has real-time limitations. Therefore, this paper proposes a hybrid modeling framework that integrates the physical mechanism and measured data and realizes the dynamic compensation of the force ripple by constructing a collaborative suppression algorithm. At the mechanistic level, based on electromagnetic field theory and the virtual displacement principle, an analytical model of the core disturbance terms such as the cogging effect and the end effect is established. At the data level, the acceleration sensor is used to collect the dynamic response signal in real time, and the data-driven ripple residual model is constructed by combining frequency domain analysis and parameter fitting. In order to verify the effectiveness of the algorithm, a hardware and software experimental platform including a multi-core processor, high-precision current loop controller, real-time data acquisition module, and motion control unit is built to realize the online calculation and closed-loop injection of the hybrid compensation current. Experiments show that the hybrid framework effectively compensates the unmodeled disturbance through the data model while maintaining the physical interpretability of the mechanistic model, which provides a new idea for motor performance optimization under complex working conditions. Full article

Model predictive control (MPC) has become a popular method in motor control due to its high adaptability to multivariate control. However, one issue for this control system is constructing a reasonable cost function (CF) and obtaining appropriate weighting factors (WFs) within it. This paper addresses the issue of effectively reducing torque ripple and current harmonic content in permanent magnet synchronous motors (PMSM). Within the three-vector model predictive current control (TV-MPCC) strategy for PMSM, a new CF including current error and switching frequency terms is constructed. Combined with the technique for order preference by similarity to ideal solution (TOPSIS), the optimal control vector is obtained. Compared with traditional methods, this method reduces the complexity of adjusting WFs in the CF. Simulation results show that the motor’s torque ripple and current harmonic content are effectively reduced. Both the steady state and dynamic performance of the PMSM are also improved by means of the proposed multi-objective MPC for current error and switching frequency. Full article

This paper presents a new methodology for the design process of DC ripple filters for voltage source converters. It focuses on fast-switching, wide-bandgap-material-based converters. Therefore, a wide frequency range of up to 100 MHz is taken into consideration during the whole process. Different tools like analytic calculations, time-domain modelling, and the finite element method are used for different tasks in order to generate a realistic model in terms of filter effect and reliability. The models are validated by small-signal measurements using a vector network analyser as well as realistic high-power tests. The contribution of this paper is to provide a tool for DC link filter design to estimate the filter efficiency and the current stress on the filter elements with a special focus on WBG hardware. Full article

Brushless DC (BLDC) motors are widely used in applications such as Electric Vehicles (EVs) due to their high efficiency, low maintenance, and favorable torque-to-mass ratio. However, one major challenge in BLDC motors is the presence of current harmonics, which can lead to increased noise, vibration, and reduced efficiency, particularly at low speeds or light loads. These harmonics primarily arise from abrupt current transitions during phase commutation. To address this, thispaper presents an innovative approach that combines the Proposed Sigmoid Trapezoidal Current Model with hysteresis control to reduce current harmonics. The model facilitates smooth current changes by applying a sigmoid function, replacing sharp transitions with gradual ones, thus significantly minimizing harmonic distortion. Additionally, hysteresis PWM control enhances the system by precisely regulating the current and dynamically adjusting the switching frequency to maintain the current within a defined range. Simulation results confirm the effectiveness of this method, showing substantial reductions in current harmonics, speed ripple, and torque ripple. Specifically, the proposed method reduces torque ripple by 81% compared to traditional Electronic Commutation Control and improves torque ripple by 30% compared to the conventional method. Full article

When connecting a renewable energy source to a medium-voltage grid, it has to fulfil grid codes and be able to work in a medium-voltage range (>10 kV). Multilevel converters (MLCs) are recognized for their low total harmonic distortion (THD) and ability to work at high voltage compared to other converter types, making them ideal for applications connected to medium-voltage grids whilst being compliant with grid codes and voltage ratings. Cascaded H-bridge multilevel converters (CHBs-MLC) are a type of MLC topology, and they does not need any capacitors or diodes for clamping like other MLC topologies. One of the problems in these types of converters involves the double-frequency harmonics in the DC linking voltage and power, which can increase the size of the capacitors and converters. The use of line frequency transformers for isolation is another factor that increases the system’s size. This paper proposes an isolated CHBs-MLC topology that effectively overcomes double-line frequency harmonics and offers isolation. In the proposed topology, each DC source (renewable energy source) supplies a three-phase load rather than a single-phase load that is seen in conventional MLCs. This is achieved by employing a multi-winding high-frequency transformer (HFT). The primary winding consists of a winding connected to the DC sources. The secondary windings consist of three windings, each supplying one phase of the load. This configuration reduces the DC voltage link ripples, thus improving the power quality. Photovoltaic (PV) renewable energy sources are considered as the DC sources. A case study of a 1.0 MW and 13.8 kV photovoltaic (PV) system is presented, considering two scenarios: variations in solar irradiation and 25% partial panel shedding. The simulations and design results show the benefits of the proposed topology, including a seven-fold reduction in capacitor volume, a 2.7-fold reduction in transformer core volume, a 50% decrease in the current THD, and a 30% reduction in the voltage THD compared to conventional MLCs. The main challenge of the proposed topology is the use of more switches compared to conventional MLCs. However, with advancing technology, the cost is expected to decrease over time. Full article

This paper introduces a high-efficiency buck converter designed for a wide load range, targeting low-power applications in medical devices, smart homes, wearables, IoT, and technology utilizing WiFi and Bluetooth. To achieve high efficiency across varying loads, the proposed converter employs a low-power adaptive on-time (AOT) controller that ensures output voltage stability and seamless mode transitions. An adaptive comparator (ACP) with variable output impedance is introduced, offering a variable DC gain and bandwidth to be suitable for different load conditions. A negative-level shifter (NLS) circuit, with its swing ranging from −0.5 V to the battery voltage (V_BAT), is proposed to control the smaller power p-MOS transistors. By using an NLS, the chip area, which is mostly occupied by power CMOS transistors, is reduced while the power efficiency is improved, particularly under a heavy load. A status time detector (STD) block which provides control signals to the ACP and NLS for optimized power consumption is added to identify load conditions (heavy, light, ultra-light). By employing a 180 nm CMOS technology, the active chip area occupies about 0.31 mm². With an input voltage range of 2.8–3.3 V, the controller’s current consumption ranges from 1.2 μA to 16 μA, corresponding to the output load current varying from 12 μA to 120 mA. Although the output load can vary, the output voltage is regulated at 1.2 V with a ripple between 3 and 12 mV. The proposed design achieves a peak efficiency of 96.2% under a heavy load with a switching frequency of 1.3 MHz. Full article

Inductor parameter variations often affect the control performance of digital current mode (CM)-controlled buck converters as their high performance relies on accurate converter modeling. However, recent studies have shown that reliably monitoring inductance with current sensors and high-frequency sampling greatly increases the overall cost of this process. To address this issue, an online inductance monitoring method without a current sensor is proposed in this study. First, an inductance calculation model is derived by applying the dynamic characteristics of a buck converter with inductor volt-second and capacitor charge balance principles. The model’s accuracy is guaranteed by considering inductor current switching ripple characteristics. Nevertheless, output capacitor equivalent series resistance (ESR) can degrade the accuracy of the proposed calculation model. Thus, to enhance the tolerance of the inductance calculation model to capacitor ESR, the ESR effect on inductance monitoring is investigated. With the proposed capacitor ESR estimation method, inductance monitoring achieves reliable accuracy, even for a buck converter with high capacitor ESR. The effectiveness of the proposed method is verified by simulations and experiments on a buck converter with digital sensorless current mode (SCM) control. Full article

While DC/DC converters for water electrolysis systems have been widely investigated, they inherently face a critical compromise between wide voltage regulation capabilities and dynamic response characteristics. This study is based on a two-stage hybrid topology (TSIB-TPLLC) that synergistically combines a two-phase interleaved buck converter with a three-phase LLC resonant converter to resolve this challenge. The first-stage interleaved buck converter enables wide-range voltage regulation while reducing input current ripple and minimizing intermediate bus capacitance through phase-interleaved operation. The subsequent three-phase LLC stage operates at a fixed resonant frequency, achieving inherent output current ripple suppression through multi-phase cancellation while maintaining high conversion efficiency. A dual-loop control architecture incorporating linear active disturbance rejection control (LADRC) with PI compensation is developed to improve transient response compared to conventional PI-based methods. Finally, a 1.2 kW experimental prototype with an input voltage of 250 V and an output voltage of 24 V demonstrates the converter’s operational feasibility and enhanced steady-state/transient performance, confirming its suitability for hydrogen production applications. Full article

Electromagnetic interference (EMI) remains a difficult task in the design and operation of contemporary power electronic systems, especially in those applications where signal quality has a direct impact on the overall performance and efficiency. Conventional control schemes that have evolved to counteract the effects of EMI generally tend to have greater design complexity, greater error rates, poor control accuracy, and large amounts of harmonic distortion. In order to overcome these constraints, this paper introduces an intelligent and advanced control approach founded on the signal randomization principle. The suggested approach controls the switching activity of a DC–DC converter by dynamically tuned parameters like duty cycle, switching frequency, and signal modulation. A boost interleaved topology is utilized to maximize the current distribution and minimize ripple, and an innovative space vector-dithered sigma delta modulation (SV-DiSDM) scheme is proposed for cancelling harmonics via a digitalized control action. The used modulation scheme can effectively distribute the harmonic energy across a larger range of frequencies to largely eliminate EMI and boost the stability of the system. High-performance analysis is conducted by employing significant measures like total harmonic distortion (THD), switching frequency deviation, switching loss, and distortion product. Verification against conventional control models confirms the increased efficiency, less EMI, and greater signal integrity of the proposed method, and hence, it can be a viable alternative for EMI-aware power electronics applications. Full article

Active magnetic bearings (AMBs), pivotal in high-speed rotating machinery for their frictionless operation and precise control, demand power amplifiers with exceptional dynamic performance and minimal current ripple. However, conventional amplifier designs often overlook eddy current effects, a critical oversight given the high-frequency switching inherent to pulse-width modulation (PWM). These induced eddy currents distort output waveforms, amplify ripple, and degrade system bandwidth. This paper bridges this critical gap by proposing a comprehensive methodology to model, quantify, and mitigate eddy current impacts on three-level half-bridge power amplifiers. A novel mutual inductance-embedded circuit model was developed, integrating winding–eddy current interactions under PWM operations, while a discretized transfer function framework dissects frequency-dependent ripple amplification and phase hysteresis. A voltage selection criterion was analytically derived to suppress nonlinear distortions, ensuring stable operation in high-precision applications. A Simulink simulation model was established to verify the accuracy of the theoretical model. Experimental validation demonstrated a 212% surge in steady-state ripple (48 mA to 150 mA at 4 A DC bias) under a 20 kHz PWM operation, aligning with theoretical predictions. Dynamic load tests (400 Hz) showed a 6.28% current amplitude reduction at 80 V DC bus voltage compared to 40 V, highlighting bandwidth degradation. This research provides a paradigm for optimizing AMB power electronics, enhancing precision in next-generation high-speed systems. Full article

A digital pulse width modulator (DPWM) is a key component in digital power electronics. Techniques like space vector modulation, along with rising switching frequencies from wide-bandgap power transistors, create a need for a center-aligned high-resolution PWM (CA-HRPWM). However, existing FPGA-based HRPWM designs primarily focus on achieving fine timing resolution and are not fully optimized for multichannel CA-HRPWM implementations. This paper presents a generalized CA-HRPWM design based on the output serializer (OSERDES) module. The design includes comparison values and dead time calculation, a time base and triangular carrier generation, unary code encoding, and an OSERDES-based data-to-time converter (DTC). The hardware implementation results demonstrate that the design has a minimal overhead compared with a conventional PWM generator. The proposed design achieved an 800 ps resolution for both pulse width and dead time generation with excellent linearity. Additionally, the effectiveness of the design was shown in a PMSM current controller, where it reduced the current ripple by up to 64% compared with a conventional PWM generator. Full article

Owing to their high performance and high-efficiency controllability, surface-mounted permanent magnet synchronous motors (SPMSMs) have been widely considered for various robotic systems. The conventional three-vector-based model predictive torque control (MPTC) is frequently applied to SPMSMs, while the adjustment of weight factors is difficult. Compared with the five-segment sequence output method, the three-segment sequence output method can effectively reduce the switching frequency. However, the three-segment sequence output method leads to large torque and stator flux ripple. For these issues, a three-vector-based smart MPTC method based on the optimal vector sequence optimized by a genetic algorithm is proposed. Firstly, the reference voltage vector output from the discrete-time sliding mode (DTSM) current controller is utilized to simplify the process of selecting the vectors, and it can enhance the robustness of the SPMSM system. Secondly, an improved cost function is employed to select the optimal vector sequence, aiming to minimize torque and flux ripple. Furthermore, the multi-objective genetic algorithm is leveraged to seek the Pareto solution for weight factors. As a final step, the efficacy of the designed MPTC approach is confirmed through simulations and experiments. Full article

In industries dealing with motor drive systems, the use of real-time simulators for validating control codes is becoming increasingly mandatory. This is particularly essential for systems with advanced control codes or complex microcontroller unit (MCU) register configurations, as this validation process helps prevent accidents and shorten development time. This study presents a validation process using a real-time simulator for the beatless control of six-step operation. Six-step operation, when applied to high-speed drives, has a limitation on the number of samples per electrical rotation, which causes voltage errors. A representative of these voltage error phenomena is the beat phenomenon, resulting in torque ripple at the first harmonic and high current ripple. To mitigate this beat phenomenon, a synchronous PWM method is sometimes used. However, in practical industrial systems, it may not be feasible to synchronously adjust the inverter’s switching frequency with the rotation speed. This study proposes a beatless control method to eliminate the voltage errors caused by the beat phenomenon during six-step operation at a fixed switching frequency. The specific implementation of this control method is explained based on MCU timer register settings. While previous studies have only proposed beatless control methods, this paper goes further by implementing the proposed beatless method using the MCU (TMS320F28335) to generate gating signals and validating the implementation through simulation on a permanent magnet synchronous motor using a real-time simulator (Typhoon HIL). Full article

The DC bus current ripple is a critical performance parameter affecting the operation of current source inverters (CSIs). In high-power applications, CSIs often operate at lower switching frequencies to minimize losses. However, maintaining low levels of DC bus current ripple necessitates the use of large inductors on the DC side, which increases the size, weight, and cost of the system. This paper first explores the inherent limitations of conventional CSI designs. Subsequently, it proposes a hierarchical coordinated switching modulation strategy based on the H7 current source inverter (H7-CSI) to address the issue of DC bus current ripple. By segmenting the zero-vector states, the proposed method fully utilizes the modulation freedom of the H7-CSI, achieving high-frequency chopping effects on the DC-side current. Experimental results show that the new modulation strategy reduces the amplitude of DC bus current ripple to 43% of that achieved by conventional CSIs under similar switching loss conditions. Furthermore, the dynamic performance of the proposed scheme remains consistent with conventional CSIs. Spectrally, this method exhibits improved performance in the low-frequency range and slightly degraded performance in the high-frequency range, although the latter remains within acceptable limits. Full article

Switched reluctance motors (SRMs) offer several advantages, including a magnet- and winding-free rotor, high mechanical strength, and exceptional output efficiency. However, the doubly salient pole structure and high-frequency switching power supply result in significant torque ripple and electromagnetic noise, which limit the application in the field of new energy vehicles. To address these issues, this paper proposes a direct instantaneous torque control (DITC) strategy based on an optimal switching angle torque sharing function (TSF). Firstly, an improved cosine TSF is designed to reasonably distribute the total reference torque among the phases, stabilizing the synthesized torque of SRM during the commutation interval. Subsequently, an improved artificial bee colony (ABC) algorithm is used to obtain the optimal switching angle data at various speeds, integrating these data into the torque distribution module to derive the optimal switching angle model. Finally, the effectiveness of the proposed control strategy is validated through simulations of an 8/6-pole SRM. Simulation results demonstrate that the proposed control strategy effectively suppresses torque ripple during commutation and reduces the peak current at the beginning of phase commutation. Full article