1. Introduction
Switch-mode DC-DC converters have been widely used in portable electronic devices, renewable energy systems, and aerospace fields due to their small size, light weight, and high efficiency [
1,
2,
3,
4,
5]. To improve their dynamic performance, several digital current mode (CM) control strategies have been investigated, such as digital peak/average/valley predictive current control (PCC) [
6,
7,
8], model predictive control [
9,
10], and hybrid ripple-based control [
11]. Although stability and transient response capabilities are continuously improving, the control performance of these algorithms still relies on accurate inductor current sensing. There are two commonly used current sensing methods: the sampling resistor and hall-effect sensor methods [
12,
13]. Utilizing sampling resistors is a simple approach, but the accuracy and the induced power loss should be considered. Hall-effect sensors can provide high accuracy and low loss. However, increased costs and delays constrain their application.
To solve these issues, inductor current estimation algorithms have been investigated for DC-DC converters [
14,
15,
16,
17,
18]. Based on inductor volt-second characteristics, a simple current estimator for digital sensorless current mode (SCM) control is proposed in [
14]. However, since component parasitic parameters are ignored, the estimation error increases linearly with time, leading to output voltage steady state error. In addition to component parasitics, other factors can degrade current estimation accuracy, such as output voltage sampling errors, switching delay, and inductance variation. Considering inductor ESR and the conduction resistance of switching components, the estimation error converges to a constant value, and the output voltage steady state error is eliminated [
15]. The compensation strategy for current estimators with sensorless PCC is improved by investigating parasitic parameters and output voltage sampling errors in detail [
16,
17]. In [
18], the effect of switching delay on inductance estimation was eliminated by tracking the width of the switch node voltage. That study improved current estimation accuracy and control performance, where accurate inductance is always required. Since inductance can be affected by many factors, such as switching frequency, temperature, current, and aging, it should be precisely acquired.
To track inductance variation accurately with low complexity and cost, a series of online monitoring methods are investigated in [
19,
20,
21,
22,
23,
24]. In [
19], a look-up-table-based method was constructed to compensate for the effect of DC-bias current on inductance. It was easy to implement, but the monitoring accuracy was difficult to guarantee since the influence of the aforementioned factors was ignored. In [
20], a least mean squares algorithm based on a continuous time model was proposed. However, twenty-five samples for voltages and inductor current are required during one switching cycle, increasing the overall complexity. Aiming to address this issue, an adaptive identifier for inductance monitoring was proposed with a generalized gradient descent algorithm [
21]. To further improve the convergence rate of parameter estimation, an adaptive model observer-based inductance and capacitance monitoring scheme was investigated [
22]. However, the sampling frequency of the current and voltage is still much higher than the switching frequency. Other inductance and capacitance monitoring techniques were proposed in [
23,
24], embedding the particle swarm optimization algorithm into the mathematical model. Although the accuracy of inductance estimation is gradually improving, common issues need to be addressed in practice:
(1) The demand for accurate and high-speed current sensors increases the hardware cost and complexity.
(2) High-frequency voltage/current sampling is needed, which is much higher than switching frequency. This greatly increases costs and is hard to implement in high switching frequency applications.
(3) Iterative calculations increase the requirements for digital signal processors.
To solve these issues, this study proposes a current-sensorless inductance monitoring method based on dynamic characteristics. This monitoring technique utilizes dynamic line/output voltages, where a small and short pulse excitation signal is imposed on the reference voltage. By combining the volt-second balance principle and inductor current switching ripple characteristic of the dynamic process, an inductance calculation model is derived, where the dynamic inductor current characteristics are required. In the calculation model, the difference in the inductor average currents in two neighboring switching cycles is estimated by using the capacitor charge balance principle. Therefore, only one sampling for line and output voltages is required per switching cycle. Furthermore, the proposed calculation model is investigated with respect to output capacitor equivalent series resistance (ESR). The results indicate that the inductor monitoring error is proportional to the ESR, which should be fully considered in aging and certain high ESR situations. To compensate for the ESR effect, an ESR estimation method is derived by revising the original inductance derivation process. According to this approach, reliable inductance monitoring accuracy is ensured even for systems with high capacitor ESR.
This study is organized as follows. In
Section 2, the structure of an SCM control law with online inductance monitoring is introduced. The precondition for inductance calculation is created by periodically changing the reference voltage with a small amplitude. Then, an inductance calculation model based on dynamic characteristics is proposed, which is current-sensorless. In
Section 3, to eliminate the monitoring error caused by output capacitor ESR, the inductance calculation model is re-derived considering capacitor ESR. Furthermore, an ESR estimation method is proposed to guarantee the accuracy of inductance monitoring. The necessity of inductance monitoring is proved by simulations in
Section 4. The experimental results and corresponding analysis are presented in
Section 5. Finally, a conclusion is provided in
Section 6.
2. Online Inductance Monitoring Method for Buck Converter
2.1. SCM Control with Online Inductance Monitoring
To obtain well-regulated dynamic responses, an online inductance monitoring method is proposed to update the preset inductance in an SCM controller. Since inductance is the key parameter of SCM controllers, it is necessary to track inductance variation using the online monitoring method.
Figure 1 illustrates a block diagram of the proposed online inductance monitoring method. It consists of a MOSFET switch,
Q1; a diode,
D1; an inductor,
L; inductor equivalent series resistance,
RL; an output capacitor,
C; and a load resistor,
R. The line and output voltages used in the digital controller and online inductance monitoring module are sampled by AD converters (ADCs).
Without current sensors or additional AD converters, the inductance is calculated according to the sampled line output, vg[n]; the output voltage, v[n]; and the duty cycle, d[n]. The sampling frequency of line and output voltages follows the switching frequency, T. The reference current, iref, is provided by the outer voltage loop. In the inner compensation loop, inductor current, iL, is calculated by a current estimator. The duty cycle, d, is generated by the current mode (CM) controller, which eliminates the error between iref and iL. With a digital pulse width modulator (DPWM), the duty cycle is converted into the driving signal of the MOSFET switch, Q1.
The current estimator and CM controller are provided in (1) and (2). Their detailed descriptions are shown in
Appendix A.1.
For the proposed online inductance monitoring method, a pulse excitation signal with small amplitude and short duration is used to periodically change the reference voltage, vref, which provides a required dynamic state. The influence of temperature, aging, and other factors on the parameters is ignored since the inductance is regarded as a constant value in the following calculation process. Based on the dynamic characteristics with inductor volt-second balance and capacitor charge balance principles, the inductance calculation model can be derived.
2.2. Inductance Calculation Model Based on Dynamic Characteristics
The inductor current and output voltage during the pulse excitation process are illustrated in
Figure 2. The reference voltage changes from
Vref to
Vref + Δ
vref at the beginning of the
nth switching cycle. With the employed CM control, the duty cycle of the
nth switching cycle is calculated in the previous cycle. The duty cycle changes from the (
n + 1)th cycle, which introduces a dynamic state.
Inductance monitoring is built based on a converter model. For the traditional model indicated by (1), the inductor current in the switching cycle is considered a constant value, ignoring the current switching ripple effects. However, since the current ripple ratio is usually designed to be around 0.4 in most CCM operations, the induced modeling error will reduce the accuracy of the inductance online calculation.
To eliminate the modeling error, an improved discrete-time inductor current equation for the buck converter under trailing edge modulation is derived by
where
represents the valley inductor current of the
nth switching cycle.
and
denote the inductor voltage during switching on and off, respectively, shown as follows:
Substituting (4) and (5) into (3) provides
where
and
denote the inductor voltage and average inductor current of the
nth switching cycle, respectively. Compared with (1), the inductor current in the switching cycle is referred to as
iv and
iav, explaining the detailed characteristics of the inductor current ripple. Accordingly, the relationship between
and
is provided by
where
. The derivation is provided in
Appendix A.2.
Substituting (7) into (6), the inductance calculation model based on the dynamic characteristic of the inductor volt-second balance principle is derived by
The duration of the pulse excitation signal is very short, and line voltage is regarded as a constant value,
Vg. In steady state, the output voltage, inductor current, and duty cycle are represented as
V,
Iav, and
D, respectively. Since the valley inductor current in the
nth switching cycle is unchanged,
, and (9) is provided by
Therefore, (8) can be simplified as follows:
where
.
As shown in (10), a precise average inductor current is required for inductance monitoring. However, for a buck converter under SCM control, it is difficult to obtain inductor current accurately because the conventional current estimator is susceptible to inductance and parasitic parameter variations.
The accurate value of iav(n + 1) − iav(n) is derived by analyzing the capacitor charge balance principle.
According to the charging characteristics of the output capacitor, the relationship between capacitor voltage and inductor current can be described as follows:
Then, the average inductor current of the
nth switching cycle,
, can obtained from (9).
Similarly, the average inductor current of the (
n + 1)th switching cycle is provided by
As
Figure 2 shows, the system stays in a steady state in the
nth cycle; thus,
. Subtracting (12) from (13) yields
With (14), the variation in average inductor current required for inductance monitoring can be calculated using the sampled output voltage.
Combining (10) and (14), a current-sensorless inductance calculation model for the buck converter can be obtained, shown as follows:
Equation (15) shows that only the duty cycle, line voltage, and output voltage are required for inductance online monitoring.
3. Compensation Strategy for Capacitor ESR Effect
In the above derivation process, the output capacitor ESR is not considered. However, the capacitor ESR leads to differences between the sampled output voltage and capacitor voltage, as shown in
Figure 3.
The simulation results for different
RC versus relative errors of inductance monitoring are shown in
Figure 4, indicating that the monitoring error increases with
RC. When
RC < 0.01 Ω, the calculation error is less than 5.52%, which is acceptable. When
RC = 0.1 Ω, the monitoring error rises to 36.5%, which means the effect of
RC on inductance monitoring cannot be ignored. This error happens when ESR increases because of the aging effect or when a high ESR capacitor is used.
To improve monitoring accuracy, a compensation strategy for the effect of capacitor ESR on inductance calculation should be investigated. First, an inductance calculation model considering capacitor ESR is derived. Then, capacitor ESR is estimated to improve the accuracy of inductance monitoring.
3.1. Inductance Calculation Model Considering Capacitor ESR
As shown in
Figure 3, the charging equation of the output capacitor is provided by
The relationship between
and
is
Replacing
in (16) with (17), the capacitor current during a switching cycle is described as follows:
As shown in (6), [
iv(
n + 1) −
iv(
n)]/
T =
vL(
n)/
L. Substituting it into (18), the average inductor current can be derived by
Since
and
, the difference between
and
can be derived by
Substituting (20) into (8), the inductance calculation model considering the
RC effect is provided by
where
.
3.2. Capacitor ESR Estimation
To accurately compensate for the capacitor ESR effect and obtain a precise inductance monitoring result, an RC estimation method is investigated.
By substituting (8) into (20), the charging equation of the output capacitor in the (
n + 1)th cycle can be rewritten as follows:
Similarly, the current equation of the output capacitor in the (
n + 2)th cycle approximates
Let
. From (22) and (23),
RC is provided by
With the acquired data (line voltage, output voltage, and duty cycle) in the dynamic and steady states, the output capacitor ESR can be calculated, guaranteeing the accuracy of inductance monitoring.
5. Experiments
A digitally controlled buck converter was constructed to validate the performance of the proposed method. The prototype is shown in
Figure 10, and its specifications are consistent with that of the simulation. An FPGA (Cyclone IV) board was employed to implement the SCM controller and the proposed inductance monitoring method. For the main circuit, a MOSFET (FDS86540, ON Semiconductor, Phoenix, AZ, USA) and diode (NRVTSA4100E, ON Semiconductor, Phoenix, AZ, USA) were adopted as switching devices. CKG57NX7S2A226M500JH (TDK, Japan) was used as the output capacitor. The specifications are shown in
Table 3. Two AD converter chips (LTC2314-14, Linear Technology, Milpitas, CA, USA) were used to sample line and output voltages.
Inductor parameters change with temperature, loading levels, aging effects, etc. Since the aging constant is very large, the inductance variations caused by aging effects are very small and last for a short time. To avoid wasting hardware resources, the period for inductance monitoring should not be set too short. While the temperature constant is much smaller than the aging constant and the load levels may change at any time, a short time period should be set to ensure timely monitoring. Considering these factors, inductance monitoring is performed once per second.
To verify the effectiveness of the proposed method, both buck converters with low and high capacitor ESR were employed for testing. Since the ESR of the output capacitor is small, a resistor (0.1 Ω) is connected in the series with the output capacitor to simulate high capacitor ESR.
5.1. Experimental Results with Low Capacitor ESR
5.1.1. Inductance Monitoring Results
The output voltage waveform under pulse signal injection is shown in
Figure 11. The amplitude and duration of Δ
vref are set as 3% of
Vref and 40 μs, respectively. The duration of signal injection is chosen based on the transient time required for the inductance monitoring. The selection principles of the injection amplitude are as follows: (1) the amplitude should be large enough to reduce the influences of the output voltage measurement noises and quantization errors on the accuracy of inductance monitoring; (2) the disturbance caused by the signal injection will not greatly influence the system performance. The injection amplitude can be smaller if the system has a high-resolution AD converter.
As
Figure 11 shows, the corresponding output voltage deviation (120 mV) is 2% of the nominal reference voltage, indicating that the impact of pulse injection on the system can be ignored. After the injection, the output voltage is restored to 6 V in 100 μs. During this period, the required line and output voltages are measured, and then, the inductance monitoring is processed.
Inductance monitoring results within 40 s are shown in
Figure 12. The average monitoring value is 56.781 μH, which is very close to the actual value (57 μF). The maximum and minimum monitoring values are 60.098 μH and 54.115 μH, respectively, which means the maximum tracking error is less than 5.5%.
To verify the effectiveness of the proposed method when load and line voltage step changes occur, buck system experiments with/without inductance monitoring were also carried out.
5.1.2. Experiment with Load Variations
When the load changes from 6 Ω and 4 Ω at 20.5 s, inductance monitoring results before and after the change are shown in
Figure 13. For comparison,
Table 4 lists the average, maximum, and minimum monitoring values of inductance under two different load conditions. The average value is still close to the actual value, with a maximum error of less than 6%, even though load resistance has changed.
With the proposed inductance monitoring, the output voltage response waveform of the SCM-controlled buck converter under load variations is shown in
Figure 14a. When the load changes from 6 Ω to 4 Ω, the output voltage deviates by 600 mV and then reverts back to a steady state in 320 μs. However, for the SCM controller without inductance monitoring, the output voltage of the system stabilizes within 450 μs. The response time is 40.6% longer than that of the SCM controller with the proposed method.
5.1.3. Experiment with Line Voltage Variations
The line voltage was set to change from 10 V to 12 V at 20.5 s, and the corresponding inductance monitoring results are shown in
Figure 15. The average, maximum, and minimum values of inductance calculated under different line voltages are provided in
Table 5. Although the line voltage changes, the average value is slightly smaller than the actual value, and the maximum error is less than 5%.
The output voltage waveforms of the system with the proposed method and without inductance monitoring when line voltage rises from 10 V to 12 V are shown in
Figure 16a and
Figure 16b, respectively. As shown in
Figure 16a, for the system with the proposed method, the output voltage deviates by 420 mV and takes 220 μs to stabilize, while for the SCM controller without inductance monitoring, the stabilization time of the output voltage is 470 μs, shown as
Figure 16b, which is 113.6% longer.
The experimental results show that the proposed inductance monitoring method has reliable accuracy under different loads and line voltages. By updating the inductance in the controller, the system can achieve a faster response speed than systems without inductance monitoring when a sudden change occurs in the load or line voltage.
5.2. Experimental Results with High Capacitor ESR
To verify the effectiveness of the proposed method in high RC situations, experiments are executed with and without RC effect compensation. The experimental results show that the accuracy of inductance monitoring is effectively improved by the proposed compensation strategy.
The online monitoring results for
RC and
L are shown in
Figure 17a and
Figure 17b, respectively. As
Figure 17a shows, the average value (0.107 Ω) of the estimated
RC is very close to the actual value (0.106 Ω). The estimation results vary from 0.099 Ω to 0.113 Ω, which is caused by sampling and quantization errors. The effectiveness of
RC estimation is reflected by the inductance monitoring results. As shown in
Figure 17b, the inductance monitoring results without
RC effect compensation fluctuate around 34.933 µH, which deviates from the actual value by 38.71%, while for inductance monitoring with
RC effect compensation, the maximum tracking error is only about 5%, indicating that
RC estimation and compensation effectively improve inductance monitoring accuracy.
The monitoring results for
RC and
L under load and line voltage variations are depicted in
Figure 18 and
Figure 19, respectively. For
with
RC effect compensation, a comparison of the experimental results before and after the load/line voltage changes is listed in
Table 6. When the load changes to 4 Ω, the
RC estimation results change between 0.101 Ω and 0.113 Ω, with an average value of 0.108 Ω. By using the estimated
RC to inductance calculation, inductance monitoring results with an error of less than 5% are obtained. Similarly, when the line voltage changes to 12 V, the maximum inductance tracking error is about 4.57%.
These experimental results show that whether the system has low or high capacitor ESR, the proposed method can monitor the inductance with reliable accuracy.
5.3. Experimental Results with Different Switching Frequency
Buck converters with different switching frequencies have different transient states during signal injection, which may affect the accuracy of inductance monitoring. To investigate this effect, buck converters with different switching frequencies (50 kHz/200 kHz) were tested, and the inductance monitoring results are shown in
Figure 20. As
Table 7 shows, the average monitoring values of inductance at 50 kHz, 100 kHz, and 200 kHz are 57.089 μH, 56.781 μH, and 56.46 μH, respectively, and the monitoring errors are less than 1%. The maximum tracking error of inductance at 50 kHz is 3.53%, which is the smallest error among these three switching frequencies, while the maximum tracking error of inductance at 200 kHz is 7.20%, which is the highest. This indicates that as the switching frequency increases, the maximum monitoring error gradually increases. The reason is that at lower switching frequencies, the output voltage variations caused by signal injection increase, thereby reducing the impact of output voltage measurement noises and quantization errors on inductance monitoring.
5.4. Experimental Results with Different Inductors
To verify the accuracy of the proposed algorithm under different inductance conditions, different inductors (33 µH/100 µH) were used for experimental testing. The inductance monitoring results are shown in
Figure 21. The actual values of inductance were measured by an LCR meter, at 32.38 µH and 96.28 µH. The average monitoring values of
Figure 21a,b are 32.52 µH and 95.628 µH, respectively, which are all close to the actual values. In
Figure 21a, the maximum and minimum monitoring values are 33.839 μH and 3.021 μH, respectively. In
Figure 21b, the maximum and minimum monitoring values are 98.702 μH and 92.541 μH, respectively. The maximum tracking error in both cases is less than 4.5%, meaning that the correlation between inductance estimation accuracy and inductance value is not significant.
6. Conclusions
This study presents an online inductance monitoring method for a buck converter without a current sensor. Based on dynamic characteristics with inductor volt-seconds and capacitor charge balance characteristics, a current-sensorless inductance calculation model is proposed. Considering aging and certain high ESR situations, the effect of capacitor ESR on inductance calculation is compensated to improve the monitoring accuracy. Only the line and output voltage need to be sampled, and the sampling frequency is much lower than in other inductance monitoring methods. With the monitored inductance, the parameters of the SCM controller for the buck converter can be updated. The simulation and experimental results show the effectiveness of the proposed method in inductance monitoring accuracy, improving the dynamic performance.
This research is ongoing, including monitoring methods for other topologies, multiparameter identification, monitoring accuracy and anti-interference capability improvement, and thermal testing, and we regret that the final results have not been fully obtained.