- Article
A Low Area High Speed FPGA Implementation of AES Architecture for Cryptography Application
- Thanikodi Manoj Kumar,
- Kasarla Satish Reddy,
- Stefano Rinaldi,
- Bidare Divakarachari Parameshachari and
- Kavitha Arunachalam
Nowadays, a huge amount of digital data is frequently changed among different embedded devices over wireless communication technologies. Data security is considered an important parameter for avoiding information loss and preventing cyber-crimes. Thi...