Search Results (9)

This paper presents the design of a 140 GHz vector-sum phase shifter in a 28 nm CMOS process. Two variable-gain amplifiers—Gilbert cell and current-steering amplifiers—are investigated and compared. The Gilbert cell-based phase shifter controls the tail current source in a common-source amplifier. However, this configuration exhibits insufficient gain at D-band frequencies. To address this issue, we designed a current-steering variable-gain amplifier in cascode form to improve the gain performance. I/Q signals are generated by Marchand baluns and Lange couplers, and a 13-bit digital-to-analog converter enables fine bias control. Simulation results show that the current-steering phase shifter achieves up to a 4.4 dB higher gain than the Gilbert cell-based phase shifter, with an RMS gain error below 1.3 dB and an RMS phase error below 4.8° across 129–144 GHz. Full article

A unified-mode analysis method for modeling symmetric networks is proposed in this paper. Adjusting to the characteristics of Marchand balun circuits, a unified-mode circuit model is constructed by introducing virtual impedance. The tenable condition of a Marchand balun with connecting segments is then derived. The parameter constraint of Marchand balun’s input matching is given in a quarter-saddle diagram. Simulated results under different parameter conditions verify the validity of the derived formulas. Based on the derived formulas, the traditional isolation circuit and impedance matching circuit are merged with a Marchand balun to achieve matching for all ports and full-frequency isolation between output ports. A microstrip balun with input and output impedance values of 50 Ω, operating at 1.5 GHz, is simulated, fabricated, and measured. The simulated and measured results of the microstrip balun are in good agreement. When the core parameters remain unchanged, an impedance transformer is inserted in front of the input port of the balun to realize a balun with a topology characterized by flexible impedance transformation. A balun with an input impedance of 35 Ω and different output impedances of 50 Ω and 75 Ω is simulated and fabricated to verify the design concept. Measured results show that an amplitude balance of less than 0.4 dB and a phase balance of less than 3° for a fractional bandwidth of 50%. It should be mentioned that all design equations are closed-form and can be readily employed to design symmetric networks. Full article

A 30~60 GHz broadband down-conversion mixer driven by low local oscillator (LO) power is presented. The down-conversion mixer utilizes an input signal coupling technique based on the Marchand balun to achieve broadband operation and achieves low LO power drive and low DC power consumption through the use of a weak inversion bias with Gilbert switching devices. The broadband conversion of single-ended to differential signals is achieved using the Marchand balun with compensation lines, and an equivalent circuit analysis is performed. For the intermediate frequency (IF) output, a self-biased IF trans-impedance amplifier with current reusing and an active IF balun structure are used to achieve signal amplification and single-ended signal output. Test results show that the proposed mixer achieves a conversion gain of −1.2 to 6.4 dB in an IF output bandwidth of 0.1 to 5 GHz at radio frequency (RF) input frequencies of 30 to 60 GHz and LO driving power of −10 dBm. The DC power consumption of the core mixing unit of the proposed mixer is 4.8 mW, and the DC power consumption including the IF amplifier is 28.3 mW. The proposed mixer uses a 65 nm CMOS technology with a chip area of 0.26 mm². Full article

This article reports a two-stage differential structure power amplifier based on a 130 nm SiGe process operating at 77 GHz. By introducing a tunable capacitor for amplitude and phase balance at the center tap of the secondary coil of the traditional Marchand balun, the balun achieves amplitude imbalance less than 0.5 dB and phase imbalance less than 1 degree within the operating frequency range of 70–85 GHz, which enables the power amplifier to exhibit comparable output power over a wide operating frequency band. The power amplifier, based on a designed 3-bit digital analog convertor (DAC)-controlled base bias current source, exhibits small signal gain fluctuation of less than 5 dB and saturation output power fluctuation of less than 2 dB near the 80 GHz frequency point when the ambient temperature varies in the range of −40 °C to 125 °C. Benefiting from the aforementioned design, the tested single-path differential power amplifier exhibits a small signal gain exceeding 16 dB, a saturation output power exceeding 18 dBm, and a peak saturation output power of 19.1 dBm in the frequency band of 70–85 GHz. Full article

This brief proposes a 1–6 GHz broadband double-balanced mixer. On the basis of the standard Marchand balun mixer, two techniques to enhance the performance of the mixer are proposed. Firstly, by loading capacitors, the amplitude and phase imbalance of the balun at high frequencies are improved, thereby expanding the relative bandwidth of the mixer by 0.1. Secondly, by cascading a first-order LC filter at the intermediate-frequency (IF) port, the leakage of radio frequency (RF) and local oscillator (LO) signals at the IF port is reduced by approximately 8 dB and 7 dB, respectively. This brief analyzes the various parameters that affect balun indicators and designs a broadband balun with a double-layer spiral line structure. As a result of these technologies, a 1–6 GHz double-balanced mixer is realized. The chip area is 1.13 mm × 0.95 mm, and the isolation between the IF port and the RF port is 34 dB and yields 13.5 dBm input power at 1 dB compression point (IP1 dB). The chip is fabricated via the GaAs pHEMT process. Full article

In this paper, a D-band direct conversion IQ receiver with on-chip multiplier chain is presented. The D-band LNA with gain-boosting and stagger-tunning technique is implemented to provide high gain and large bandwidth. X9 multiplier chain including Marchand balun and quadrature (90°) hybrid is employed to provide four path LO signal to drive IQ mixer. This receiver is implemented in a 130nm SiGe process and consumes a core area of 1.04 mm². From the experimental results, the proposed receiver exhibits a 20 GHz bandwidth from 150 GHz to 170 GHz, with CG of 28 dB and NF of 7.3 dB at 158 GHz. Full article

The linearity of active mixers is usually determined by the input transistors, and many works have been proposed to improve it by modified input stages at the cost of a more complex structure or more power consumption. A new linearization method of active mixers is proposed in this paper; the input 1 dB compression point (IP1dB) and output 1 dB compression point (OP1dB) are greatly improved by exploiting the “reverse uplift” phenomenon. Compared with other linearization methods, the proposed one is simpler, more efficient, and sacrifices less conversion gain. Using this method, an ultra-high-linearity double-balanced down-conversion mixer with wide IF bandwidth is designed and fabricated in a 130 nm SiGe BiCMOS process. The proposed mixer includes a Gilbert-cell, a pair of phase-adjusting inductors, and a Marchand-balun-based output network. Under a 1.6 V supply voltage, the measurement results show that the mixer exhibits an excellent IP1dB of +7.2~+10.1 dBm, an average OP1dB of +5.4 dBm, which is the state-of-the-art linearity performance in mixers under a silicon-based process, whether active or passive. Moreover, a wide IF bandwidth of 8 GHz from 3 GHz to 11 GHz was achieved. The circuit consumes 19.8 mW and occupies 0.48 mm², including all pads. The use of the "reverse uplift" allows us to implement high-linearity circuits more efficiently, which is helpful for the design of 5G high-speed communication transceivers. Full article

This paper presents a 60 GHz CMOS I/Q receiver for the high-speed wireless communication system. It consists of a low noise amplifier, single-to-differential (S2D) amplifier, passive mixer, buffer amplifier with passive I/Q generator, and wideband baseband amplifier (BBA) stage. The measured conversion gain of 51 dB is achieved. The baseband bandwidth of 300 MHz is achieved from 57 GHz to 60 GHz. The 90° tandem coupler was implemented for I/Q signal generation, which has a phase error of <7° and an amplitude imbalance of <2 dB from 55 to 62 GHz. The Marchand balun is used to convert the I/Q signal to the differential, which has a phase error of <4°. A 60 GHz CMOS I/Q receiver is designed and fabricated, using a commercial 40 nm CMOS bulk process. The size of the receiver is 2.02 × 1.45 mm², including the pads. The circuit is operated from a 0.9 V supply. The power consumption is 172 mW at maximum gain mode. Full article

This article presents a novel Ka-band Marchand balun implemented in 0.13-μm SiGe bipolar complementary metal–oxide–semiconductor (BiCMOS) process. By combining both edge- and broadside-coupled structures, the new hybrid balun is able to increase the coupling and minimize the balun insertion loss. As compared with conventional edge-coupled or broadside-coupled structures, the proposed balun achieves the lowest insertion loss of 1.02 dB across a wide 1-dB bandwidth from 29.0 GHz to 46.0 GHz, with a core size of 270 μm $\times$ 280 μm. Full article